JPH04318927A - Dry etching method - Google Patents

Abstract

PURPOSE:To prevent the generation of etching residue resulting from a natural oxide film in the dry etching of a silicon group material layer using no fluorocarbon group gas. CONSTITUTION:A natural oxide film 5 is removed by changing the applying method of RF bias in the same gas system and the same chamber before a polycrystalline silicon layer 3 is etched (main-etching) by using S2F2. The removal of the film 3 is conducted by either of a) power is increased, b) frequency is lowered or c) power is increased and frequency is lowered when the method is compared with main-etching. All of a), b) and c) methods have an effect improving ion implantation energy, and can remove the natural oxide film 5 on the surface of the polycrystalline silicon layer 3 effectively. The etching of the polycrystalline silicon layer 3 progresses smoothly and uniformly, and a gate electrode 3a having an anisotropic shape can be formed by the contribution of the sidewall protective films 6 of sulfur.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a dry etching method applied in the field of manufacturing semiconductor devices, etc., and in particular, when etching a silicon-based material layer without using a fluorocarbon-based gas, etching caused by a natural oxide film is avoided. This invention relates to a method for preventing the generation of residue.

0002

[Background Art] As semiconductor devices become more highly integrated and have higher performance as seen in VLSI, ULSI, etc. in recent years, various types of silicon such as single crystal silicon, polycrystal silicon, high melting point metal silicide, polycide, etc. There is a strong desire for a technology that can achieve various requirements such as high anisotropy, high speed, high selectivity, low damage, and low contamination without sacrificing any of the requirements for etching of a layer of based materials. A typical etching process for single-crystal silicon is trench processing, which forms trenches for the purpose of fine element isolation and securing cell capacitance area. On the other hand, a typical etching process for polycrystalline silicon, refractory metal silicide, polycide, etc. is gate processing. Both are processes that require extremely high processing precision due to advanced miniaturization of design rules.

Conventionally, fluorocarbon-based gases such as fluorocarbon-113 (C2 Cl3 F3) have been widely used as etching gases for etching these silicon-based materials. Since fluorocarbon-based gas has F and Cl as constituent elements in one molecule, it is possible to perform etching by both radical reactions and ion-assisted reactions, and sidewalls can be protected by carbon-based polymers deposited from the gas phase. However, high anisotropy can be achieved. However, as is well known, fluorocarbon gases have been pointed out to be the cause of the destruction of the earth's ozone layer, and their production and use are likely to be prohibited in the near future. Therefore, in the field of dry etching, there is an urgent need to find a substitute for fluorocarbon-based gas and to establish an effective method for using it. Furthermore, if the design rules for semiconductor devices become even smaller in the future, carbon-based polymers deposited in the gas phase may become a source of particle contamination, and in this sense, measures to eliminate fluorocarbons are desired.

[0004] Low-temperature etching is a promising technique for eliminating fluorocarbons. By keeping the temperature of the substrate (wafer) to be etched below 0°C, the etching rate in the depth direction is maintained at a practical level due to the ion assist effect, while radical reactions on the sidewalls of the pattern are frozen or suppressed. This technique attempts to prevent shape abnormalities such as undercuts. For example, the 35th
On page 495 of the lecture proceedings of the Annual Conference on Applied Physics (Spring 1988 Annual Conference), title number 28a-G-2,
An example has been reported in which silicon trench etching and n+ type polycrystalline silicon layer etching were performed using SF6 gas after cooling the wafer to -130°C.

However, if it is attempted to achieve high anisotropy in low-temperature etching by relying solely on freezing or suppressing radical reactions, a corresponding level of low temperature will be required, which may significantly reduce economic efficiency and throughput. Therefore,
A more practical approach would be to combine suppression of radical reactions at low temperatures and sidewall protection, and perform etching at a temperature closer to room temperature.

[0006] The applicant has developed this side wall protection using sulfur (S).
) have proposed a number of techniques to date. Deposition of S is possible by using an etching gas mainly composed of sulfur halide, which has a relatively small ratio of the number of halogen (X) atoms to the number of S atoms in one molecule, that is, the X/S ratio. Become. For example, patent application Hei 2-1
No. 98045 discloses S2 F2 , SF2 , SF4 , and S2 F10 as such sulfur halides. These sulfur fluorides are different from SF6, which is the most well-known sulfur fluoride, and can generate S in the gas phase by discharge dissociation. If the substrate is cooled to a low temperature, this S will be deposited on the surface of the substrate and exert a sidewall protection effect. Moreover, the accumulated S
can be easily removed by sublimation by heating the substrate after etching, so there is no risk of particle contamination. The applicant of this application focused on the fact that the amount of F* (fluorine radicals) generated from these sulfur fluorides is smaller than that of SF6, and that an ion-assisted reaction by SFx+ can be expected, and this is used for etching of silicon oxide-based material layers. High selectivity for silicon substrates was achieved by applying this method to

In this way, as a sulfur halide, F
Sulfur fluoride, which has a relatively small /S ratio, was first proposed for etching silicon oxide-based material layers, but the applicant has since developed a technique for applying sulfur halides to etching silicon-based material layers. Various proposals are made. For example, in Japanese Patent Application No. 2-199249, a silicon-based material is etched using a gas containing sulfur chloride such as S2 Cl2 or sulfur bromide such as S2 Br2 while the substrate to be etched is cooled to below 0°C. Discloses a technology for low-temperature etching. This is intended to reduce the influence of radicals and more advantageously achieve high anisotropy by using a gas that cannot generate highly reactive F*.

[0008]

[Problems to be Solved by the Invention] By the way, when performing gate processing as an etching process for a silicon-based material layer, for example, it is necessary to ensure a high selectivity for a thin gate oxide film and minimize damage to the silicon substrate. It is necessary to etch the polycrystalline silicon layer and polycide film under conditions that can be kept to a minimum. In this way, when high selectivity and low damage to the underlying layer are important, conditions are usually adopted in which the ion incident energy is reduced within a range that does not impair the practical etching rate. However, since a natural oxide film made of silicon oxide SiOx (particularly SiO2) generally exists on the surface of the silicon-based material layer, a large amount of etching residue may be generated under such conditions. This is because the thickness of the natural oxide film is non-uniform, and thicker portions remain without being removed, functioning as an etching mask. In other words, it is inherently difficult to simultaneously remove the silicon oxide-based natural oxide film, which is etched by a mechanism mainly based on ion mode, under the same conditions as the silicon-based material layer, under conditions where the ion incident energy is reduced. . SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a dry etching method that can prevent the generation of etching residues caused by natural oxide films and can achieve high selectivity and low damage to the underlying layer.

[0009]

Means for Solving the Problems The dry etching method of the present invention is proposed to achieve the above-mentioned objects. That is, in the dry etching method according to the first invention of the present application, the temperature of the substrate to be etched is controlled to be below room temperature, and S2 F2 , SF2 , SF4 , S2 F10 is etched while applying a relatively high power RF bias.
, S3 Cl2 , S2 Cl2 , SCl2 , S3
A step of removing a natural oxide film on the surface of a silicon-based material layer using an etching gas containing at least one compound selected from Br2, S2, Br2, SBr2, and applying a relatively low power RF bias. The method is characterized by comprising a step of etching the silicon-based material layer using the etching gas.

In the dry etching method according to the second invention of the present application, the temperature of the substrate to be etched is controlled to below room temperature, and S is applied while applying an RF bias of a relatively low frequency.
2 F2 , SF2 , SF4 , S2 F10, S3
Cl2, S2 Cl2, SCl2, S3 Br
A step of removing a natural oxide film on the surface of the silicon-based material layer using an etching gas containing at least one compound selected from 2, S2, Br2, and SBr2 while applying a relatively high frequency RF bias. The method is characterized by comprising a step of etching the silicon-based material layer using the etching gas.

Further, in the dry etching method according to the third aspect of the present invention, the temperature of the substrate to be etched is controlled to be below room temperature, and S2 F2, SF2,
SF4, S2 F10, S3 Cl2, S2 Cl
2, SCl2, S3 Br2, S2 Br2,
A step of removing a natural oxide film on the surface of a silicon-based material layer using an etching gas containing at least one compound selected from SBr2, and applying an RF bias of relatively low power and relatively high frequency. and etching the silicon-based material layer using the etching gas.

0012

[Operation] The present invention is characterized by inserting a so-called breakthrough process for removing the natural oxide film before starting the etching process of the silicon-based material layer. In the present invention, the above-mentioned breakthrough and the etching of the silicon-based material layer are performed in the same chamber using an etching gas of the same composition in a continuous process, but the etching of the silicon-based material layer is essentially a radical process. There is a difference in the etching mechanism in that the etching of the silicon oxide material layer progresses mainly in the ion mode. Therefore, a condition is adopted in which the ion incident energy is increased only at the time of breakthrough. Means for increasing the ion incident energy include (a) increasing the power of the RF bias applied to the substrate to be etched, (b) lowering the frequency of the RF bias applied to the substrate to be etched, and (c) increasing the frequency of the RF bias applied to the substrate to be etched. It is conceivable to increase the power and lower the frequency of the RF bias applied to the RF bias.

The invention based on the idea of increasing the RF bias power in (a) above is the first invention of the present application. In this case, as the RF bias power applied to the substrate to be etched increases, the potential between the ions and the sheath formed near the substrate increases, and the ions obtain higher incident energy and enter the substrate to be etched. Here, the etching gas contains S2 F2, SF2, SF4,
S2 F10, S3 Cl2, S2 Cl2, SC
l2 , S3 Br2 , S2 Br2 , SBr2
When at least one compound selected from
x + , SBrx + , Fx + , Clx +
, Brx + etc. These ions not only directly remove the natural oxide film by sputtering, but also assist in the decomposition and removal of the natural oxide film through radical reactions. These mechanisms quickly remove the natural oxide film. After the native oxide film has been removed, etching the silicon material layer under conditions of lower RF bias power will not produce any etching residue and will provide excellent substrate selectivity and low damage properties. achieved.

The invention based on the idea of lowering the RF bias frequency (b) above is the second invention of the present application. Generally, when an RF electric field is formed in a plasma generation region in plasma etching, when the RF bias frequency is low, both ions and electrons can follow the reversal of the electric field, so that some of the ions are incident on the substrate to be etched. However, as the RF bias frequency increases, it becomes impossible to sequentially track ions starting from the largest mass, and the amount of ions incident on the substrate to be etched decreases. Furthermore, as the RF bias frequency increases, electrons can no longer be followed and vibrate in the plasma, colliding with gas molecules and generating many radicals and ions, but heavy ions that cannot follow the reversal of the electric field are affected. Almost no light enters the etched substrate. Therefore, if the native oxide film is removed under conditions where the RF bias frequency is lowered and the ion mode is the main mode, and then the silicon-based material layer is etched under conditions where the RF bias frequency is increased and the ionicity is weakened, the etching residue will be removed. Excellent substrate selectivity and low damage properties can be achieved without causing any damage.

The invention based on the idea of increasing the power of the RF bias and lowering the frequency of the above (c) is the third invention of the present application. In this case, the combined effect of the first invention and the second invention of the present application can be expected. In other words, when removing a native oxide film, ions with a large mass are made to enter the substrate to be etched with high ion incident energy, and when etching a silicon-based material layer, etching is performed under conditions that weaken ionicity as much as possible. This makes it possible to thoroughly and quickly remove the native oxide film, and achieve high selectivity and low damage to the substrate.

By the way, in the present invention, when etching the silicon-based material layer, the RF bias power is lowered or the RF bias frequency is increased, or both are performed compared to the time of breakthrough, but this main etching The anisotropy is not impaired in any way. This is due to the excellent properties of the various sulfur halides used in the present invention. That is, these sulfur halides can generate S in plasma through discharge dissociation. The generated S easily precipitates onto the surface of the substrate to be etched because the substrate is maintained at a temperature below room temperature. Here, the S deposited on the ion incident surface is immediately removed by sputtering, but S continues to accumulate on the sidewall portions of the pattern where few ions are incident, and this serves as a sidewall protective film. Moreover, since radical reactions are suppressed to some extent by controlling the temperature of the substrate to be etched, high anisotropy is ensured. Moreover, the deposited S can be easily sublimated and removed by heating the substrate to be etched to a temperature higher than room temperature after etching, so that it does not cause particle contamination in the etching system. This is also one of the important advantages of the present invention.

[0017]

[Examples] Specific examples of the present invention will be described below.

Example 1 In this example, the first invention of the present application is applied to gate processing,
This is an example in which a native oxide film is removed using S2 F2 under conditions where the RF bias power is increased, and then a polycrystalline silicon layer is etched under conditions where the RF bias power is decreased. This process will be explained with reference to FIGS. 1(a) to 1(c).

First, before starting the actual process, the dependence of the etching rate of the silicon oxide layer on the RF bias power was investigated in a preliminary experiment, and the results will be explained. The sample wafer used in the experiment was a silicon oxide layer formed by surface oxidation of a silicon substrate. This wafer was set on a wafer mounting electrode of a magnetic field microwave plasma etching system, and the wafer was cooled to approximately -60°C by circulating an ethanol refrigerant through a cooling pipe built into the wafer mounting electrode. . here,
Conditions are S2 F2 flow rate 20SCCM, gas pressure 1.3P
a (10 mTorr), microwave power was 850 W, and changes in the etching rate of the silicon oxide layer were investigated when the value of RF bias power (2 MHz) was changed. Figure 2 shows the results of this experiment, where the vertical axis is the etching rate (Å/min) of the silicon oxide layer, and the horizontal axis is the RF bias and
Each represents power (W). It is evident that the etching rate of the silicon oxide layer increases as the RF bias power increases and the ion injection energy increases.

Based on this experimental result, an example of a process in which actual gate processing was performed is shown in FIGS. 1(a) to 1(c).
This will be explained with reference to. First, as an example, Figure 1(a)
As shown in , an n+ type polycrystalline silicon layer 3 is formed on a single crystal silicon substrate 1 via a gate oxide film 2 made of silicon oxide, and a resist mask 4 patterned into a predetermined shape is further formed. A wafer was prepared. Here, a natural oxide film 5 having a non-uniform thickness is formed on the exposed surface of the polycrystalline silicon layer 3. Next, the wafer was set on a wafer mounting electrode of a magnetic field microwave plasma etching apparatus and cooled to about -60°C. In this state, S2 F2 flow rate 5SCCM,
Gas pressure 1.3 Pa (10 mTorr), microwave power 850 W, RF bias power 50 W (2 MHz)
The natural oxide film 5 was etched under conditions of an etching time of 10 seconds. In this breakthrough process, S2
S+ generated in plasma due to discharge dissociation of F2
, SFx + and the like became the main etching species, and the natural oxide film 5 was quickly removed as shown in FIG. 1(b).

Next, the polycrystalline silicon layer 3 was etched under the same conditions except that the RF bias power was lowered to 5W. In this process, F* generated by discharge dissociation of S2 F2 contributes as the main etching species, but S, which is also generated by dissociation from S2 F2, is deposited on the sidewalls of the pattern, as shown in FIG. 1(c). A protective film 6 was formed. As a result, a gate electrode 3a having a good anisotropic shape was formed despite the low bias power. Furthermore, by lowering the RF bias power, high selectivity to the underlying gate oxide film 2 was also achieved. The sidewall protective film 6 was removed by sublimation by heating the wafer to about 90° C. after etching, and no particle contamination was caused in the etching system. This heating can also be used to prevent dew condensation on the wafer after low-temperature etching.

Comparative Example This comparative example is an example in which the polycrystalline silicon layer 3 was etched from the beginning under low bias power conditions without making a breakthrough, as a comparison with the above-mentioned Example 1. This process will be explained with reference to FIG. However, parts in FIG. 4 that are common to those in FIG. 1 will be described using the same numbers. The etching conditions in this comparative example were S2 F2 flow rate 5SCCM, gas pressure 1.3 Pa (
10 mTorr), microwave power 850 W, RF bias power 5 W (2 MHz), wafer temperature approximately -60
℃, and the etching conditions for the polycrystalline silicon layer 3 in Example 1 are the same. However, since no breakthrough occurred in this comparative example, the partially remaining native oxide film 5 functioned as an etching mask, and a large amount of etching residue 3b was generated as shown in FIG.

Embodiment 2 In this embodiment, the first invention of the present application is applied to trench processing, and the natural oxide film is removed using S2 F2 under the condition of increasing the RF bias power, and then the RF bias power is increased. This is an example in which a single crystal silicon substrate was etched under conditions of reduced power. This process is illustrated in Figures 3(a) to (
This will be explained with reference to c). First, as an example, Figure 3 (
As shown in a), a resist mask 12 serving as an etching mask was formed on a single crystal silicon substrate 11, and openings 13 were selectively formed by patterning. Here, single crystal silicon substrate 1 exposed in opening 13
A natural oxide film 14 is formed on the surface of 1. Next, this wafer was set in a magnetic field microwave plasma etching system, and the S2 F2 flow rate was 20SCCM.
Gas pressure 1.3 Pa (10 mTorr), microwave power 850 W, RF bias power 50 W (2 MHz)
The natural oxide film 14 was etched under conditions of a substrate temperature of about -60° C. and an etching time of 10 seconds. In this breakthrough process, ions such as S+ and SFx + generated in the plasma by discharge dissociation of S2F2 become the main etching species, and the native oxide film 14 is quickly removed as shown in FIG. 3(b). Ta.

Next, the single crystal silicon substrate 11 was etched under the same conditions except that the RF bias power was lowered to 20 W. In this process, while etching progressed at high speed due to a mechanism in which F* generated by discharge dissociation of S2F2 was assisted by ions such as S+ and SFx, the sidewall protective film 15 was formed by S deposition. As a result, a trench 16 having a good anisotropic shape was formed as shown in FIG. 3(c).

Example 3 In this example, the second invention of the present application is applied to gate processing in the same manner as in Example 1, and the natural oxide film is removed using S2 F2 at a low RF bias frequency, and then This is an example in which a polycrystalline silicon layer is etched under conditions where the RF bias power is increased. The drawings to be referred to are the above-mentioned Figure 1(a)
) to (c). First, a wafer in the state shown in FIG. 1(a) was set in a magnetic field microwave plasma etching apparatus. Here, the magnetic field microwave plasma etching apparatus has a frequency of 400 kHz and 13.56 MHz as an RF power source connected to the wafer mounting electrode.
Two systems are prepared, and either one of the RF power sources can be selectively connected using a changeover switch. In this state, S2 F2 flow rate 20SCCM, gas pressure 1.3P
a (10mTorr), microwave power 850W, R
F bias power 20W, RF bias frequency 400
The natural oxide film 5 was etched under the conditions of kHz, substrate temperature of about -60° C., and etching time of 20 seconds. In this breakthrough process, by applying a relatively low RF bias frequency, the followability of ions to the electric field was improved, and the natural oxide film 5 was sputtered away with substantially high ion incident energy. Next, the polycrystalline silicon layer 3 was etched under the same conditions except that the RF bias frequency was increased to 13.56 MHz. In this process, although the ion incident energy is relatively low, the radical-based etching reaction and the sidewall protection by S proceed simultaneously, and the gate electrode 3a has an anisotropic shape while maintaining high selectivity to the gate oxide film 2. was formed.

Example 4 In this example, the third invention of the present application is applied to gate processing as in Example 3, and RF bias and
This is an example in which a native oxide film is removed under conditions of high power and low frequency, and then a polycrystalline silicon layer is etched under conditions of low RF bias power and high frequency. The drawings to be referred to are the aforementioned FIGS. 1(a) to 1(c). First, a wafer in the state shown in FIG. 1(a) is set in a magnetic field microwave plasma etching apparatus, and S2 F
2 Flow rate 20SCCM, gas pressure 1.3Pa (10mTo
The natural oxide film 5 was etched under the following conditions: microwave power of 850 W, RF bias power of 50 W, RF bias frequency of 400 kHz, and substrate temperature of about -60°C. Under these conditions, the RF bias power was further increased compared to the breakthrough conditions of Example 3, and the natural oxide film 5 was removed in just 5 seconds. Next, the polycrystalline silicon layer 3 was etched under the same conditions except that the RF bias power was lowered to 20 W and the RF bias frequency was increased to 13.56 MHz. As a result, the gate electrode 3a having a good anisotropic shape could be formed with excellent selectivity to the underlying layer.

It should be noted that the present invention is not limited to the above-described embodiments; for example, various additive gases may be mixed with the etching gas. For example, when N2 is added, side wall protection can be expected to be strengthened by reaction products, and H* and/or silicon-based active species can be added to the etching system, such as H2, H2S, and silane-based gases. By adding gas that can be supplied, excess halogen and
It can trap radicals and enhance the S deposition effect. Furthermore, a rare gas such as He or Ar may be added for the purpose of obtaining a sputtering effect, a cooling effect, and a dilution effect. In addition, in the above embodiment, S is used as the etching gas.
Although the case where 2F2 is used has been described, even when other sulfur fluoride, sulfur chloride, and sulfur bromide proposed in the present invention are used, the generation of etching species and the sidewall protection by S are performed by the same mechanism. be exposed. However, for compounds that are liquid at room temperature, it is necessary to vaporize them by bubbling with an inert gas before introducing them into the etching reaction system. In particular, when using sulfur chloride and sulfur bromide, extremely reactive etching species such as F* are not generated, so although the etching rate may decrease slightly, it is important to achieve anisotropy. It will be advantageous from Furthermore, when sulfur bromide is used, SiBrx, which is an etching reaction product, also contributes to sidewall protection together with S.

[0028]

[Effects of the Invention] As is clear from the above explanation, according to the dry etching method of the present invention, a silicon-based material layer can be etched with high anisotropy without generating etching residue caused by a natural oxide film. , high speed, high selectivity, and low pollution. Therefore, the present invention is suitable for manufacturing semiconductor devices having a high degree of integration and high performance based on fine design rules, and is also extremely excellent as a measure to eliminate CFCs.

[Brief explanation of drawings]

FIG. 1 is a schematic cross-sectional view showing an example of applying the dry etching method of the present invention to gate processing according to the process order, in which (a) shows the state of the wafer before etching, and (b) shows the state of the wafer before etching.
(c) shows the state in which the native oxide film has been removed, and (c) shows the state in which the gate electrode has been formed.

FIG. 2 is a characteristic diagram showing the relationship between etching rate and RF bias power when a silicon oxide layer is etched with S2 F2 using a magnetic field microwave plasma etching apparatus.

FIG. 3 is a schematic cross-sectional view showing an example of applying the dry etching method of the present invention to trench processing according to the process order, in which (a) shows the state of the wafer before etching;
) shows the state in which the native oxide film has been removed, and (c) shows the state in which the trench has been formed.

FIG. 4 is a schematic cross-sectional view showing a state in which a large amount of etching residue is generated due to a native oxide film in conventional gate processing.

[Explanation of symbols]

1...Single crystal silicon substrate 2
...Gate oxide film 3...
- Polycrystalline silicon layer 3a... Gate electrodes 4, 12... Resist mask 5, 14... Natural oxide film 6, 15... Side wall protection film (S) 13... Opening 16...・Trench

Claims (3)

[Claims] 1. S2 F2 , SF2 , SF4 , S2 F10 while controlling the temperature of the substrate to be etched to below room temperature and applying a relatively high power RF bias.
, S3 Cl2 , S2 Cl2 , SCl2 , S3
A step of removing a natural oxide film on the surface of a silicon-based material layer using an etching gas containing at least one compound selected from Br2, S2, Br2, SBr2, and applying a relatively low power RF bias. and etching the silicon-based material layer using the etching gas. 2. S2 F2 , SF2 , SF4 , S2 F10 while controlling the temperature of the substrate to be etched to below room temperature and applying a relatively low frequency RF bias.
, S3 Cl2 , S2 Cl2 , SCl2 , S3
A process of removing a natural oxide film on the surface of a silicon-based material layer using an etching gas containing at least one compound selected from Br2, S2, Br2, SBr2, and applying a relatively high frequency RF bias. and etching the silicon-based material layer using the etching gas. 3. S2 F2 , SF2 , while controlling the temperature of the substrate to be etched to below room temperature and applying an RF bias of relatively high power and relatively low frequency.
SF4, S2 F10, S3 Cl2, S2 Cl
2, SCl2, S3 Br2, S2 Br2,
A step of removing a natural oxide film on the surface of a silicon-based material layer using an etching gas containing at least one compound selected from SBr2, and applying an RF bias of relatively low power and relatively high frequency. and etching the silicon-based material layer using the etching gas.