JPH0431845U - - Google Patents
Info
- Publication number
- JPH0431845U JPH0431845U JP7493290U JP7493290U JPH0431845U JP H0431845 U JPH0431845 U JP H0431845U JP 7493290 U JP7493290 U JP 7493290U JP 7493290 U JP7493290 U JP 7493290U JP H0431845 U JPH0431845 U JP H0431845U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- counting
- interface device
- digital audio
- clocks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Description
第１図はこの考案の実施例のブロツク回路図、
第２図は従来のデイジタルオーデイオインタフエ
ース装置のブロツク回路図である。
３……シフトレジスタ、４……クロツク発生器
、８……Ｕビツトラツチ、１０……カウンタ、１
１……ウインドウ発生回路、１２……ＯＲゲート
。なお、各図中、同一符号は同一、または相当部
分を示す。
Figure 1 is a block circuit diagram of an embodiment of this invention.
FIG. 2 is a block circuit diagram of a conventional digital audio interface device. 3...Shift register, 4...Clock generator, 8...U bit latch, 10...Counter, 1
1...Window generation circuit, 12...OR gate. In each figure, the same reference numerals indicate the same or corresponding parts.
Claims (1)
報を分離し、この付加情報の中に一定の周期でも
つて挿入されている同期信号を抽出して取り出す
ように構成されたデイジタルオーデイオインタフ
エース装置において、上記同期信号を検出する手
段と、この検出信号によつてリセツトされ上記同
期信号が挿入されている周期に相当するクロツク
数を計数する手段と、この計数手段が上記クロツ
ク数を計数したときウインドウ信号および上記計
数手段をリセツトするリセツト信号を発生する手
段と、上記ウインドウ信号が出力されたときだけ
上記同期信号検出手段で検出されている同期信号
を出力させる同期信号出力制御手段とを備えたこ
とを特徴とするデイジタルオーデイオインタフエ
ース装置。 In a digital audio interface device configured to separate additional information included in received data at regular intervals, and extract and retrieve synchronization signals inserted into this additional information at regular intervals. , means for detecting the synchronization signal, means for counting the number of clocks reset by the detection signal and corresponding to the period in which the synchronization signal is inserted, and a window when the counting means counts the number of clocks. and a means for generating a reset signal for resetting the signal and the counting means, and a synchronizing signal output control means for outputting the synchronizing signal detected by the synchronizing signal detecting means only when the window signal is output. A digital audio interface device featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7493290U JPH0431845U (en) | 1990-07-12 | 1990-07-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7493290U JPH0431845U (en) | 1990-07-12 | 1990-07-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0431845U true JPH0431845U (en) | 1992-03-16 |
Family
ID=31615063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7493290U Pending JPH0431845U (en) | 1990-07-12 | 1990-07-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0431845U (en) |
-
1990
- 1990-07-12 JP JP7493290U patent/JPH0431845U/ja active Pending
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