JPH0431269U

JPH0431269U -

Info

Publication number: JPH0431269U
Application number: JP1990073112U
Authority: JP
Priority date: 1990-07-09
Filing date: 1990-07-09
Publication date: 1992-03-13
Anticipated expiration: 2005-07-09
Also published as: JPH084696Y2

Description

[Brief explanation of drawings]

第１図〜第３図は本考案の一例であるＤＩＰ型
混成集積回路を示す図であり、第１図は斜視図、
第２図は側面図、第３図は分解斜視図、第４図〜
第１０図は本考案の変形例を示す図であり、第４
図及び第５図は外部取出端子の変形例を示す側面
図、第第６図は混成集積回路を縦置きに実装した
場合の斜視図、第７図は他端に電極パターンが形
成されていない部材を設けた場合の側面図、第８
図は回路基板が２枚重となつている混成集積回路
を縦置きに実装した場合の斜視図、第９図ａ，ｂ
は回路基板が２枚重となつている混成集積回路の
変形例を示す側面図、第１０図は回路基板の両面
に電子部品が実装されている混成集積回路を示す
側面図、第１１図〜第２１図は従来の混成集積回
路を示す図であつて、第１１図〜第１３図はリー
ド端子を示す図であり、第１１図は正面図、第１
２図は側面図、第１３図は斜視図、第１４図〜第
１６図は他のリード端子を示す図であり、第１４
図は正面図、第１５図は側面図、第１６図は斜視
図、第１７図及び第１８図はリード端子を回路基
板に取り付けた場合の図であつて、第１７図は正
面図、第１８図は側面図、第１９図は回路基板が
２枚重となつている混成集積回路を示す側面図、
第２０図及ひ第２１図はＤＩＰ型混成集積回路の
側面図である。１……回路基板、２……外部取出端子、３……
電子部品、５……接続ランド、６……凹溝。 1 to 3 are diagrams showing a DIP type hybrid integrated circuit which is an example of the present invention, and FIG. 1 is a perspective view;
Figure 2 is a side view, Figure 3 is an exploded perspective view, Figures 4~
FIG. 10 is a diagram showing a modification of the present invention, and the fourth
5 and 5 are side views showing modified examples of external extraction terminals, FIG. 6 is a perspective view of a hybrid integrated circuit mounted vertically, and FIG. 7 is a side view showing a modified example of the external extraction terminal, and FIG. Side view when the member is provided, No. 8
The figure is a perspective view of a hybrid integrated circuit with two circuit boards mounted vertically, Figures 9a and b.
10 is a side view showing a modified example of a hybrid integrated circuit in which two circuit boards are stacked, FIG. 10 is a side view showing a hybrid integrated circuit in which electronic components are mounted on both sides of the circuit board, and FIGS. FIG. 21 is a diagram showing a conventional hybrid integrated circuit, and FIGS. 11 to 13 are diagrams showing lead terminals, and FIG. 11 is a front view, and FIG.
2 is a side view, FIG. 13 is a perspective view, and FIGS. 14 to 16 are views showing other lead terminals.
The figure is a front view, FIG. 15 is a side view, FIG. 16 is a perspective view, FIGS. 17 and 18 are views when the lead terminal is attached to the circuit board, and FIG. 17 is a front view, and FIG. Fig. 18 is a side view, Fig. 19 is a side view showing a hybrid integrated circuit in which two circuit boards are stacked;
20 and 21 are side views of a DIP type hybrid integrated circuit. 1...Circuit board, 2...External output terminal, 3...
Electronic component, 5...connection land, 6...concave groove.

Claims

[Claims for Utility Model Registration] A circuit board having a conductive pattern formed on its surface and a connection land connected to the conductive pattern along at least one side, and a circuit board having the connection land and the mounting board. and an external lead-out terminal for electrically connecting the circuit board, wherein the connection land is formed so that the circuit board is inserted into the circuit board by a groove formed on the inner surface of the external lead-out terminal. A pattern extending along the side of the circuit board and connecting at least the connection portion of the connection land to the mounting surface is formed corresponding to the pitch between each connection land. Hybrid integrated circuit.