JPH0430683A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To obtain a display with high quality in the moving picture display without complicated picture processing by revising the picture display for each field. CONSTITUTION:A liquid crystal drive signal is inputted to a horizontal scanning circuit 121 to input a control signal Gdel to a control signal Gd3l input terminal and to input an erasure signal Vdel to an erasure signal Vdel input terminal. When a signal Vgatel whose pulse width is a signal supply period Tsig is outputted in an odd number field, a TFT (thin film transistor) 103 of a 1st row of a scanning electrode X is turned on and a signal electrode signal Vs for the signal supply period Tsig is fed to a picture element electrode 105. When a signal Vgatel whose pulse width is a signal erasure period Tdel is outputted in an even number field, the TFT 103 of the 1st row of the scanning electrode X is turned on and the signal electrode signal Vs for the signal erasure period Tdel is fed to the picture element electrode 105 and the picture of the 1st row of the scanning electrode X is erased.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a liquid crystal display device that uses liquid crystal to display images in general television signals, such as NTSC signals and high-definition television signals.

BACKGROUND ART An example of a conventional liquid crystal display device is, for example, Japanese Patent Laid-Open No. 63
An example of an active matrix is shown in No.-249896. Further, FIG. 5 is a block diagram showing the configuration of a panel peripheral drive circuit of a conventional liquid crystal display device. In FIG. 5, 101 is a liquid crystal panel, 102 is a configuration of one picture element, and 103 is a switching transistor for switching each picture element (a thin film transistor made of amorphous silicon or the like, hereinafter referred to as TFT C).
m erasisLor)), 104 is a liquid crystal cell, 1 '05 is a TFT103i/) Fiz in! A picture element electrode connected to the pole, 106 a counter electrode common to all picture elements, 107 a scanning electrode connected to the gate electrode JIG of the TFT 103, and 108 a signal electrode connected to the source electrode S of the TFT 103 , 109 is a scanning start signal Sv input terminal for inputting the scanning start signal Sv, 110
is a horizontal synchronization signal fH input terminal to which the horizontal synchronization signal "H" is input, 111 is a control signal C1 input terminal that controls the signals of the scan electrodes in odd rows, and 112 is a control signal 02 input that controls the signals of scan electrodes in even rows. Terminal, 113 is TFT 103
A scan electrode voltage (+Vg) input terminal for inputting a scan electrode voltage (+Vg) for turning on the TPT
A scan electrode voltage (-Vg) input terminal for inputting a scan electrode voltage (-Vg) for turning off IQ3, 115 is i
/ 2 shift register circuits, 116 is i gate circuits, 1i/ is a vertical signal switching circuit that switches between scan electrode voltage (+Vg) and scan electrode voltage (-Vg), and 11B is a line-sequential line-by-line connection of the TFTs 103 of each picture element. 119 is a vertical scanning circuit that outputs a driving signal; 119 is a liquid crystal driving signal input terminal that inputs a liquid crystal driving signal whose polarity is inverted from a video signal every vertical scanning period in order to AC drive the liquid crystal; A clock CK input terminal 121 which inputs a clock CK for sampling indicates a horizontal scanning circuit that samples a liquid crystal drive signal using a clock CK and drives the liquid crystal drive signal line-sequentially every horizontal scanning period Th. The outputs of the horizontal scanning circuit 121 are in j columns from Yl to Yj, and the outputs of the vertical scanning circuit 118 are in i rows from Xl to Xi, so that the screen is composed of i rows and j columns.

FIGS. 6(a) to 6(n) show signal waveform diagrams of this conventional liquid crystal display device. Here, to simplify the diagram, it is assumed that a white raster is used for the video signal and that the voltage applied to the liquid crystal is ideally uniform within the screen. In the figure, Sv shown in (a) is a scanning start signal, fH shown in (■) is a horizontal synchronizing signal, G1 shown in (C) is a control signal that controls the scanning signal of an odd field, and G2 shown in (2) is an even numbered field. a control signal for controlling the scanning signal of the field, (e) ~
Vgate 1 to Vgate4 shown in (c) are scanning electrode signals in the scanning electrodes X1 to X4 rows, Vsig shown in (i) is a signal electrode signal output from the horizontal scanning circuit 121, and Vcom shown in (j) is the opposite Counter electrode signals supplied to the electrode 106, Vdl to Vd4 shown in (b) to (b)
1 and 2 respectively show picture element electrode signals in scanning electrodes x1 to x4 rows.

In the conventional liquid crystal display device configured as described above,
The operation will be explained below with reference to FIG. 5 and FIGS. 6(a) to (n).

In FIG. 5, when a liquid crystal drive signal is input to the horizontal scanning circuit 121, a signal electrode signal Vsig shown in FIG. 6(i) is supplied to each signal electrode 10B.

Then, a counter electrode signal Vcom shown in FIG. 6 0) is input to the counter electrode 106. In the vertical scanning circuit 118, the scanning start signal Sv input terminal 109 is connected to the scanning start signal Sv input terminal 109 as shown in FIG.
) to the horizontal synchronization signal fH input terminal 110, the horizontal synchronization signal fH shown in FIG. 6 (bl) to the control signal 01 input terminal 111, and the control signal G1 shown in FIG. The control signal G2 input terminal 112 is connected to the control signal shown in FIG.
The control signal G2 shown in (b) is inputted.

First, the X1st row of odd-numbered scanning electrodes will be described. In odd fields, the scanning electrode signal VgaLel shown in FIG. 6(e) having a pulse width of one horizontal scanning period Th is output. Then, scanning electrode x 1st row TPTI03
is in the on state, and the signal electrode signal V shown in FIG. 6 (1)
sig is supplied to the picture element electrode 105. After l horizontal scanning period Th, the TFT 103 in the first row of the scanning electrode will be retained. Then, in the odd field of the next frame, the scanning electrode signal Vga t e 1 shown in FIG. 6(e) having a pulse width of one horizontal scanning period Th is output again. Then, the TFT 103 of the scanning electrode X1st row
is in the on state, and the signal electrode signal V shown in FIG. 6 (1)
sig is supplied to the picture element electrode 105. After l horizontal scanning period Th, the TFT 103 in the first row of the scanning electrode will be retained. Here, the shaded portion is applied to the liquid crystal cell 104 as an effective value, and an image corresponding to this effective value is displayed. Thereafter, images are displayed using the odd-numbered scanning electrodes in the same manner.

Next, the scanning type 1iX second row of even-numbered rows will be described.

In an even field, the pulse width is one horizontal scanning period T
The scanning ti signal Vgate2 shown in FIG. 6(f) of h is output. Then, the TFT l 0 of the second row of scanning electrodes
3 is turned on, and the signal electrode signal Vsig shown in FIG.
The voltage is maintained as shown in the picture element electrode signal Vd2 shown in FIG. 6(1) for one frame period from the off state to the next on state. Then, in the even field of the next frame, the scanning electrode signal Vgate2 shown in FIG. 6(f) having a pulse width of one horizontal scanning period Th is output again. Then, the TFT 10 on the second row of scanning electrodes
3 is turned on, and the signal bridge signal Vsig shown in FIG. 6(i) is supplied to the picture element electrode 105. After l horizontal scanning period Th, the TFT 103 in the second row of scanning electrodes
The voltage is maintained as shown in the picture element electrode signal Vd2 shown in FIG. 6(1) for one frame period from the off state to the next on state. Here, the shaded portion is applied to the liquid crystal cell 104 as an effective value, and an image corresponding to this effective value is displayed. Thereafter, images are displayed using the even-numbered scanning electrodes in the same manner.In this way, the even-numbered scanning electrodes operate one field later than the odd-numbered scanning electrodes.

These steps are repeated to display the image on the entire screen.

Problems to be Solved by the Invention However, in the above configuration, the display of odd-numbered rows and the display of even-numbered rows are held for a period of one frame, and the image update timing is shifted by one field period. Therefore, when the image moves, unnaturalness occurs in the display of odd-numbered lines and even-numbered lines, resulting in a problem in that the image display quality is significantly degraded.

On the other hand, in order to solve these problems, conventional image processing such as increasing the driving frequency of the liquid crystal was carried out.
It's very complicated and expensive! It also had lH.

In view of the above, it is an object of the present invention to provide a compact and inexpensive liquid crystal display device that improves the image display quality of moving images.

Means for Solving the Problems The present invention has the following features: (1) A liquid crystal is sandwiched between two transparent substrates, and on the first transparent substrate, i scanning electrodes and j signal electrodes are arranged in i rows and j columns. A picture element consisting of a three-terminal switching element and a liquid crystal cell is configured at each intersection, and the drain electrode of the three-terminal switching element in each picture element is connected to the first electrode of the liquid crystal cell, and the gate electrode is scanned. A liquid crystal panel in which a source electrode is connected to the signal electrode, and a second electrode of the liquid crystal cell is connected to a counter electrode common to all picture elements on a second transparent substrate, the liquid crystal panel having one horizontal scanning period. 72 shift register circuits that shift signals every Th, i gate circuits that control the output period of the shift register circuits, and two types of scanning electrode voltages (+Vg) based on the outputs of the gate circuits. a vertical signal switching circuit for switching between and scan electrode voltage (-Vg); a horizontal scanning circuit for supplying a display signal Vsig for driving the liquid crystal; and a first control for controlling the display signal Vsig and the erase signal Vdel of the horizontal scanning circuit. a horizontal signal switching circuit switched by a signal Gdel, the output of each of the shift register circuits is connected to the first input of the gate circuit of the odd row, the first input of the gate circuit of the even row, and the second input of the gate circuit of the even row. A control signal G1 is connected to a second input of the gate circuit in the odd row, a third control signal G2 is connected to a second input of the gate circuit in the even row,
The control signal (, del is the output of the horizontal signal switching circuit within one horizontal scanning period Th. The signal supply period Tsig is the display signal Vsig, and the signal erasing period Tdel! is the erasing signal Vde.
The second control signal G1 is a signal that causes the output of the odd row of the vertical signal switching circuit to become the scan electrode voltage ('', Vg) during the signal supply period Tsig of the odd field, and The signal erasure period Td
el, the output of the even-numbered rows of the vertical signal switching circuit becomes the scanning electrode voltage (+Vg), and the third control signal G2 is the signal erase period Tdel! of the odd-numbered field.
, the output of the even-numbered scanning electrodes of the vertical signal switching circuit is a signal that becomes the scanning electrode voltage (+Vg), and the output of the even-numbered scanning electrodes of the vertical signal switching circuit is a signal that becomes the scanning electrode voltage (+Vg) in the signal supply period Tsig of the even-numbered field. Electrode voltage (
+Vg), and (2) a liquid crystal is sandwiched between two transparent substrates, with one scanning electrode and one signal electrode on the first transparent substrate. A picture element is arranged in i row and j column, and consists of two three-terminal switching elements and a liquid crystal cell at each intersection, and the drain electrode of the first three-terminal switching element in each picture element is connected to the liquid crystal cell. A gate electrode is connected to the first electrode, a source electrode is connected to the signal electrode, and a second electrode of the liquid crystal cell is connected to a counter electrode common to all picture elements on a second transparent substrate. , adjacent to a scanning electrode in which the drain electrode of the second three-terminal switching element in each picture element is connected to the first electrode of the liquid crystal cell, and the gate electrode of the first three-terminal switching element is connected to the first electrode of the liquid crystal cell. A liquid crystal panel in which a scanning electrode and a source electrode are respectively connected to the counter electrode, and includes (i) i/2 shift register circuits that shift signals every horizontal scanning period Th, and an output period of the shift register circuit. Two types of scan electrode voltages (+Vg) are generated depending on the i gate circuits to be controlled and the outputs of the gate circuits.
and (-Vg), and a horizontal scanning circuit that supplies a display signal Vsig for driving the liquid crystal. a first control signal C1 is connected to a second input of the gate circuit of the odd row, and a second control signal G2 is connected to the second input of the gate circuit of the even row. connected to a second input of the gate circuit, the first control signal G1 is a signal such that the output of the scan electrodes in odd rows of the vertical signal switching circuit becomes the scan electrode voltage (+Vg) only during odd field periods; The second control signal G2 is such that the output of the scan electrodes in the even rows of the vertical signal switching circuit is set to the scan electrode voltage (+
This is a liquid crystal display device having a signal of Vg).

Effect The present invention has the configuration (1) described above, so that the output of the horizontal signal switching circuit is controlled during the signal supply period Tsi within one horizontal scanning period Th.
g becomes the display signal Vsig, the signal erasing period Tdel becomes the erasing signal Vdel, and the output of the vertical signal switching circuit becomes the scanning electrode voltage (+Vg) during the signal supply period Tsig in the odd field of the scanning electrode of the odd row, and the scanning of the odd row In the even fields of the electrodes, the output of the vertical signal switching circuit becomes the scanning electrode voltage (+Vg) during the signal erasing period Tdef, and in the odd fields of the scanning electrodes in even rows, the output of the vertical signal switching circuit becomes the scanning electrode voltage (+Vg) during the signal erasing period TdeIl. (+Vg)
Therefore, in even fields of scan electrodes in even rows, the output of the vertical signal switching circuit becomes the scan electrode voltage (+Vg') during the signal supply period Tsig, and the image display is updated every field, so the image information of one field is displayed for only one field period, and high quality display can be obtained in moving image display without performing complicated image processing. Further, according to the configuration (2) described above, display signals are supplied to odd fields in the scanning electrodes of odd rows, and the signals are erased in even fields. Conversely, in the scanning electrodes of even-numbered rows, display signals are supplied to even-numbered fields, and signals are erased in odd-numbered fields.

Since the image display is updated for each field in this way, the image information for one field is displayed only during the I field period. High-quality display can be obtained in moving images without performing 1111 image processing, and their practical effects are great.

Embodiment FIG. 1 is a block diagram showing the configuration of a panel peripheral drive circuit of a liquid crystal display device in a first embodiment of the present invention.

An object of the present invention is to improve the image display quality of moving images using the same liquid crystal panel as the conventional one.

In FIG. 1, 101 is a liquid crystal panel, 102 is a configuration of one picture element, and 103 is a switching transistor (- thin film transistor made of amorphous silicon, etc. for boat fishing) that switches each picture element, hereinafter referred to as T'FT.
Film Tran-5istor), 1
04 is a liquid crystal cell, 105 is a picture element electrode connected to the drain electrode of TFT 103, 106 is a counter electrode common to all picture elements, 107 is a scanning electrode connected to gate electrode G of TFT 103, and 108 is a picture element electrode connected to the drain electrode of TFT 103. A signal electrode connected to the source electrode S, 109 is a scanning start signal S
110 is a horizontal synchronization signal fH input terminal to which horizontal synchronization signal fH is input, 111 is a control signal 01 input terminal that controls the signals of scan electrodes in odd rows, and 112 is a control signal 01 input terminal for controlling signals of scan electrodes in odd rows. 113 is a scan electrode voltage (+Vg) input terminal for inputting the scan electrode voltage (+Vg) for turning on the TFT 103; 114 is the TFT 103;
115 is a scan electrode voltage (-Vg,) input terminal for inputting the scan electrode voltage (-Vg) for turning off the i/
2 shift register circuits, 116 is i gate circuits, 1i/ is scan electrode voltage (+Vg) and scan electrode voltage (-
118 is a vertical scanning circuit that outputs a signal for line-sequentially driving the TFT 103 of each picture element; 119 is a vertical scanning circuit that inverts the polarity of the video signal every vertical scanning period in order to AC drive the liquid crystal. 120 is a clock CK input terminal for inputting a clock CK for sampling the liquid crystal drive signal; 121 is a clock CK input terminal for inputting the liquid crystal drive signal;
The horizontal scanning circuits that perform sampling and line-sequential driving every horizontal scanning period Th are shown. The configuration up to this point is the same as the block diagram of FIG. 6 showing the configuration of the panel peripheral drive circuit of a conventional liquid crystal display device. The difference from the conventional method is that a horizontal signal switching circuit 122 is provided at the output of the horizontal scanning circuit 121. The horizontal signal switching circuit 122 has a configuration of 12
3 is the control signal Gdej! The control signal Gdel input terminal 124 is an erase signal Vdel input terminal that inputs the erase signal VdeIl. The outputs of the horizontal signal switching circuit 122 are in j columns from Yl to Yj, and the outputs of the vertical scanning circuit 11B are in i rows from Xl to Xi, and the screen is composed of i rows and j columns.

2(a) to (0) show signal waveform diagrams of the liquid crystal display device in the first embodiment of the present invention. Here, to simplify the diagram, it is assumed that a white raster is used for the video signal and that the voltage applied to the liquid crystal is ideally uniform within the screen. In the figure, Sv shown in (a) is a scanning start signal, fH shown in (b) is a horizontal synchronization signal, and G1 shown in (C) has a cycle of 1 horizontal scanning period Th and a pulse width of an odd field, a signal supply period. Tsig, a control signal that controls the scanning electrode signal that becomes the signal erasure period Tdel in even fields; G2 shown in (b) has a period of one horizontal scanning period Th;
In a field where the pulse width is an odd number, the signal erasure period Tdel
, a control m signal that controls the scanning electrode signal that becomes the signal supply period Tsig in the even field, and V shown in (e) to (company).
gate tel~V gate 4 are scanning electrodes x1~x4
Vsig shown in (i) is a signal display signal output from the horizontal scanning circuit 121, Vcom shown in (j) is a counter electrode signal supplied to the counter electrode 106,
Vdl to Vd4 shown in (g) to (n) are the scanning electrodes X1 to
Picture element 1i scratch signal at X4, Gdej! shown in (0).
is a control signal that controls a signal electrode signal whose period is one horizontal scanning period Th and whose pulse width is the signal erasing period Tdel.)
Vdel shown in (j) is the counter electrode signal Vcom shown in (j)
This is the same signal as the erase signal for erasing the information written in the picture element (VS shown in the phrase is the horizontal signal switching circuit 122
The signal electrode signals output from each are shown.

In the liquid crystal display device according to the first embodiment of the present invention configured as described above, its operation will be described below for the first and second times.
This will be explained with reference to Figures (a) to (2).

In FIG. 1, a liquid crystal drive signal is input to the horizontal scanning circuit 121, and a control signal Gdej! shown in FIG. 2 (0) is input to the control signal Gdel input terminal. is input, and the erase signal Vdel shown in FIG. 2(P) is input to the erase signal Vdel input terminal. Then, each signal 1i8i1.0.8 is shown in Figure 2 (b).
A signal electrode signal Vs shown in is supplied. Then, a counter electrode signal Vcom shown in FIG. 2(j) is input to the counter electrode 106. In the vertical scanning circuit 118, the scanning start signal Sv shown in FIG.
0, the horizontal synchronizing signal fH shown in FIG. 2 (B) is applied to the control signal G1, and the control signal G shown in FIG. 2 (C) is applied to the input terminal 111.
1 and the control signal G2 shown in FIG. 2(A) are input to the control signal 02 input terminal 112, respectively.

First, the X1st row of odd-numbered scanning electrodes will be described. In an odd field, the pulse width is equal to the signal supply period T
The scanning electrode signal Vgatel shown in FIG. 2(e) of sig
is output. Then, scanning electrode x 1st row TFT10
3 is turned on, and the signal electrode signal Vs of the signal supply period Tsig shown in FIG. 2(i) is supplied to the picture element electrode 105. After the signal supply period Tsig, the TFT 103 in the Xi row of the scanning electrode turns off and maintains the voltage as shown in the pixel electrode signal Vdl shown in FIG. 2 until the next turn on. Become. Next, in the even field, the scanning electrode signal Vgatel shown in FIG. 2(e) whose pulse width is the signal erasing period Tdel is output. Then, the TFT 103 in the first row of scanning electrodes is turned on, and the signal erasing period Tdel shown in FIG. 2(i) begins.
The signal electrode signal Vs is supplied to the picture element electrode 105. This means that the picture element electrode 105 and the counter electrode 106 become electrically connected, and the image of the scan electrode X1 row is erased.

And signal erasure period Tdel! Thereafter, the TFT 103 in the XI row of the scanning electrode is turned off, and the voltage remains at zero until the next turn on, as shown in the picture element electrode signal Vdl shown in the second drawing. Here, the shaded portion is applied to the liquid crystal cell 104 as an effective value,
Information corresponding to this effective value will be displayed. Thereafter, information is displayed in the same manner using the odd-numbered scanning electrodes.

Next, the second row of even-numbered scanning electrodes will be described. In an even field, the pulse width is equal to the signal supply period Tsi
A scanning electrode signal Vgate2 shown in FIG. 2(f) in g is output. Then, the TFT 103 on the second row of scanning electrodes
is in the on state, and the signal supply period Ts shown in FIG.
The signal electrode signal Vs of ig is supplied to the picture element electrode 105. After the signal supply period Tsig, the TPT 103 in the second row of scanning electrodes turns off and maintains the voltage as shown in the pixel electrode signal Vd2 shown in FIG. 2 (1) until the next turn on. In the 0th order odd field, this time the pulse width is the second of the signal erasure period Tdel.
A scanning electrode signal Vgate2 shown in FIG. 5(f) is output. Then, the TFT 103 in the second row of the scanning electrode X is turned on, and the signal electrode signal VS of the signal erasing period Tdel shown in FIG. This means that the space between the two electrodes becomes conductive, and the image on the second row of scanning electrodes X is erased.

Then, after the signal erasing period Tdel, T of the second row of scanning amount IX
The voltage of the FT 103 remains zero as shown by the picture element electrode signal Vd2 shown in FIG. 2(1) during the period from when the FT 103 is turned off to when it is next turned on. Here, the shaded portion is applied to the liquid crystal cell 104 as an effective value, and information corresponding to this effective value is displayed. Thereafter, images are displayed in the same manner using the even-numbered scanning electrodes.In this way, the even-numbered scanning electrodes operate one field later than the odd-numbered scanning electrodes.

These steps are repeated to display the image on the entire screen.

As described above, according to this embodiment, with the same liquid crystal panel configuration as the conventional one, the signal erasing signal Vdefi is added to the display signal Vsig.
By adding and controlling the output of the vertical scanning circuit, the image information of the liquid crystal cell 104 is updated for each field, and the image information of one field is displayed only for the l field period, making it possible to perform complex image processing. High-quality display can be obtained in moving image display without the need for

FIG. 3 is a block diagram showing the configuration of a panel peripheral drive circuit of a liquid crystal display device according to a second embodiment of the present invention.

An object of the present invention is to improve the image display quality of moving images using the same drive circuit as the conventional one.

In FIG. 3, 301 indicates a TPT for short-circuiting the liquid crystal cell 104 of each picture element.

Components having the same configuration as in the first embodiment are denoted by the same numbers, and the description thereof will be omitted here.

FIGS. 4(a) to 4(b) show signal waveform diagrams of a liquid crystal display device according to a second embodiment of the present invention. Here, the first
As in the embodiment described above, in order to simplify the diagram, it is assumed that a white raster is used for the video signal and that the voltage applied to the liquid crystal is ideally uniform within the screen.

In the figure, Sv shown in (a) is a scanning start signal;
fH shown in (b) is a horizontal synchronization signal, G1 shown in (C) is a control signal, G2 shown in (b) is a control signal, Vgatel to Vgate4 shown in (e) to (c) are scanning electrodes X1 to
Scanning electrode signal at X4, Vsig shown in (i) is a display signal, Vcom shown in (j) is a counter electrode signal,
Vdl to Vd4 shown in to (b) indicate picture element electrode signals in the scanning electrodes X1 to X4, respectively.

The operation of the liquid crystal display device according to the second embodiment of the present invention configured as described above will be described below as shown in FIGS. 3 and 4.
This will be explained with reference to Figures (a) to (b).

In FIG. 3, a liquid crystal drive signal is input to a horizontal scanning circuit 121. Then, each signal electrode 10B has a shape shown in FIG. 4(i).
A signal electrode signal Vsig shown in is supplied. Then, the counter electrode signal Vcom shown in FIG. 4U) is applied to the counter electrode 106.
Enter. In the vertical scanning circuit 118, the scanning start signal Sv shown in FIG.
The horizontal synchronizing signal fH shown in Figure 4) is set to the control signal 0.
A control signal G1 shown in FIG. 4(C) is input to the 1 input terminal 111, and a control signal G2 shown in FIG. 4(B) is input to the control signal 02 input terminal 112.

First, the first row of odd-numbered scanning electrodes will be described. In odd fields, the scanning electrode signal Vgatel shown in FIG. 4(e) having a pulse width of one horizontal scanning period Th is output. Then, the first TFT on the first row of scanning electrodes
103 is turned on, and the signal electrode signal Vsig shown in FIG. 4(i) is supplied to the picture element electrode 105. and l
After the horizontal scanning period Th, the first TFT of the scanning electrode X1 row
Reference numeral 103 indicates the scan electrode X2 row in the 0th order even field where the voltage is maintained as shown in the picture element electrode signal Vdl shown in FIG. A scanning electrode signal Vgate2 shown in FIG. 4(f) having a pulse width of one horizontal scanning period Th is output. Then, the second TFT 301 of the scan electrode row XI
is turned on, and the liquid crystal cells 104 are short-circuited. Therefore, the image of the first row of scanning electrodes is erased. Then, the second TPT 301 in the XI row of scanning electrodes is turned off and the voltage remains in a zero state as shown in the picture element electrode signal Vdl shown in FIG. become. Here, the shaded portion is applied to the liquid crystal cell 104 as an effective value, and an image corresponding to this effective value is displayed. Thereafter, images are displayed using the odd-numbered scanning electrodes in the same manner.

Next, the second row of even-numbered scanning electrodes will be described. In an even field, the pulse width is one horizontal scanning period Th
A scanning electrode signal Vgate2 shown in FIG. 4(f) is output. Then, the first TFT 103 on the second row of scanning electrodes
is in the on state, and the signal electrode signal V shown in FIG. 4(i)
s is supplied to the picture element electrode 105. Then, after l horizontal scanning period Th, the first TPTI03 in the second row of scanning electrodes turns off and then turns on, as shown in FIG.
) In the primary odd field where the voltage is held like the picture element electrode signal Vd2 shown in
The scanning electrode signal Vgate3 shown in FIG. 4 (barrel) whose pulse width is one horizontal scanning period Th is output in the row. Then, the second TFT 301 in the second row of scanning electrodes X is turned on, and the gap between the liquid crystal cells 104 is turned on. Therefore, the image on the second row of scanning electrodes is erased.Then, after one horizontal scanning period Th, the second TFT 301 on the second row of scanning electrodes turns off and remains in the on state for the next period. The pixel shown in Figure 4 (ri) is held in a state where the voltage is zero like the seed signal Vd2.Here, the shaded part is applied to the liquid crystal cell 104 as an effective value, and the voltage is applied to the liquid crystal cell 104 according to this effective value. Thereafter, images are displayed using the scanning electrodes in even-numbered rows in the same manner.In this way, the scanning electrodes in even-numbered rows operate one field later than the operation in odd-numbered rows. These steps are repeated to display images on the screen.

As described above, according to this embodiment, by using the same drive circuit as the conventional one and providing the second TFT 301 that shorts both ends of the liquid crystal cell 104 in each picture element, the liquid crystal cell 104 is Image information can be updated,
Image information of one field is displayed for only one field period, and high quality display can be obtained in moving image display without performing complicated image processing.

Note that in the first embodiment, the horizontal signal switching circuit 121
Although a case has been described in which the erase signal Vdel inputted to the counter electrode 106 is the counter electrode signal Vcom supplied to the counter electrode 106, a signal other than the counter electrode signal Vcom may be used.

Further, in the first and second embodiments, driving using an active matrix panel has been described, but it goes without saying that this method can also be used for driving using a passive matrix panel.

As described in detail, according to the first embodiment of the present invention, it is possible to obtain high-quality display of moving images with the same liquid crystal panel configuration as before and without performing complicated image processing. .

Further, according to the second embodiment of the present invention, it is possible to obtain a high-quality display in a moving image display with the same drive circuit configuration as the conventional one without performing complicated image processing, and its practical effects are significant. .

[Brief explanation of the drawing]

The first part is a block diagram showing the configuration of a driving circuit of a liquid crystal display device according to the first embodiment of the present invention, FIG. 2 is an operation waveform diagram of the same embodiment, and FIG. FIG. 4 is a block diagram showing the configuration of the drive circuit of the liquid crystal display device according to the example. FIG. 4 is an operating waveform diagram of the same embodiment. FIG. The figure is an operational waveform diagram of the conventional device. 101...Liquid crystal panel, 102...Picture element, 103...TFT, 104...Liquid crystal cell, 105...Picture element electrode, 106...
...Counter electrode, 107...Scanning electrode, 108...
...Signal electrode, 109, old...Scanning start signal S
v input terminal, 110...Horizontal synchronization signal fH input terminal, 111...Control signal 01 input terminal, 11
2... Control signal 02 input terminal, 113...
...Scanning electrode voltage (+Vg) input terminal, 114...
...Scanning electrode voltage (-Vg) input terminal, 115...
...Shift register circuit, 116...Gate circuit, 1i/...Vertical signal switching circuit, 118...
...Vertical scanning circuit, 119...Liquid crystal drive signal input terminal, 120...Clock CK input terminal, 121...Horizontal scanning circuit, 122-...
・Horizontal signal switching circuit, 123...control signal C,
del input terminal, 124... Erasing signal Vdel
Input terminal.

Claims (3)

[Claims] (1) A liquid crystal is sandwiched between two transparent substrates, and on the first transparent substrate, i scanning electrodes and j signal electrodes are arranged in i rows and j columns, and a three-terminal switching element is placed at each intersection. A picture element is constituted by a liquid crystal cell, and a drain electrode of the three-terminal switching element in each picture element is connected to a first electrode of the liquid crystal cell, a gate electrode is connected to the scanning electrode, and a source electrode is connected to the signal electrode. and an i/ Two shift register circuits, i gate circuits that control output periods of the shift register circuits, and two types of scan electrode voltage (+Vg) and scan electrode voltage (-Vg) are switched by the output of the gate circuits. A vertical signal switching circuit, a horizontal scanning circuit that supplies a display signal Vsig for driving the liquid crystal, and a display signal Vsig and an erase signal V of the horizontal scanning circuit.
del is switched by a first control signal Gdel, and the output of each shift register circuit is connected to a first input of a gate circuit in an odd row and a first input of a gate circuit in an even row, respectively. and the second control signal G
1 is connected to the second input of the gate circuit in the odd row, a third control signal G2 is connected to the second input of the gate circuit in the even row, and the first control signal Gdel is connected to the horizontal signal Gdel. The signal supply period Tsig within one horizontal scanning period Th is equal to the signal erasure period Tdel when the output of the switching circuit is applied to the display signal Vsig.
is a signal that becomes the erase signal Vdel, and the second control signal G1 is a signal that causes the output of the odd row of the vertical signal switching circuit to become the scan electrode voltage (+Vg) during the signal supply period Tsig of the odd field, and in the even field. The output of the even-numbered rows of the vertical signal switching circuit becomes the scanning electrode voltage (+Vg) in the signal erasing period Tdel of the odd-numbered field, and the third control signal G2 is a signal that causes the vertical signal switching circuit to switch in the signal erasing period Tdel of the odd-numbered field. A signal in which the output of the even-numbered scanning electrodes of the circuit becomes the scanning electrode voltage (+Vg), and in the signal supply period Tsig of the even-numbered field, the output of the even-numbered scanning electrodes of the vertical signal switching circuit becomes the scanning electrode voltage (+Vg). A liquid crystal display device characterized in that the signal is as follows. (2) The liquid crystal display device according to claim (1), wherein the erasing signal Vdel input to the horizontal signal switching circuit is a counter electrode signal Vcom supplied to the counter electrode. (3) A liquid crystal is sandwiched between two transparent substrates, and on the first transparent substrate, i scanning electrodes and j signal electrodes are arranged in i rows and j columns, and two three-terminal switching electrodes are arranged at each intersection. A picture element is constituted by an element and a liquid crystal cell, and in each picture element, the drain electrode of the first three-terminal switching element is connected to the first electrode of the liquid crystal cell, the gate electrode is connected to the scanning electrode, and the source electrode is connected to the signal. a second electrode of the liquid crystal cell is connected to a counter electrode common to all picture elements on a second transparent substrate, and a drain electrode of a second three-terminal switching element in each picture element; In the liquid crystal panel, the gate electrode is connected to the first electrode of the liquid crystal cell, and the gate electrode of the first three-terminal switching element is connected to the scanning electrode, and the source electrode is connected to the scanning electrode adjacent to the scanning electrode and the counter electrode, respectively. There are i/2 shift register circuits that shift signals every horizontal scanning period Th, i gate circuits that control the output period of the shift register circuits, and two types of outputs depending on the output of the gate circuits. It has a vertical signal switching circuit that switches between scanning electrode voltages (+Vg) and (-Vg), and a horizontal scanning circuit that supplies a display signal Vsig for driving the liquid crystal, and outputs from each of the shift register circuits to the odd-numbered rows. and the first inputs of the even-numbered gate circuits, and the first control signal G
1 is connected to the second input of the gate circuit of the odd row, a second control signal G2 is connected to the second input of the gate circuit of the even row, and the first control signal G1 is connected to the second input of the gate circuit of the odd row. The second control signal G2 is a signal in which the output of the scanning electrodes in odd rows of the vertical switching circuit becomes the scanning electrode voltage (+Vg) only during a period, and the second control signal G2 is a signal that outputs the scanning electrodes on odd rows of the vertical signal switching circuit only during an even field period. A liquid crystal display device characterized in that the output of the electrode is a signal that corresponds to the scanning electrode voltage (+Vg).