JP3128965B2 - Active matrix liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display having pixels arranged in rows and columns.
More specifically, the present invention relates to a driving technique for stabilizing a pixel potential when rewriting an image signal for each row.

[0002]

2. Description of the Related Art A general structure of a conventional active matrix liquid crystal display device will be briefly described with reference to FIG. The plurality of gate lines 101 and the plurality of signal lines 102 are arranged so as to be orthogonal to each other. A liquid crystal pixel 103 is formed at each intersection. Each pixel 103 includes a liquid crystal cell LC, a storage capacitor CS, and a pixel transistor 104. The liquid crystal cell is composed of liquid crystal sandwiched between a common counter electrode and individual pixel electrodes. A constant voltage Vcom is applied to the counter electrode. The gate line of the pixel transistor 104 is connected to the gate line 101, the drain electrode is connected to the signal line 102, and the source electrode is connected to the pixel electrode of the corresponding liquid crystal cell. The pixel transistor 104 has the gate line 1
When selected via 01, an image signal is sampled from the signal line 102 to drive the liquid crystal cell LC. The liquid crystal pixels 103 are line-sequentially selected for each row. An image signal is written to the pixels of each selected row, for example, in dot sequence.

In general, AC driving is performed to prevent the deterioration of the liquid crystal. This is performed by inverting the amplitude of the image signal between positive and negative with respect to the potential Vcom of the counter electrode. There are two types of polarity inversion: 1F inversion performed every field and 1H inversion performed every row. Since 1F inversion has a problem that flicker occurs, 1H inversion is often adopted in general.

[0004]

FIG. 7 is a timing chart of the 1H inversion drive. Pixel selection for each row is controlled according to the horizontal synchronization signal HD. The polarity inversion of the image signal is performed according to the cycle of the horizontal synchronization signal. For example, (j-
1) When a positive image signal is written to the pixels in the row, a negative image signal is written to the pixels in the next j-th row. When the horizontal start signal HST is input to the shift register of the horizontal drive circuit in a state where the pixel on the j-th row is selected, the image signal is sequentially written to the pixel on the j-th row via each signal line.

The writing time assigned to one pixel is Δ
It is represented by T and is extremely short. When an image signal is written to each pixel in the 1H inversion driving, when a positive image signal Vcom + V is written during the previous selection period, a negative image signal Vcom-V is written in this selection. However, since the previous image signal Vcom + V is held in the pixel, Vcom−
In order to write V, it is necessary to charge the pixel with 2V of charge. However, since the writing time allocated to each pixel is extremely short, insufficient charging occurs and a predetermined image signal level cannot be obtained, so that a voltage shift ΔV occurs and image non-uniformity such as a bright spot defect and display unevenness occurs. was there.

[0006]

SUMMARY OF THE INVENTION In view of the above-mentioned problems in the prior art, the present invention aims to stabilize the writing operation of an image signal when performing polarity inversion driving of a dot-sequential driving type active matrix liquid crystal display device. Aim. The following measures were taken to achieve this purpose. That is, the active matrix liquid crystal display device according to the present invention includes, as basic components, one substrate in which signal lines and gate lines are arranged in a matrix and each pixel has a pixel electrode and a pixel transistor driving the pixel electrode at each intersection. And a second substrate having a counter electrode and opposed to the one substrate, and a liquid crystal layer held on both substrates. As a characteristic feature of the present invention, a means for connecting a discharge element for adjusting a potential to a predetermined potential before rewriting a potential of an image signal held in a pixel electrode of each row to each signal line is taken. Further
In addition, the potential of the signal line varies depending on the inversion of the image signal.
Means for switching to a two-level predetermined potential is provided by the discharging element
Connected to child.

[0007]

According to the present invention, for example, after an image signal is written to the pixel electrode of the (j-1) th row, the pixel of the jth row is passed through a signal line immediately before the image signal is written to the pixel electrode of the jth row. The previous charge held on the electrode is discharged by the discharging element. Note that this discharging element can be constituted by, for example, a thin film transistor, similarly to the pixel transistor. This discharge the potential of the pixel electrode a predetermined
The potential is adjusted to be the same as the potential. Therefore, the conventional 2V
According to the present invention, it is necessary to charge a charge corresponding to a value obtained by subtracting a predetermined potential, and a bright spot defect and a non-uniformity defect due to insufficient writing are required. Can be improved. In particular, by further switching the adjustment potential appropriately according to the polarity inversion , further writing is performed.
Improving efficiency.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a schematic block diagram showing a basic configuration of an active matrix liquid crystal display device according to the present invention. This device has a structure in which n gate lines 1 and m signal lines 2 are orthogonally arranged. Liquid crystal pixels 3 are formed at intersections of the gate lines 1 and the signal lines 2, and are integrated in a matrix as a whole to form a display screen. Each liquid crystal pixel 3 includes a liquid crystal cell LC, a storage capacitor CS, and a pixel transistor 4. The liquid crystal cell LC is composed of liquid crystal held between a common counter electrode and individual pixel electrodes. The pixel electrode is formed on the inner surface of one substrate, and the counter electrode is formed on the inner surface of the other substrate. The gate electrode of the pixel transistor 4 is connected to the gate line 1, the drain electrode is connected to the signal line 2, and the source electrode is connected to the corresponding pixel electrode of the liquid crystal pixel 3. The pixel transistor 4 is, for example, a thin film transistor made of a polycrystalline silicon thin film.

The n gate lines 1 are connected to a vertical shift register 5 constituting a vertical drive circuit. The vertical shift register 5 has a pair of clock signals VCK1 and VCK.
Driven by CK2, the n gate lines 1 are selectively scanned sequentially in response to the vertical start signal VST. Pixel transistor 4 connected to selectively scanned signal line 2
Are conducted, and the liquid crystal pixels 3 belonging to the row are simultaneously selected.

On the other hand, the m signal lines 2 are connected to the image signal lines via the corresponding horizontal switches HSW. For example, an RGB color image signal is supplied to this image signal line. The horizontal switch HSW connected to each signal line 2 is switched and driven by a horizontal shift register 6 constituting a horizontal drive circuit. The horizontal shift register 6 operates according to a pair of horizontal clock signals HCK1 and HCK2, and sequentially shifts to H in response to a horizontal start signal HST.
Switch and select SW. Horizontal switches H sequentially turned on
The image signal is sampled on each signal line 2 via the SW, and the pixel transistor 4 is supplied to the liquid crystal pixel 3 on the selected row.
Written through. The transistor group forming the horizontal switch HSW, the horizontal shift register 6, or the vertical shift register 5 is also formed of a thin film transistor such as polycrystalline silicon, like the pixel transistor 4.

As a feature of the present invention, each signal line 2
Is connected to a discharging element such as a discharging transistor 7. The gate electrodes of the discharging transistors 7 are commonly connected and perform switching in response to a control signal VS. The drain electrode of each discharge transistor 7 is connected to the corresponding signal line 2, and its source electrode is commonly connected to the counter electrode. Each discharge transistor 7 is for discharging the electric charge accumulated in the liquid crystal pixel 3 of the selected row via the corresponding signal line 2 and resetting it to the common electrode potential Vcom.
The discharge transistor 7 may be equivalent to, for example, a transistor constituting the horizontal switch HSW, and can be formed as a thin film transistor at the same time when the HSW is formed.

Next, the operation of the active matrix liquid crystal display device according to the present invention will be described in detail with reference to FIGS. 2, 3 and 4. First, FIG. 2 is a timing chart for explaining the operation of the vertical shift register shown in FIG. The vertical shift register performs line-sequential scanning of the gate line for each field according to the vertical synchronization signal VD. The vertical shift register 5 sequentially supplies gate signals to gate lines in response to a vertical start signal VST input after the generation of the vertical synchronization signal VD. The vertical shift register operates in response to the pair of vertical clock signals VCK1 and VCK2, and accesses the first to n-th gate lines in a line-sequential manner. In this embodiment, 1H inversion driving is performed.
Accordingly, the polarity of the image signal is inverted in accordance with the line-sequential selection of the gate line.

FIG. 3 is a timing chart for explaining the operation of the horizontal shift register shown in FIG. The horizontal shift register 6 controls image writing to the liquid crystal pixels of the selected row according to the horizontal synchronization signal HD. In this example, writing to each row is not performed all at once, but is performed sequentially for each pixel. After the horizontal synchronizing signal HD is generated, the horizontal start signal HST is input to the horizontal shift register 6 to start the operation. The horizontal shift register 6 is driven in accordance with the pair of horizontal clock signals HCK1 and HCK2, sequentially turns on the horizontal switches HSW, and samples the image signals on the first to mth signal lines. At this time, since 1H inversion is performed, for example, (j−
1) When a positive polarity image signal is written in the row,
A negative-polarity image signal is written to the current j-th row.

As a feature of the present invention, the control signal VS is generated according to a horizontal cycle. As shown in FIG. 3, the pulse of the control signal VS is output immediately after the pulse of the horizontal synchronization signal HD is generated and immediately before the pulse of the horizontal start signal HST is generated. In other words, for example, immediately after the pixel on the j-th row is selected and immediately before writing to the pixel is started, a pulse of the control signal VS is generated. Therefore, when the pulse of the control signal VS is generated, each signal line is electrically connected to the pixel electrode via the corresponding pixel transistor, but the image signal is not yet supplied for sampling.

FIG. 4 is a timing chart for explaining the operation of each discharge transistor. In this timing chart, V is applied to pixels in the preceding row (j-1).
com + V image signal is written, and a polarity-inverted Vcom-V image signal is written to the pixel on the j-th row in the stage. As described above, when the pulse of the control signal VS is generated, the pixel in the j-th row has already been selected. Therefore, the electric charge held in each pixel is discharged to the counter electrode side through all the signal lines by the simultaneous conduction of the discharge transistors. Therefore, the image signal level is V
com + V is quickly reset to the common electrode potential Vcom. After that, the image signals whose polarities are sequentially inverted are sampled on each signal line. It is sufficient to charge the electric charge corresponding to -V during the writing time ΔT assigned to one pixel. Since the charge amount is halved compared to the conventional case, sufficient writing can be performed, and the voltage shift ΔV becomes substantially zero.

FIG. 5 is a schematic block diagram showing an embodiment of the active matrix liquid crystal display device according to the present invention. Basically, it has the same configuration as that of FIG. 1, and corresponding portions are denoted by corresponding reference numerals or reference numerals for easy understanding. The difference from FIG. 1 is that the source electrode of the discharging transistor 7 is not connected to the opposite electrode but is selectively connected to two different levels of constant potential lines via a common changeover switch SW. Is the thing. The two different potential levels are, for example, Vc
om + V / 2 and Vcom-V / 2.
The changeover switch SW is alternately driven in accordance with the polarity inversion. For example, when a positive image signal is written in the (j-1) th row, the voltage is switched to the Vcom + V / 2 side. When a negative image signal is written in the jth row, the connection is made to the Vcom-V / 2 side. Is done. In this case,
Immediately before the writing operation of the j-th row is started, the potential of each pixel is reset to Vcom-V / 2. Therefore, the electric charge charged to each pixel only needs to be equivalent to V / 2 at the maximum, and the writing efficiency can be further improved.

[0017]

As described above, according to the present invention, in an active matrix liquid crystal display device, an additional discharging transistor is connected to each signal line separately from a horizontal switching transistor for sampling an image signal. Immediately before the writing operation of each row, the signal charges once held in the pixels of the row are discharged. Immediately
Immediately before writing the image signal, the potential of the signal line is reset to two different potentials in accordance with the polarity inversion .
Therefore, when writing the image signal of which polarity is inverted to the pixel, it is sufficient to charge the charge of about V / 2 of the charge amount required conventionally, and it is possible to improve the bright spot defect and the unevenness defect due to insufficient writing. There is an effect that a uniform display screen can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram illustrating the concept of an active matrix liquid crystal display device according to the present invention.

FIG. 2 is a timing chart for explaining an operation of a vertical shift register included in the device shown in FIG.

FIG. 3 is a timing chart for explaining the operation of the horizontal shift register.

FIG. 4 is a timing chart for explaining the operation of the discharging transistor.

FIG. 5 is a schematic block diagram showing an embodiment of an active matrix liquid crystal display device according to the present invention.

FIG. 6 is a block diagram showing a general configuration of a conventional active matrix liquid crystal display device.

FIG. 7 is a timing chart for explaining a problem of a conventional active matrix liquid crystal display device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Gate line 2 Signal line 3 Liquid crystal pixel 4 Pixel transistor 5 Vertical shift register 6 Horizontal shift register 7 Discharge transistor LC Liquid crystal cell Vcom Counter electrode potential VS Control signal

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/133 550 G02F 1/1368 G09G 3/36

Claims (4)

(57) [Claims] 1. A signal line and a gate line are arranged in a matrix, and one substrate having a pixel electrode and a pixel transistor for driving the pixel electrode at each intersection, and a counter electrode having a counter electrode and being arranged opposite to the one substrate. In the dot-sequential drive type active matrix liquid crystal display device having the other substrate and the liquid crystal layer held on both substrates, the potential of the image signal held in the pixel electrode of each row is rewritten. Before connecting a discharging element for adjusting to a predetermined potential to each signal line, the potential of the signal line is changed according to the inversion of the image signal.
Means for switching between two different levels of the predetermined potential is provided by the
An active matrix liquid crystal display device characterized by being connected to a power element . 2. The active matrix according to claim 1, wherein said pixel transistor is a thin film transistor made of a polycrystalline semiconductor film, and a horizontal drive circuit and a vertical drive circuit are formed on said one substrate. Liquid crystal display. 3. The liquid crystal display device according to claim 2, wherein said discharging element is also formed of a thin film transistor. 4. A signal line and a gate line are arranged in a matrix, one substrate having a pixel electrode and a pixel transistor for driving the pixel electrode at each intersection, and a counter electrode having a counter electrode and being arranged to face the one substrate. In the dot-sequential drive type active matrix liquid crystal display device having the other substrate and the liquid crystal layer held on both substrates, wherein the (j-1) th row of pixel electrodes After writing the image signal,
The previous charge held in the pixel electrode of the j-th row is discharged through the signal line immediately before writing the image signal to the pixel electrode of the j-th row , and the signal line is inverted in accordance with the inversion of the image signal.
A method for driving an active matrix liquid crystal display device, characterized in that a potential is switched between two different potentials .