JPH04299855A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce the area occupied by two diodes for electrostaticbreakdown preventing use and to enhance an integration density by a method wherein the two diodes connected individually to a corresponding power supply and to a corresponding substrate are formed inside the same region. CONSTITUTION:A buried layer 2 of an opposite conductivity type is formed in one main face of a semiconductor substrate 1 of one conductivity type; a buried layer 13 of one conductivity type is formed at the inside of the buried layer 2 of the opposite conductivity type; an epitaxial layer 3 of the opposite conductivity type is formed on the whole surface. A ring-shaped insulating isolation layer 4, of one conductivity type, which reaches the buried layer 13 of one conductivity type from the surface of the epitaxial layer 3 of the opposite conductivity type and which is connected to an internal circuit and to a bonding pad 10 is formed; a diffusion layer 6, of the opposite conductivity type, which is connected to a power-supply circuit is formed at the inside of the insulating isolation layer 4 of one conductivity type on the surface of said epitaxial layer 3 of the opposite conductivity type. In addition, a diffusion layer 6 which comes into contact with the outside of the insulating isolation layer 4 of one conductivity type on the surface of said epitaxial layer 3 of the opposite conductivity type and which is connected to the internal circuit and the bonding pad 10 is formed.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic breakdown protection diode for semiconductor integrated circuits.

0002

2. Description of the Related Art A conventional protection diode for preventing electrostatic damage will be explained with reference to FIGS. 3(a) and 3(b).

A heavily doped N-type buried layer 2 is formed in a P-type semiconductor substrate 1, and an N-type epitaxial layer 3 is grown thereon.

A P-type insulating isolation layer 4 reaching the P-type semiconductor substrate 1 is formed, and a high concentration P-type diffusion layer 5 and a high concentration N-type diffusion layer 6 are formed.

For the power supply, the transistor collector 6
- Using a CB diode 11 consisting of a 5-base junction,
For the substrate, there is a high concentration N type buried layer 2 and a P type semiconductor substrate 1.
A C-Sub diode 12 consisting of a junction between the two diodes was used to protect against electrostatic discharge damage.

[0006]

Conventionally, protection diodes are connected to the power source (CB diode) and the substrate (C-Sub diode), respectively. Therefore, as the number of bonding pads connecting protection diodes increases,
The ratio of protection diodes to the chip area of semiconductor integrated circuits is increasing.

[0007] This trend has become more and more pronounced with the advancement of high integration and bonding technology.

Conventionally, protection diodes have been placed in gaps between adjacent bonding pads. Recently, due to advances in bonding technology, the spacing between bonding pads has become narrower.
The protection diode must be placed inside the bonding pad (inner periphery of the chip).

[0009]

[Means for Solving the Problems] A semiconductor device of the present invention includes:
A buried layer of opposite conductivity type is formed on one main surface of a semiconductor substrate of one conductivity type, a buried layer of one conductivity type is formed inside the buried layer of opposite conductivity type, and an epitaxial layer of one conductivity type is formed on the entire surface. , a ring-shaped insulating isolation layer of one conductivity type is formed from the surface of the opposite conductivity type epitaxial layer to the one conductivity type buried layer and connected to the internal circuit and the bonding pad; A reverse conductivity type diffusion layer connected to the power supply circuit is formed inside the one conductivity type insulating separation layer,
A reverse conductivity type diffusion layer is formed on the surface of the reverse conductivity type epitaxial layer in contact with the outside of the one conductivity type insulating separation layer and connected to an internal circuit and a bonding pad.

0010

[Example] An example of the present invention is shown in FIGS. 1(a) and (
b) and FIGS. 2(a) to 2(d).

This protection diode is shown in FIGS. 1(a) and (b).
As shown in FIG.
The electrode of the opening 8 that couples the mold diffusion layer 6 is connected to a bonding pad 10 and an internal circuit. An electrode formed in the opening 9 of the inner heavily doped N-type diffusion layer 6 is connected to a power supply line.

Next, an embodiment of the present invention will be explained in the order of manufacturing steps.

First, as shown in FIG. 2(a), a heavily doped N-type buried layer 2 is formed in a P-type semiconductor substrate 1 by a diffusion technique.

Next, as shown in FIG. 2(b), high concentration N
A high concentration P-type buried layer 1 is formed inside the type buried layer 2 by diffusion technology.
form 3.

Next, as shown in FIG. 2C, an N-type epitaxial layer 3 is grown on the P-type semiconductor substrate 1, and the outer periphery of the heavily doped P-type buried layer 13 and the heavily doped N-type buried layer 2 are grown. A highly doped P-type insulating isolation layer 4 is formed on the outside of the wafer. Next 1200
℃ high-temperature heat treatment, the high concentration P-type buried layer 13 or P
The high concentration P type buried layer 13 is pushed in and diffused until it reaches the type semiconductor substrate 1.

Next, as shown in FIG. 2(d), high concentration N
A mold diffusion layer 6 is formed, and electrodes connected to the openings 7, 8, and 9 are formed.

[0017]

[Effects of the Invention] Two electrostatic breakdown protection diodes, which were conventionally formed independently, can now be formed in the same area. By reducing the area occupied by the diode, it was possible to improve the degree of integration of the semiconductor integrated circuit.

[Brief explanation of drawings]

FIG. 1 is a plan view and a sectional view showing an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing an embodiment of the present invention in the order of steps.

FIG. 3 is a plan view and a cross-sectional view of an electrostatic discharge protection diode according to the prior art.

[Explanation of symbols]

1 P-type semiconductor substrate 2 High concentration N-type buried layer 3 N-type epitaxial layer 4 High concentration P-type insulation separation layer 5 Highly concentrated P-type diffusion layer 6 Highly concentrated N-type diffusion layer 7 Board contact 8,9 Opening 10 Bonding pad 11 CB diode 12 C-Sub diode 13 High concentration P-type buried layer

Claims (1)

[Claims] Claim 1: A buried layer of opposite conductivity type is formed on one main surface of a semiconductor substrate of one conductivity type, a buried layer of one conductivity type is formed inside the buried layer of opposite conductivity type, and a buried layer of one conductivity type is formed on the entire surface. An epitaxial layer is formed, and a ring-shaped insulating separation layer of one conductivity type is formed that reaches from the surface of the opposite conductivity type epitaxial layer to the one conductivity type buried layer and is connected to an internal circuit and a bonding pad; A reverse conductivity type diffusion layer connected to a power supply circuit is formed inside the one conductivity type insulation separation layer on the surface of the epitaxial layer, and a reverse conductivity type diffusion layer connected to the outside of the one conductivity type insulation separation layer on the surface of the opposite conductivity type epitaxial layer is formed inside the one conductivity type insulation separation layer. A semiconductor integrated circuit in which a reverse conductivity type diffusion layer is formed which is connected to a circuit and a bonding pad.