JPH04291986A - Sealing type circuit board - Google Patents

Abstract

PURPOSE:To prevent any through-hole and any pin hole in the vicinity of a terminal from being produced by forming an upper layer land on a parts land connected with a terminal of FP type electronic parts to widen a gap between the bottom surface of the electronic parts and an insulating board surface. CONSTITUTION:Parts lands 16a, 16b are formed on the upper surface of an insulating board 11 at a location where a terminal 15 of an FP type IC 14 is fixed. Upper layer lands 17a, 17b are formed on the parts lands 16a, 16b, respectively. In consequence, there is widened a gap between the FP type IC 14 and the insulating board 11, and upon resin molding air can easily escape, the air remaining in a gap between the bottom surface of the FP type IC 14 and the insulating board 11 or in a gap between the terminal 15 and the insulating board 11. Hereby, any through-hole 13 and any pin hole in the vicinity of the terminal 15 are prevented from being produced upon the resin molding being cured.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a sealed circuit board.
In particular, improvements have been made to the lands where the terminals of FP type electronic components are fixed.

0002

2. Description of the Related Art Conventionally, a structure shown in FIG. 3, for example, is known as an FP type circuit board. 1 in the figure is an insulating substrate. A through hole 3 is provided at a position corresponding to the lower part of the electronic component described below on the insulating substrate 1 to connect the lands 2 on the upper and lower surfaces of the substrate. A component land 6 is provided on the upper surface of the insulating substrate 1 at a location where the terminal 5 of the electronic component 4 is fixed.
a, 6b are formed. Further, although not shown, a conductor pattern is formed on the insulating substrate. This conductor pattern and the component land are both first-layer conductors.

By the way, according to the circuit board having such a structure, since both the conductor pattern and the component lands 6a and 6b are conductors of the first layer, when these are formed by printing, there is no misalignment and high density is achieved. wiring can be done.

0004

[Problems to be Solved by the Invention] However, in the conventional FP type circuit board, since the distance between the FP type electronic component 4 and the insulating substrate 1 is narrow, resin molding is performed as shown in FIG. When forming the container 7, air accumulated in the gap between the bottom of the electronic component 4 and the insulating substrate 1 and the gap between the terminal and the insulating substrate 1 is difficult to escape, and pinholes 8 are generated near the through holes 3 and the terminals 5 during curing. There is a problem.

The present invention has been made in view of the above circumstances, and by forming an upper layer land on the component land connected to the terminal of the FP type electronic component, the distance between the electronic component and the insulating substrate is widened. An object of the present invention is to provide a sealed circuit board that allows air to easily escape between an electronic component and an insulating board during resin molding, and can avoid pinholes.

[0006]

[Means for Solving the Problems] The present invention provides an insulating substrate;
The insulating substrate includes an FP type electronic component mounted on the insulating substrate, a component land formed at a terminal fixing location of the electronic component on the main surface of the insulating substrate, and an upper layer land formed on the component land. This is a sealed circuit board with special features.

[0007]

[Operation] In the present invention, by forming an upper layer land on the component land connected to the terminal of the FP type electronic component,
Increase the gap between the electronic component and the insulating substrate, specifically the gap between the bottom of the electronic component and the surface of the insulating substrate, or the gap between the terminal and the surface of the insulating substrate, to allow air to escape between the electronic component and the insulating substrate during resin molding. This makes it possible to avoid the occurrence of through holes and pinholes near the terminals.

[0008]

Embodiment FIG. 1 is a sectional view of a sealed circuit board according to an embodiment of the present invention. 11 in the figure is an insulating substrate. At a position corresponding to the lower part of the electronic component described later on this insulating substrate 1, there is a through hole 1 that connects the lands 12 on the upper and lower surfaces of the substrate.
3 is provided. At the location where the terminal 15 of the electronic component (FP type IC) 14 is fixed on the upper surface of the insulating substrate 11,
Component lands 16a and 16b are formed. Upper lands 17 of the second layer are provided on the component lands 16a and 1b, respectively.
a, 17b are formed. Further, although not shown, a conductor pattern, which is a first layer conductor, is formed on the insulating substrate as well as the component land.

In the circuit board having such a configuration, the first layer conductors such as the lands 12, component lands 16a and 16b, and conductor patterns on the insulating substrate 11 are simultaneously formed by printing, and then the upper layer lands, which are the second layer conductors, are formed simultaneously by printing. 17a,
17b is formed by printing.

[0010]The above sealed circuit board is of FP type I.
A component land 1 is placed on the insulating substrate 11 to which the terminal 15 of C is fixed.
6a, 16b, and further these component lands 16a.
, 16b, respectively, to form a two-layer structure, the distance between the FP type IC and the insulating substrate 11 can be made wider than in the past. However,
As shown in FIG. 2, when resin molding is performed to form the envelope 18, air trapped in the gap between the bottom surface of the FP IC and the insulating substrate 11, or the gap between the terminal 15 and the insulating substrate 11 is likely to come out and harden. The occurrence of pinholes near the through holes 13 and terminals 15 can be avoided. Furthermore, since the conductor pattern and the component lands 16a, 16b are both first-layer conductors, when they are formed by printing, high-density wiring can be achieved without any misalignment.

[0011] In the above embodiment, a case was described in which a through hole was provided in the insulating substrate below the FP type IC, but the invention is not limited to this, and even in the case of an insulating substrate without a through hole as described above, It is possible to prevent pinholes from occurring near the terminals of the FP IC.

0012

[Effects of the Invention] As detailed above, according to the present invention, the FP
By forming an upper layer land on the component land that connects to the terminal of the molded electronic component, the distance between the electronic component and the insulating substrate is widened, thereby making it easier for air to escape between the electronic component and the insulating substrate during resin molding. Therefore, it is possible to provide a sealed circuit board that can avoid the occurrence of pinholes near through holes and terminals.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of an FP type circuit board according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor device in which the circuit board of FIG. 1 is sealed with resin.

FIG. 3 is a cross-sectional view of a conventional FP type circuit board.

FIG. 4 is a cross-sectional view of a semiconductor device in which the circuit board of FIG. 3 is sealed with resin.

[Explanation of symbols]

11...Insulating substrate, 13...Through hole, 14...FP type IC
, 15...Terminal, 16a, 16b...Component land, 17a,
17b...Upper land, 18...Envelope.

Claims (1)

[Claims] 1. An insulating substrate, an FP type electronic component mounted on the insulating substrate, a component land formed at a terminal fixing location of the electronic component on the main surface of the insulating substrate, and a component land formed on the component land. What is claimed is: 1. A sealed circuit board comprising: an upper layer land;