JPH04287365A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To manufacture a semiconductor device of high reliability with high yield. CONSTITUTION:When SiN films 13, 17, 33, 35 as the capacitor insulating film of a DRAM and the stopper at the time of wet etching and polycrystalline Si films 25, 31, 32, 34 being conductor films are formed by low pressure CVD, these films are deposited also on the rear side of an Si substrate 21. After these films on the rear side are eliminated by etching or grinding, annealing in a hydrogen atmosphere is performed in order to recover interface level.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a film for preventing hydrogen from entering is provided on the element formation surface of a semiconductor substrate.

0002

2. Description of the Related Art FIG. 2 shows a stacked capacitor type DRAM with a folded bit line configuration in the manufacturing process. In a DRAM, a memory cell is composed of a transistor 11 and a capacitor 12, and a SiN film 13 formed by low pressure CVD is often used as a capacitor insulating film.

Furthermore, as shown in FIG. 2, the memory cell section 14
Although a multilayer conductive film is used in this embodiment, the number of conductive film layers in the peripheral circuit section 15 is small. Therefore, in order to reduce the level difference in the peripheral circuit section 15, the interlayer insulating film such as the BPSG film 16 is removed only in the peripheral circuit section 15 by wet etching. The SiN film 17 formed by low pressure CVD is also used as a stopper at this time.

Furthermore, SiN formed by low pressure CVD
Since the membrane is very dense, it is also used as an anti-fouling membrane.

[0005]

However, as is clear from FIG. 2, the SiN films 13 and 17 cover substantially the entire surface of the Si substrate 21. Moreover, since the SiN films 13 and 17 are formed by low pressure CVD, these SiN films 13,
17 also covers the back side of the Si substrate 21. On the other hand, the SiN films 13 and 17 formed by low-pressure CVD are very dense as described above, so they also prevent hydrogen from entering.

For this reason, the field oxide film SiO
Even if annealing is performed in a hydrogen atmosphere to recover the interface level between the Si substrate 21 and the SiO2 film 22 or the gate oxide film 23, this recovery is not sufficient.

As a result, although a PN junction is formed between the N+ diffusion layer 24, which is one of the source and drain of the transistor 11, and the P-type Si substrate 21, the S
A leakage current flows from the N+ diffusion layer 24 to the Si substrate 21 via the interface level between the iO2 film 22 and the Si substrate 21, deteriorating the data retention characteristics of the DRAM.

Furthermore, due to the level of the interface between the SiO2 film 23 and the Si substrate 21, the characteristics of the transistor 11, such as the VG-ID characteristics, vary from the designed values. Note that the above phenomenon occurs not only in DRAMs but also in general semiconductor devices. Therefore, with conventional methods, it has been impossible to manufacture highly reliable semiconductor devices with a high yield.

[0009]

[Means for Solving the Problems] A method for manufacturing a semiconductor device according to claim 1 provides that films 13, 17, 33 that prevent hydrogen from entering
, 35, the films 13, 17, 33, 3 attached to the side of the semiconductor substrate 21 opposite to the surface on which the elements 11, 12 are formed.
After removing the semiconductor substrate 21 by etching, the semiconductor substrate 21 is annealed in a hydrogen atmosphere.

[0010] In the method of manufacturing a semiconductor device according to claim 2, one of the films 13, 17, 33, and 35 for preventing hydrogen infiltration is attached to the surface of the semiconductor substrate 21 opposite to the surface on which the elements 11 and 12 are formed. After removing the films 13, 17, 33, and 35 by grinding, the semiconductor substrate 21 is annealed in a hydrogen atmosphere.

[0011]

[Operation] In the method for manufacturing a semiconductor device according to any one of claims 1 and 2, hydrogen is introduced from the surface of the semiconductor substrate 21 opposite to the surface on which the elements 11 and 12 are formed, and the structure of the film of the elements 11 and 12 is not changed in any way. The interfacial position can be fully recovered without causing any damage.

In the method for manufacturing a semiconductor device according to the first aspect, since the films 13, 17, 33, and 35 can also be removed in a clean room, contamination of the semiconductor substrate 21 is reduced.

In the method for manufacturing a semiconductor device according to the second aspect, since grinding of the surface of the semiconductor substrate 21 opposite to the surface on which the elements 11 and 12 are formed is generally performed as a pre-packaging process, the films 13 and 17 are , 33, 35 does not require any additional steps. Moreover, damage caused to the semiconductor substrate 21 by grinding can be recovered by subsequent annealing.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First and second embodiments of the present invention applied to the manufacture of a stacked capacitor type DRAM having a folded bit line configuration will be described below with reference to FIG.

In the first embodiment, as shown in FIG. 1(a),
An SiO2 film 22, which is a field oxide film, is formed on the surface of the element isolation region of the Si substrate 21, and an SiO2 film 23, which is a gate oxide film, is formed on the surface of the active region.

The first layer of polycrystalline Si film 25 doped with phosphorus is used to form word lines, that is, transistors 11
N gate electrodes, which are the source and drain of the transistor 11, are formed in the active region on both sides of the polycrystalline Si film 25.
+ Form diffusion layers 24 and 26. The polycrystalline Si film 25 is covered with a SiO2 film 27 which is an interlayer insulating film.

After that, the storage node of the capacitor 12 and the capacitor insulating film are formed by the second layer of polycrystalline Si film 31 doped with phosphorus, the SiN film 13, and the third layer of polycrystalline Si film 32 doped with phosphorus. and a counter electrode, respectively.

Next, the polycrystalline Si film 32 is covered with a SiN film 17 that serves as a wet etching stopper, and a BPSG film 16 that is an interlayer insulating film is formed on the SiN film 17. B
The PSG film 16 is removed by wet etching in the peripheral circuit section 15, as shown in FIG.

Thereafter, the BPSG film 16 is covered with a SiN film 33, and a bit line is formed using a fourth layer of polycrystalline Si film 34 doped with phosphorus. Furthermore, a polycrystalline Si film 3 is formed with an SiN film 35 that serves as a wet etching stopper.
A BPSG film 36, which is an interlayer insulating film, is formed on the SiN film 35 to cover the SiN film 4. This BPSG film 36 is also removed by wet etching in the peripheral circuit section 15.

Next, Al wiring 37 is formed on the BPSG film 36.
The Al wiring 37 is covered with a P-SiN film 38 which is a SiN film formed by plasma CVD. Therefore,
This P-SiN film 38 serves as a surface protection film.

By the way, also in this first embodiment, the polycrystalline Si films 25, 31, 32, 34 and the SiN films 13, 1
After forming the films 7, 33, and 35 by low pressure CVD, these films are also deposited on the back side of the Si substrate 21, as shown in FIG. 1(a).

Therefore, in this first embodiment, the Si substrate 2
By dry etching the back side of the Si substrate 21 while the front side of the Si substrate 1 is protected by covering it with a resist (not shown), SiN on the back side of the Si substrate 21 is removed, as shown in FIG. 1(b). Films 35, 33, 17, 13 and polycrystalline Si films 34, 32, 31, 25 are removed. Thereafter, annealing is performed in a hydrogen atmosphere to restore the above-mentioned interface position.

Dry etching on the back side of the Si substrate 21 may be performed immediately before annealing in a hydrogen atmosphere.
Each may be performed separately immediately after each film is deposited.

Note that in this first embodiment, the Si substrate 21
SiN film 35 to prevent hydrogen from entering on the back side of the
, 33, 17, and 13, but also the polycrystalline Si films 34, 32, 31, and 25 doped with phosphorus are removed. Therefore, these polycrystalline Si films 25, 31, 32,
It is also possible to prevent autodoping of phosphorus from 34 into the Si substrate 21.

Next, a second embodiment will be explained. In the second embodiment, a DRAM is manufactured by performing the same steps as in the first embodiment up to the state shown in FIG. 1(a). but,
In this second embodiment, SiN films 35, 33, 17, 13 on the back side of the Si substrate 21 and polycrystalline Si films 34, 32, 3
1 and 25 are removed by grinding rather than etching.

However, this grinding is not an additional process to the second embodiment, but is also used as a process generally performed to adjust the thickness of the Si substrate 21 during packaging. However, in this second embodiment, annealing in a hydrogen atmosphere is performed after this grinding in order to restore the above-mentioned interface position.

Note that in both the first and second embodiments described above, the SiN film 13 formed by low pressure CVD,
17, 33, and 35 are films that prevent hydrogen from entering. However, a polycrystalline Si film doped with phosphorus at a high concentration also has a gettering ability for hydrogen, so it can be used as a film that prevents hydrogen from entering.

Furthermore, both of the first and second embodiments described above are stacked capacitor type DRAMs having a folded bit line configuration.
The present invention is applied to the manufacture of other types of DRAMs, logic LSIs, etc.

[0029]

Effects of the Invention In the method for manufacturing a semiconductor device according to claim 1,
Since the interface level can be sufficiently restored without changing the structure of the film of the element, and there is little contamination of the semiconductor substrate, highly reliable semiconductor devices can be manufactured at a high yield.

In the method for manufacturing a semiconductor device according to claim 2, the interface level can be sufficiently recovered without changing the structure of the film of the element, and damage caused to the semiconductor substrate by grinding can also be recovered. Furthermore, since no additional process is required for film removal, highly reliable semiconductor devices can be manufactured with a high yield and with a small number of processes.

[Brief explanation of the drawing]

FIG. 1 is a side sectional view sequentially showing a first and second embodiment of the invention of the present application.

FIG. 2 is a side sectional view showing the prerequisites for the invention of the present application.

[Explanation of symbols]

11 Transistor 12 Capacitor 13 SiN film 17 SiN film 21 Si substrate 33 SiN film 35 SiN film

Claims (2)

[Claims] 1. A method for manufacturing a semiconductor device in which a film for preventing hydrogen from entering is provided on an element formation surface of a semiconductor substrate, after the film attached to the surface opposite to the element formation surface is removed by etching. A method for manufacturing a semiconductor device, comprising annealing the semiconductor substrate in a hydrogen atmosphere. 2. A method for manufacturing a semiconductor device in which a film that prevents hydrogen from entering is provided on an element formation surface of a semiconductor substrate, after the film attached to the surface opposite to the element formation surface is removed by grinding. A method for manufacturing a semiconductor device, comprising annealing the semiconductor substrate in a hydrogen atmosphere.