JP3419792B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device in which a film for preventing hydrogen from penetrating is provided on an element forming surface of a semiconductor substrate. 2. Description of the Related Art FIG. 2 shows a stacked capacitor type DRAM having a folded bit line configuration in a manufacturing process.
In a DRAM, a memory cell is composed of a transistor 11 and a capacitor 12, and a SiN film 13 formed by low-pressure CVD is often used as a capacitor insulating film. [0005] As shown in FIG.
Although a multilayer conductive film is used, the peripheral circuit portion 15 has a small number of conductive films. Therefore, in order to reduce the level difference in the peripheral circuit section 15, the interlayer insulating film such as the BPSG film 16 is removed by wet etching only in the peripheral circuit section 15. The SiN film 17 formed by low-pressure CVD is also used as a stopper at this time. Further, SiN formed by low pressure CVD
Since the film is very dense, it is also used as a pollution control film. [0007] However, as is apparent from FIG. 2, the SiN films 13 and 17 cover substantially the entire surface of the Si substrate 21. Moreover, since the SiN films 13 and 17 are formed by low pressure CVD, these SiN films 13 and 17
Reference numeral 17 also covers the back surface of the Si substrate 21. On the other hand, since the SiN films 13 and 17 formed by low-pressure CVD are very dense as described above, they also prevent intrusion of hydrogen. For this reason, the field oxide film of SiO
₂ film 22 and SiO ₂ film 23 as a gate oxide film
Even if annealing is performed in a hydrogen atmosphere in order to recover the interface state with the substrate 21, this recovery is not sufficiently performed. As a result, the N ⁺ diffusion layer 24, which is one of the source and the drain of the transistor 11, and the P-type Si substrate 2
Despite the fact that a PN junction is formed between
N through the interface level between the O ₂ film 22 and the Si substrate 21
⁺ Leakage current flows from diffusion layer 24 to Si substrate 21 and D
The data retention characteristics of the RAM deteriorate. Further, because of the interface凖位between the SiO ₂ film 23 and the Si substrate 21, the characteristics of V _G -I _D characteristic or the like of the transistor 11 varies from the design value. The above phenomenon occurs not only in DRAM but also in general semiconductor devices. Therefore, the conventional method cannot manufacture a highly reliable semiconductor device at a high yield. [0009] The method according to claim 1 Means for Solving the Problems] An element 11, 12 of the semiconductor substrate 21 is
Prevents intrusion of hydrogen on the formed surface of elements 11 and 12
Of semiconductor device provided with films 13, 17, 33, 35
In the fabrication method, the films 13, 17, 33, and 35 attached to the surface opposite to the surface on which the elements 11 and 12 are formed and the semiconductor substrate 21 are ground by grinding until the semiconductor substrate 21 has a desired thickness. Then, the semiconductor substrate 21 is annealed in a hydrogen atmosphere. In the method of manufacturing a semiconductor device according to the first aspect, hydrogen is introduced from the surface of the semiconductor substrate 21 opposite to the surface on which the elements 11 and 12 are formed, thereby changing the structure of the films of the elements 11 and 12 at all. The interface state can be sufficiently recovered without performing. The semiconductor substrate 21 has a desired thickness.
Since the grinding of the surface of the semiconductor substrate 21 opposite to the surface on which the elements 11 and 12 are formed is generally performed as a pre-process of packaging, additional grinding for removing the films 13, 17, 33 and 35 is performed. No process is required. In addition, damage caused to the semiconductor substrate 21 by grinding can be recovered by subsequent annealing. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a reference example and an embodiment of the present invention applied to the manufacture of a stacked capacitor type DRAM having a folded bit line configuration will be described with reference to FIG. In the reference example, as shown in FIG.
An SiO ₂ film 22 as a field oxide film is formed on the surface of an element isolation region of the substrate 21, and an SiO ₂ film 23 as a gate oxide film is formed on a surface of the active region. The word line, that is, the transistor 11 is formed by the first polycrystalline Si film 25 doped with phosphorus.
Is formed, and N and N, which are the source and drain of the transistor 11, are formed in the active regions on both sides of the polycrystalline Si film 25.
⁺ Diffusion layers 24 and 26 are formed. The polycrystalline Si film 25
It is covered with a SiO ₂ film 27 as an interlayer insulating film. Thereafter, the storage node of the capacitor 12 and the capacitor insulating film are formed by the phosphorus-doped second polycrystalline Si film 31, the SiN film 13, and the phosphorus-doped third polycrystalline Si film 32. And a counter electrode are respectively formed. Next, the polycrystalline Si film 32 is covered with a SiN film 17 serving as a wet etching stopper, and a BPSG film 16 as an interlayer insulating film is formed on the SiN film 17. B
The PSG film 16 is removed by wet etching in the peripheral circuit section 15 as shown in FIG. Thereafter, the BPSG film 16 is covered with a SiN film 33, and a bit line is formed by a fourth polycrystalline Si film 34 doped with phosphorus. Further, the polycrystalline Si film 3 is formed by the SiN film 35 serving as a wet etching stopper.
4 and a BPSG film 36 as an interlayer insulating film is formed on the SiN film 35. The BPSG film 36 is also removed in the peripheral circuit section 15 by wet etching. Next, an Al wiring 37 is formed on the BPSG film 36.
And the Al wiring 37 is covered with a P-SiN film 38 which is a SiN film formed by plasma CVD. Therefore,
This P-SiN film 38 is a surface protection film. Incidentally, also in this reference example, the polycrystalline Si films 25, 31, 32, 34 and the SiN films 13, 17,
After forming 33 and 35 by low pressure CVD, FIG.
As shown in (a), these films are also deposited on the back side of the Si substrate 21. Therefore, in this reference example, while the front side of the Si substrate 21 is protected by being covered with a resist (not shown), the back side of the Si substrate 21 is dry-etched, as shown in FIG. As shown, the SiN films 35, 33, 17, 13 on the back side of the Si substrate 21 and the polycrystalline Si film 3
4, 32, 31, and 25 are removed. After that, annealing is performed in a hydrogen atmosphere to recover the above-described interface state. The dry etching on the back surface side of the Si substrate 21 may be performed immediately before annealing in a hydrogen atmosphere.
Immediately after depositing the respective films, they may be performed separately. In this reference example, the SiN films 35, 3 for preventing the intrusion of hydrogen are provided on the back side of the Si substrate 21.
Not only 3, 17, and 13, but also the phosphorus-doped polycrystalline Si films 34, 32, 31, and 25 are removed.
Therefore, these polycrystalline Si films 25, 31, 32, 34
Can also prevent the auto-doping of phosphorus into the Si substrate 21. Next, an embodiment will be described. Also in this embodiment, up to the state shown in FIG. 1A, the same steps as in the above-described reference example are executed to manufacture a DRAM. But this
In one embodiment, the SiN film 35 on the back side of the Si substrate 21
33, 17, 13 and polycrystalline Si films 34, 32, 31, 2
5 is removed not by etching but by grinding. [0024] However, this grinding is not a additional process to one embodiment, be combined with a process that is generally performed in order to adjust the thickness of the Si substrate 21 during packaging. However, in this embodiment, annealing is performed in a hydrogen atmosphere for recovering the aforementioned interface凖位after the grinding. In each of the above-described reference example and one embodiment, the SiN film 13 formed by low-pressure CVD,
17, 33, and 35 are films that prevent the intrusion of hydrogen. However, a polycrystalline Si film that is heavily doped with phosphorus also has a gettering ability for hydrogen, and thus can be a film that blocks intrusion of hydrogen. In each of the above-mentioned reference example and one embodiment, a stacked capacitor type DRAM having a folded bit line structure is used.
Although the present invention is applied to the manufacture of a semiconductor device, the present invention can also be applied to the manufacture of other types of DRAMs and logic LSIs. According to the semiconductor device manufacturing method of the first aspect ,
Interface凖位without changing any of the configuration of the membrane element can be sufficiently recover, yet damage caused to the semiconductor substrate by grinding can also be recovered, further additional steps for the removal of film Is not required, and a highly reliable semiconductor device can be manufactured with a high yield and with a small number of steps.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a side sectional view sequentially showing a reference example and an embodiment of the present invention. FIG. 2 is a side sectional view showing a precondition of the present invention. [Description of Signs] 11 Transistor 12 Capacitor 13 SiN film 17 SiN film 21 Si substrate 33 SiN film 35 SiN film

Continuation of the front page (51) Int.Cl. ⁷ Identification symbol FI H01L 27/04 H01L 29/78 301N 27/108 29/78 (56) References JP-A-2-111034 (JP, A) JP-A-1 JP-A-122157 (JP, A) JP-A-61-156819 (JP, A) JP-A-57-96331 (JP, A) JP-A-1-246837 (JP, A)

Claims (1)

(57) In a method for manufacturing a semiconductor device, a film for preventing intrusion of hydrogen is provided on an element formation surface of a semiconductor substrate on which an element is formed, wherein: Is a method for manufacturing a semiconductor device in which the film and the semiconductor substrate adhered to opposite surfaces are removed by grinding until the semiconductor substrate has a desired thickness, and thereafter the semiconductor substrate is annealed in a hydrogen atmosphere.