JPH04284666A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To secure the stable output even at the fluctuated temperature by using polysilicon resistant element in the temperature coefficient of zero or nearly zero. CONSTITUTION:Phosphorus ions in a dosage within the range of 2X10<15>/cm<2>-4X10<15>/cm<2> are implanted in a polysilicon layer 6 to be driven by heat treatment step. Later, the polysilicon layer 6 is patterned to the resistant element by photolithography and etching step.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, such as an amplifier, a current source, and a voltage source, which requires a resistance element whose temperature coefficient of resistance is 0 or close to 0, and a method for manufacturing the same.

0002

2. Description of the Related Art When configuring, for example, a differential amplifier, a current source, a voltage source, etc. in an integrated circuit device, high precision is required of a resistive element that determines gain. Resistance elements used in semiconductor integrated circuit devices usually have temperature characteristics in which the resistance value changes with temperature changes.

0003

[Problem to be solved by the invention] Even if a high-precision resistance element is used in a differential amplifier, etc., if it has a large temperature coefficient, the resistance value will change as the temperature changes, and the gain will change. . Therefore, the present invention uses a polysilicon resistance element with a temperature coefficient of 0 or close to 0.
It is an object of the present invention to provide a semiconductor device that can obtain a stable output even with temperature changes, and a method for manufacturing such a resistance element.

0004

[Means for Solving the Problems] In the present invention, a resistance element made of a polysilicon layer having a sheet resistance value in the range of 350Ω to 450Ω is used. A polysilicon layer exhibiting such a sheet resistance value ranges from 2×1015/cm2 to 4×1
Phosphorus was ion-implanted at an implantation dose in the range of 0.015/cm2.

[0005]

[Operation] FIG. 1 shows the relationship between the sheet resistance value and temperature coefficient of a polysilicon resistance element. The temperature coefficient of polysilicon resistance varies linearly with sheet resistance and varies with ambient temperature (
When Ta) is 25° C., the sheet resistance value is 400Ω and the temperature coefficient is approximately 0, that is, there is no temperature characteristic.

On the other hand, FIG. 2 shows the relationship between the amount of phosphorus implanted into the polysilicon layer and the sheet resistance. The thickness of the polysilicon layer is approximately 3500 Å, and the phosphorus implantation energy is 40 K.
It is eV. The annealing conditions after phosphorus implantation are a temperature of 950℃.
℃, initially O2 at 6000 cc/min and H2 at 3000 cc/min.
Wet oxidation is performed for 35 minutes at a flow rate of cc/minute. Then, the atmosphere was changed to nitrogen (N2 flowing at 7000 cc/minute) and annealing was performed at the same temperature of 950° C. for 10 minutes. According to the results in Figure 2, the amount of phosphorus injected is 2×1015~4
If the range is ×1015/cm2, the sheet resistance value is 40
It will be around 0Ω. Therefore, the polysilicon layer has 2×1
By injecting phosphorus in the range of 0.015/cm2 to 4×1015/cm2 and applying heat treatment, the sheet resistance value is 350 to 45.
If a resistance element is created that has a resistance of 0Ω, the temperature coefficient of the resistance element will be approximately 0.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 3 shows a method of manufacturing a resistive element. (A) An oxide film 4 with a thickness of approximately 9000 Å is formed on a silicon substrate 2 by a CVD method or a thermal oxidation method, and a CVD
A polysilicon layer 6 having a thickness of approximately 3500 Å is deposited by the D method. (B) Phosphorus is ion-implanted into the polysilicon layer 6 and driven by heat treatment. The amount of phosphorus injected at this time is 2×
The range is from 1015/cm2 to 4×1015/cm2, the implantation energy is approximately 40 KeV, and the heat treatment conditions for driving are the same as those used in the explanation of FIG.

(C) The polysilicon layer 6 is patterned by photolithography and etching, an interlayer oxide film 8 is deposited according to a known method, a contact hole is formed in the interlayer oxide film 8, a metal layer is deposited, and the metal The layers are patterned by photolithography and etching to complete the resistive element. 1
0 and 12 are metal wiring.

The polysilicon resistance element produced by the process shown in FIG. 3 can be used, for example, in an electronic circuit as shown in FIG. 4 or 5. FIG. 4 shows an example of a bandgap voltage source, in which the resistance elements of the present invention are used as resistance elements R1, R2, and R3 connected to the input terminals of the operational amplifier 14. FIG. 5 shows an example of a differential amplifier, with resistor elements R4 to
The resistance element of the present invention is used as R7. In the electronic circuits shown in FIGS. 4 and 5, by using the resistance element according to the present invention having a temperature coefficient of approximately 0 as the resistance element, a stable output voltage can be obtained even with temperature changes.

0010

Effect of the invention: In the present invention, the sheet resistance value is 350 to 45.
Since a resistance element made of a 0Ω polysilicon layer is used, its temperature coefficient becomes approximately 0, and an electronic circuit using this resistance element can obtain a stable output regardless of temperature changes.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the relationship between sheet resistance and temperature coefficient in the present invention.

FIG. 2 is a diagram showing the relationship between the amount of phosphorus implanted into a polysilicon layer and sheet resistance in the present invention.

FIG. 3 is a process cross-sectional view showing a method of manufacturing a resistance element according to an embodiment.

FIG. 4 is a circuit diagram showing a bandgap voltage source as an example in which the resistance element of the present invention is used.

FIG. 5 is a circuit diagram showing another example of a differential amplifier in which the resistance element of the present invention is used.

[Explanation of symbols]

2 Silicon substrate 4 Silicon oxide film 6
Polysilicon layer 8 Interlayer insulation film 10, 12 Wiring

Claims (3)

[Claims] [Claim 1] Sheet resistance value is 350Ω to 450Ω
A semiconductor device equipped with a resistance element made of a polysilicon layer in the range of . 2. The polysilicon layer has a thickness of 2×10 15 /
2. The semiconductor device according to claim 1, wherein phosphorus is ion-implanted at an implantation dose ranging from cm2 to 4×10 15 /cm 2 . 3. A polysilicon layer is deposited on the insulating base, and the sheet resistance value of the polysilicon layer is from 350Ω to 4.
A method of manufacturing a semiconductor device, in which a semiconductor device is constructed by ion-implanting phosphorous to a resistance of 50Ω, subjecting it to heat treatment, and patterning the resulting polysilicon layer as a resistive element.