JPH04284663A - Semiconductor device - Google Patents

Abstract

PURPOSE:To manufacture the title compact and highly reliable semiconductor device by a method wherein the first semiconductor chip coated with an insulating film whereon an electrode is re-arrayed and the second semiconductor chip are laminated so as to connect the re-arrayed electrode with the second semiconductor chip. CONSTITUTION:The first semiconductor chip 1 coated with an insulating film 8 whereon an electrode 7 is re-arrayed and the second semiconductor chip 2 are successively laminated in a vessel 3 containing the semiconductor chips and then the re-arrayed electrode 7 is connected to the electrode 9 of the second semiconductor chip before starting the mounting step. For example, the first semiconductor chip 1 whereon the re-arrayed wiring 10 and the re-arrayed pad 7 are formed through the intermediary of a polyimide film 8 is mounted in a cavity 16 formed in a package 13 and then the second semiconductor chip 2 is laminated on the first semiconductor chip 1 to be mounted so that the re-arrayed pad 7 and the bonding pad 9 of the second semiconductor chip 2 may be connected to each other.

Description

[Detailed description of the invention]

[Object of the invention]

0002

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a mounting structure for a semiconductor device in which a plurality of semiconductor chips of different types are stacked and mounted.

0003

[Prior Art] In recent years, COB (Chip on b)
There is an ever-increasing trend towards lighter, thinner, smaller, and more highly functional products in high-density packaging such as memory card modules (ord) and memory card modules.

[0004] When focusing on high functionality, it is difficult to mount and connect a plurality of products of various types in a package with limited dimensions.

FIG. 3 shows a conventional, general high-density packaging type semiconductor device. In this semiconductor device, semiconductor chips 1 and 2 of different types are mounted in two cavities 6 formed in a package 3 having a predetermined length, and are interconnected via wiring 4 formed in the cavity 6. I am trying to do the connection wiring. 5 is the bonding pad 9 of the chip and the wiring 4
This is the wire that connects the

[0006] When a plurality of semiconductor chips of various types are mounted side by side in a package with a predetermined length as described above,
Not only are the types and number of semiconductor chips limited, but the area occupied by the semiconductor chip within the package becomes large, which inevitably forces the package to be larger. Furthermore, when connecting different types of chips, not only does the wiring inside the package deteriorate in electrical resistance, but also the complexity of mounting these chips causes connection failures, which has a significant impact on reliability.

[0007]

[Problems to be Solved by the Invention] As described above, in conventional semiconductor devices, when a plurality of semiconductor chips of various types are mounted in a package of a predetermined length, the area occupied by the semiconductor chips becomes large. In addition to forcing the package to be larger, the electrical resistance deteriorates due to the routing of wiring inside the package to connect chips, and the complexity of mounting these components causes connection failures, reducing reliability. The problem was that it was low.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a compact and highly reliable semiconductor device.

[Configuration of the invention]

0010

[Means for Solving the Problems] In the present invention, the surface of the lower semiconductor chip is covered with an insulating film, and the electrodes (bonding pads) are rearranged on the upper layer of this insulating film so that they are connected to the bonding pads of the upper semiconductor chip. By reducing the distance and connection wiring distance, a plurality of semiconductor chips are stacked and housed in the same container.

[0011]

[Function] According to the above configuration, the terminal electrodes that are electrically connected to each other are made by stacking semiconductor chips and are interconnected inside the container, which reduces the amount of wiring inside the container and provides high reliability. A semiconductor device can be obtained.

Desirably, the bonding pads of the upper semiconductor chip can also be rearranged to further shorten the wiring distance.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Examples of the present invention will be described in detail below with reference to the drawings.

Embodiment 1 FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a sectional view of the device.

This semiconductor device includes a first semiconductor chip 1 having rearrangement wiring 10 and rearrangement pads 7 formed on its surface through a polyimide film, in a cavity 16 formed in a package 13, and further includes: A second semiconductor chip 2 is laminated thereon and mounted so that the rearrangement pads 7 and bonding pads 9 of the second semiconductor chip 2 are interconnected via wires 5. be. The re-arrangement pad 7 connects the re-arrangement wiring 1 from the bonding pad 19 located at the periphery of the first semiconductor chip.
0, and each second semiconductor chip 2
The bonding pad 9 is formed close to the desired bonding pad 9.

[0016] In the cavity 16, the first wiring 1
4 is formed, and this first wiring is connected to a bonding pad 19 located at the peripheral edge of the first semiconductor chip 1 via a wire 5 . Reference numeral 20 denotes rearrangement wiring for interconnecting bonding pads on the surface of the second semiconductor chip.

According to this device, interconnections between chips are made via rearranged bonding pads, which reduces the amount of wiring inside the container and provides a highly reliable semiconductor device. .

In the above embodiment, the polyimide film 8 is formed so that a part of the bonding pad 19 of the lower semiconductor chip is exposed, and the polyimide film 8 is rearranged in the upper layer so as to cover the bonding pad 19. Although wiring is formed, a polyimide film may be formed so as to cover all the bonding pads 19 of the semiconductor chip, and may be connected to the rearranged wiring via through holes.

Further, in the above embodiment, the bonding pads of both semiconductor chips are rearranged, but only the bonding pads of the first semiconductor chip on the lower side may be rearranged. In addition, if the rearrangement wiring is formed on the upper second semiconductor chip so that it is closer to the corresponding pad position of the first semiconductor chip and the bonding pads are rearranged, the bonding wires can be routed within the package. Also, the amount of wiring can be further reduced.

Further, in the above embodiment, two semiconductor chips are stacked, but it goes without saying that three or more semiconductor chips may be stacked.

Embodiment 2 In addition, if the first and second semiconductor chips have several other interconnect terminals, one or both of the bonding pads may be rearranged to eliminate the need for wires. The two may be connected by direct bonding.

A second embodiment of the present invention will be described with reference to FIG.

As shown in FIG. 3, this semiconductor device has a polyimide resin film 2 covering the surface of a first semiconductor chip 21a.
Rearranged electrode (bonding pad) 3 formed on 7
A rearrangement electrode 30b is also formed on the second semiconductor chip 21b via a polyimide resin film 27 so as to correspond to the rearrangement electrode 30a. The inner leads 22 are stacked with leads 22 interposed therebetween, and the tips of the inner leads 22 are directly connected to rearrangement electrodes of the first and second semiconductor chips by bumps 26, respectively.

That is, as shown in FIG. 4 with the upper first semiconductor chip 21a removed, the semiconductor chip 21
The entire surface including the active element region b is made of polyimide resin film 2.
7 and is connected to the bonding pad 22 through a through hole h formed in this polyimide resin film.
are rearranged on the active device area. Then, the tip of the inner lead 22 bumps 26 onto this rearranged electrode 30b.
are directly joined by.

On top of this, the rearranged electrodes of the first semiconductor chip 21a are directly bonded to the inner leads 22 by bumps 26 so as to face each other, thereby interconnecting the first and second semiconductor chips and connecting them to the lead frame. Connections are made.

[0026]The outside of this is covered with a sealing resin 29. 23 is an outer lead formed integrally with the inner lead 22 and led out from the resin package 29. As shown in FIG. 28 is a polyimide film as an insulating film covering the inner lead surface.

[0027] In this structure, for example, when the same chips are interconnected and used, the positions of the bonding pads are reversed when they are placed facing each other.
Although the bonding wire becomes long, in this way the bonding pads can be rearranged to face each other and the inner leads 22 can be sandwiched between these bonding pads for direct bonding, making it extremely compact and reliable. will be of high value.

Note that a film carrier may be used instead of the lead frame.

[0029].

As explained above, according to the present invention, a plurality of semiconductor chips are stacked and housed in the same container, and the surface of the lower semiconductor chip is covered with an insulating film. The electrodes are rearranged on the upper layer to reduce the distance from the bonding pads of the semiconductor chip on the upper layer, reducing the connection wiring distance, reducing the amount of wiring inside the container and improving reliability. A high quality semiconductor device can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a partially cutaway view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a perspective view showing a conventional semiconductor device.

[Explanation of symbols]

1 First semiconductor chip 2 Second semiconductor chip 3 Package 4 Wiring layer 5 Wire 6 Cavity 7 Pad 8 Polyimide film 9 Pad 10 Second wiring 13 Package 14 Wiring 16 Cavity 21a First semiconductor chip 21b Second semiconductor Chip 22 Inner lead 27 Polyimide resin film 30a Rearranged electrode (bonding pad) 30b
Rearranged electrode 26 Bump h Through hole 31 Rearranged wiring

Claims (1)

[Claims] 1. A first semiconductor chip whose surface is covered with an insulating film and electrodes are rearranged on the upper layer of the insulating film and a second semiconductor chip are sequentially laminated in a container for accommodating the semiconductor chips. At the same time, the semiconductor device is characterized in that the rearranged electrodes and the electrodes of the second semiconductor chip are connected and mounted.