JPH04268786A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JPH04268786A
JPH04268786A JP3016991A JP3016991A JPH04268786A JP H04268786 A JPH04268786 A JP H04268786A JP 3016991 A JP3016991 A JP 3016991A JP 3016991 A JP3016991 A JP 3016991A JP H04268786 A JPH04268786 A JP H04268786A
Authority
JP
Japan
Prior art keywords
insulating film
printed wiring
wiring board
dielectric constant
electric field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3016991A
Other languages
Japanese (ja)
Other versions
JP2761113B2 (en
Inventor
Toshiyuki Suzuki
俊之 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP3030169A priority Critical patent/JP2761113B2/en
Publication of JPH04268786A publication Critical patent/JPH04268786A/en
Application granted granted Critical
Publication of JP2761113B2 publication Critical patent/JP2761113B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

PURPOSE:To provide a printed wiring board where an insulating film is enhanced in dielectric breakdown strength without increasing it in thickness. CONSTITUTION:In a printed wiring board of this design, an insulating material 5 of high dielectric constant is provided to at least the edge 13a of a wiring 13 of a printed circuit 3 provided onto an insulating film 2.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、絶縁膜の上にプリン
ト回路が設けられてなるプリント配線板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board having a printed circuit provided on an insulating film.

【0002】0002

【従来の技術】インバータ回路用や電源用のパワー回路
用のプリント配線板においても、高密度実装化、多層化
、薄型化、小型化が進められ、これに従ってプリント配
線板に高放熱性が要求されるようになった。そのため、
最近、図5にみるように、プリント回路3が設けられた
絶縁膜2の下に金属基体1のある金属基体型プリント配
線板がよく使われる。金属基体型プリント配線板は放熱
性に優れるからである。
[Prior Art] Printed wiring boards for inverter circuits and power circuits for power supplies are becoming more densely packaged, multilayered, thinner, and smaller, and accordingly, printed wiring boards are required to have high heat dissipation properties. It started to be done. Therefore,
Recently, as shown in FIG. 5, a metal substrate type printed wiring board in which a metal substrate 1 is provided under an insulating film 2 on which a printed circuit 3 is provided is often used. This is because the metal substrate type printed wiring board has excellent heat dissipation.

【0003】0003

【発明が解決しようとする課題】しかしながら、金属基
体型プリント配線板では、絶縁膜2が絶縁破壊を起こし
易くて信頼性が低いという問題がある。絶縁膜2の厚み
が薄くて、金属基板1とプリント回路3における電路1
3の間に電圧がかかった場合、電路13の絶縁膜2側エ
ッジ13aで電界集中が起こり、そこから絶縁破壊が始
まる。樹脂材料を使用した絶縁膜2の場合に特に絶縁破
壊が起こり易い。絶縁膜2の厚みを厚くすれば、絶縁破
壊は起こり難くなるが、放熱性が低下したり、薄型化に
逆行することになるため、絶縁膜2の厚み増大は適切な
対策ではない。
However, the metal substrate type printed wiring board has a problem in that the insulating film 2 is prone to dielectric breakdown and its reliability is low. The thickness of the insulating film 2 is thin, and the electric path 1 between the metal substrate 1 and the printed circuit 3 is
When a voltage is applied between 3 and 3, electric field concentration occurs at the edge 13a of the electric path 13 on the insulating film 2 side, and dielectric breakdown begins there. Dielectric breakdown is particularly likely to occur when the insulating film 2 is made of a resin material. Increasing the thickness of the insulating film 2 makes dielectric breakdown less likely to occur, but increasing the thickness of the insulating film 2 is not an appropriate countermeasure because it reduces heat dissipation and goes against the trend of thinning.

【0004】この発明は、上記事情に鑑み、絶縁膜の絶
縁破壊が絶縁膜の厚み増大を伴わずとも起こり難くなる
プリント配線板を提供することを課題とする。
SUMMARY OF THE INVENTION In view of the above circumstances, it is an object of the present invention to provide a printed wiring board in which dielectric breakdown of an insulating film is less likely to occur even without increasing the thickness of the insulating film.

【0005】[0005]

【課題を解決するための手段】前記課題を解決するため
、請求項1記載の発明にかかるプリント配線板では、絶
縁膜の上に設けられたプリント回路における電路の少な
くとも前記絶縁膜側エッジに高誘電率絶縁材料を施与す
るようにしている。高誘電率絶縁材料は、その誘電率が
、請求項2のように、絶縁膜の誘電率よりも大きいこと
が好ましい。
[Means for Solving the Problem] In order to solve the above problem, in the printed wiring board according to the invention as set forth in claim 1, at least the edge of the electrical path on the insulating film side of the printed circuit provided on the insulating film is raised. A dielectric constant insulating material is applied. The dielectric constant of the high dielectric constant insulating material is preferably larger than the dielectric constant of the insulating film.

【0006】プリント配線板の種類としては、例えば、
請求項3のように、絶縁膜の下に金属基材を備えた金属
基体型プリント配線板が挙げられるが、これ以外に、積
層板型プリント配線板、セラミック板型プリント配線板
等であってもよい。プリント回路は、金属箔をエッチン
グパターン化したもの、導電性ペーストを印刷したもの
、アディティブ法等によるメッキ電路等が挙げられる。
[0006] Types of printed wiring boards include, for example:
As claimed in claim 3, examples include a metal substrate type printed wiring board having a metal base material under an insulating film, but other than this, there are also laminated board type printed wiring boards, ceramic board type printed wiring boards, etc. Good too. Examples of the printed circuit include a metal foil etched into a pattern, a conductive paste printed thereon, and a plated circuit formed by an additive method.

【0007】以下、この発明をより具体的に説明する。 図5においてエポキシ樹脂含浸ガラス布を絶縁膜2とす
る場合、大気中で電圧を印加すると、絶縁膜2側エッジ
13aには2倍の電界集中がある。絶縁膜2がほぼ均一
の絶縁耐力をもっているとすると、プリント配線板は絶
縁膜2の1/2の耐電圧しかないことになる。電路と金
属基体を導体電極として、絶縁膜2内の電界を有限要素
法を用いて計算している。静電場において、空間電荷が
存在しないとするとラプラスの方程式「div(εgr
adφ)=0」を満足し、よって「E=−gradφ」
となり、これにより求めた。但し、φは電位、εは誘電
率である。絶縁膜2の厚み100μm、εr =5〜6
、印加電圧10kVとすると、エッジ13aでの電界強
度は約200kV/mmに達する図4において、電界集
中域Aの電界を考える。要素内での電界は一定で要素境
界で電位が連続とすると電界集中域Aの電界はそのまわ
りの電界の平均となる。絶縁膜2内の誘電率は一定であ
り、エッジ13aの近傍域Bの誘電率が大きくなると、
電界は誘電率に反比例するから、近傍域Bの電界が小さ
くなり、これを受けて電界集中域Aの電界も小さくなり
、結果として、電界集中が緩和されることになる。
[0007] This invention will be explained in more detail below. In FIG. 5, when an epoxy resin-impregnated glass cloth is used as the insulating film 2, when a voltage is applied in the atmosphere, there is twice as much electric field concentration at the edge 13a on the insulating film 2 side. Assuming that the insulating film 2 has a substantially uniform dielectric strength, the printed wiring board will have only 1/2 the withstand voltage of the insulating film 2. The electric field within the insulating film 2 is calculated using the finite element method using the electric path and the metal substrate as conductive electrodes. In an electrostatic field, if there is no space charge, Laplace's equation ``div(εgr
adφ)=0”, therefore, “E=−gradφ”
This is how we found it. However, φ is a potential and ε is a dielectric constant. Thickness of insulating film 2: 100 μm, εr = 5 to 6
, when the applied voltage is 10 kV, the electric field strength at the edge 13a reaches approximately 200 kV/mm.In FIG. 4, consider the electric field in the electric field concentration area A. Assuming that the electric field within the element is constant and the potential continuous at the element boundaries, the electric field in the electric field concentration area A is the average of the electric fields around it. The dielectric constant in the insulating film 2 is constant, and when the dielectric constant in the region B near the edge 13a increases,
Since the electric field is inversely proportional to the dielectric constant, the electric field in the vicinity area B becomes smaller, and in response, the electric field in the electric field concentration area A also becomes smaller, and as a result, the electric field concentration is relaxed.

【0008】絶縁膜側エッジ13aへの高誘電率絶縁材
料の具体的な施与態様としては、例えば、以下のような
ものがある。■  図1にみるように、高誘電率絶縁材
料5が電路13のエッジ13aを含む側面をちょうど覆
うように施与する。■  図2にみるように、高誘電率
絶縁材料5が電路13のエッジ13aに限らず全露出面
を覆うように施与する。
[0008] For example, the high dielectric constant insulating material may be applied to the insulating film side edge 13a in the following manner. (2) As shown in FIG. 1, the high dielectric constant insulating material 5 is applied so as to just cover the side surface including the edge 13a of the electric path 13. (2) As shown in FIG. 2, the high dielectric constant insulating material 5 is applied so as to cover not only the edge 13a of the electric path 13 but also the entire exposed surface.

【0009】■  図3にみるように、高誘電率絶縁材
料5が電路13のエッジ13aから電路13の上面13
bの一部にかけて覆うように施与する。■  図4にみ
るように、高誘電率絶縁材料5が電路13のエッジ13
a近傍だけを覆うように施与する。上記に限らず、プリ
ント配線板の全面に高誘電率絶縁材料を施与してもよい
が、電路部のみをスクリーン印刷法(これに限らない)
等により限定的に塗布する方が隣接する電路同士の干渉
が少なく望ましい。また、高誘電率絶縁材料の塗布後、
脱泡してボイドを除いてから加熱等により硬化させるこ
とにより施与する形態をとることが望ましい。
[0009] As shown in FIG.
Apply to cover part of b. ■ As shown in FIG. 4, the high dielectric constant insulating material 5
Apply so as to cover only the area near a. Not limited to the above, a high dielectric constant insulating material may be applied to the entire surface of the printed wiring board, but only the electric circuit section can be coated using screen printing (not limited to this).
It is preferable to apply the coating in a limited manner, since there is less interference between adjacent electric circuits. In addition, after applying the high dielectric constant insulating material,
It is desirable to apply the adhesive by defoaming to remove voids and then curing it by heating or the like.

【0010】0010

【作用】この発明のプリント配線板では、絶縁膜上のプ
リント回路における電路の絶縁膜側エッジに高誘電率絶
縁材料が施与されており、絶縁膜側エッジ域の電界集中
が緩和されるため、絶縁膜の厚みを増さずとも絶縁破壊
が起こり難くなっている。
[Function] In the printed wiring board of the present invention, a high dielectric constant insulating material is applied to the edge of the electric path on the insulating film side of the printed circuit on the insulating film, and electric field concentration in the edge area of the insulating film is alleviated. , dielectric breakdown is less likely to occur even without increasing the thickness of the insulating film.

【0011】高誘電率絶縁材料の誘電率が絶縁膜の誘電
率よりも大きい場合は電界集中が緩和される度合いが大
きく、より絶縁膜の絶縁破壊が起こり難い。
When the dielectric constant of the high dielectric constant insulating material is greater than the dielectric constant of the insulating film, electric field concentration is relaxed to a large extent, and dielectric breakdown of the insulating film is less likely to occur.

【0012】0012

【実施例】以下、この発明の実施例を説明する。 −実施例1− 実施例1のプリント配線板は、図3に示す構成である。 金属基体1は厚み1mm、縦70mm、横70mmのア
ルミニウム角板である。絶縁膜2は厚み100μmのエ
ポキシ樹脂膜(εr =3.9)である。電路13は、
厚み35μm、直径25mmの銅箔円板である。高誘電
率絶縁材料5はエポキシ樹脂にルチル(酸化チタン)を
40体積%添加したもの(εr =10)である。
[Embodiments] Examples of the present invention will be described below. -Example 1- The printed wiring board of Example 1 has the configuration shown in FIG. 3. The metal base 1 is an aluminum square plate with a thickness of 1 mm, a length of 70 mm, and a width of 70 mm. The insulating film 2 is an epoxy resin film (εr = 3.9) with a thickness of 100 μm. The electric line 13 is
It is a copper foil disk with a thickness of 35 μm and a diameter of 25 mm. The high dielectric constant insulating material 5 is an epoxy resin to which 40% by volume of rutile (titanium oxide) is added (εr = 10).

【0013】電路13は絶縁膜2上の銅箔をエッチング
しパターン化することにより形成されており、電路13
形成後、エポキシ樹脂にルチル(酸化チタン)を40堆
積%添加したものをエッジ13aに塗布した後、脱泡に
よるボイド除去処理を行い、加熱して硬化させている。 −実施例2− 絶縁膜2が厚み150μmのアルミナフィラー50体積
%添加エポキシ樹脂膜(εr =6.0)である他は、
実施例1と同じである。
The electric path 13 is formed by etching and patterning the copper foil on the insulating film 2.
After the formation, an epoxy resin with 40% rutile (titanium oxide) added thereto is applied to the edge 13a, followed by a void removal process by defoaming and hardening by heating. -Example 2- The insulating film 2 was an epoxy resin film (εr = 6.0) with a thickness of 150 μm and 50% by volume of alumina filler added.
Same as Example 1.

【0014】−実施例3− エポキシ樹脂にルチル(酸化チタン)を40堆積%添加
したものに代えて、ソルダーレジスト(太陽インキ  
εr =3.5)を用いた他は、実施例1と同じである
。 −実施例4− エポキシ樹脂にルチル(酸化チタン)を40堆積%添加
したものに代えて、ソルダーレジスト(太陽インキ)を
用いた他は、実施例2と同じである。
- Example 3 - Solder resist (Taiyo Ink) was used instead of epoxy resin with 40% rutile (titanium oxide) added.
This example is the same as Example 1 except that εr = 3.5) is used. -Example 4- The same as Example 2 except that a solder resist (Taiyo Ink) was used instead of the epoxy resin to which 40% of rutile (titanium oxide) was added.

【0015】−比較例1− 高誘電率絶縁材料5を施していない他は、実施例1と同
じである。したがって、エッジの近傍域は空気(εr 
=1.0)である。 −比較例2− 高誘電率絶縁材料5を施していない他は、実施例1と同
じである。したがって、エッジの近傍域は空気(εr 
=1.0)である。
Comparative Example 1 The same as Example 1 except that the high dielectric constant insulating material 5 was not applied. Therefore, the area near the edge is air (εr
= 1.0). - Comparative Example 2 - The same as Example 1 except that the high dielectric constant insulating material 5 was not applied. Therefore, the area near the edge is air (εr
= 1.0).

【0016】得られたプリント配線板それぞれ6個に対
しV−t試験を実施した。V−t試験では、オイルバス
中で電路13と金属基体1の間にAC4kVの電圧を印
加し、絶縁破壊に至るまでの時間を測定した。測定結果
(平均)を有限要素法でシュミレーションし求めた電界
集中度と共に下記に示す。       実施例1    破壊までの時間:130
時間  電界集中度1.55      実施例2  
  破壊までの時間:150時間  電界集中度1.6
1      実施例3    破壊までの時間:  
50時間  電界集中度1.73      実施例4
    破壊までの時間:  70時間  電界集中度
1.83      比較例1    破壊までの時間
:    5時間  電界集中度2.00      
比較例2    破壊までの時間:    9時間  
電界集中度2.07  実施例のプリント配線板は格段
に絶縁膜の絶縁破壊が起こり難くなっている。電界集中
度のシュミレーション結果も絶縁破壊が起こり難くなっ
たのが、電界集中の緩和によるものであることをよく裏
付けている。
A Vt test was conducted on each of the six printed wiring boards obtained. In the V-t test, an AC voltage of 4 kV was applied between the electrical circuit 13 and the metal base 1 in an oil bath, and the time until dielectric breakdown occurred was measured. The measurement results (average) are shown below along with the electric field concentration obtained by simulation using the finite element method. Example 1 Time to failure: 130
Time Electric field concentration 1.55 Example 2
Time to destruction: 150 hours Electric field concentration 1.6
1 Example 3 Time to failure:
50 hours Electric field concentration 1.73 Example 4
Time until destruction: 70 hours Electric field concentration 1.83 Comparative example 1 Time until destruction: 5 hours Electric field concentration 2.00
Comparative example 2 Time until destruction: 9 hours
Electric field concentration degree: 2.07 In the printed wiring board of the example, dielectric breakdown of the insulating film is much less likely to occur. The simulation results of electric field concentration also provide good evidence that dielectric breakdown becomes less likely to occur due to the relaxation of electric field concentration.

【0017】[0017]

【発明の効果】以上に述べたように、この発明のプリン
ト配線板では、プリント回路における電路の絶縁膜側エ
ッジ近傍の電界集中が緩和されるため、絶縁膜の絶縁破
壊が絶縁膜の厚み増大を伴わずとも起こり難くなってい
る。高誘電率絶縁材料の誘電率が絶縁膜の誘電率よりも
大きい場合は電界集中が緩和される度合いが大きく、よ
り絶縁膜の絶縁破壊が起こり難くなる。
[Effects of the Invention] As described above, in the printed wiring board of the present invention, the electric field concentration near the edge of the insulating film side of the electric path in the printed circuit is alleviated, so that dielectric breakdown of the insulating film is prevented by increasing the thickness of the insulating film. It is becoming more difficult for this to occur even without it. When the dielectric constant of the high dielectric constant insulating material is larger than the dielectric constant of the insulating film, the degree of relaxation of electric field concentration is large, and dielectric breakdown of the insulating film becomes less likely to occur.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】この発明のプリント配線板の第1構成例をあら
わす断面図である。
FIG. 1 is a sectional view showing a first configuration example of a printed wiring board of the present invention.

【図2】この発明のプリント配線板の第2構成例をあら
わす断面図である。
FIG. 2 is a sectional view showing a second configuration example of the printed wiring board of the present invention.

【図3】この発明のプリント配線板の第3構成例をあら
わす断面図である。
FIG. 3 is a sectional view showing a third configuration example of the printed wiring board of the present invention.

【図4】この発明のプリント配線板の第4構成例をあら
わす断面図である。
FIG. 4 is a sectional view showing a fourth configuration example of the printed wiring board of the present invention.

【図5】従来のプリント配線板の構成例をあらわす断面
図である。
FIG. 5 is a cross-sectional view showing a configuration example of a conventional printed wiring board.

【符合の説明】[Explanation of sign]

1  金属基体 2  絶縁膜 3  プリント回路 5  高誘電率絶縁材料 13  電路 13a  絶縁膜側エッジ 1 Metal base 2 Insulating film 3 Printed circuit 5 High dielectric constant insulating material 13 Electric circuit 13a Insulating film side edge

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】  絶縁膜の上にプリント回路が設けられ
てなるプリント配線板において、前記プリント回路にお
ける電路の少なくとも前記絶縁膜側エッジに高誘電率絶
縁材料が施与されていることを特徴とするプリント配線
板。
1. A printed wiring board having a printed circuit provided on an insulating film, characterized in that a high dielectric constant insulating material is applied to at least an edge of the electrical path on the insulating film side of the printed circuit. Printed wiring board.
【請求項2】  高誘電率絶縁材料の誘電率が絶縁膜の
誘電率よりも大きい請求項1記載のプリント配線板。
2. The printed wiring board according to claim 1, wherein the dielectric constant of the high dielectric constant insulating material is greater than the dielectric constant of the insulating film.
【請求項3】  絶縁膜が金属基体表面に形成されてい
る請求項1または2記載のプリント配線板。
3. The printed wiring board according to claim 1, wherein the insulating film is formed on the surface of the metal substrate.
JP3030169A 1991-02-25 1991-02-25 Printed wiring board Expired - Lifetime JP2761113B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3030169A JP2761113B2 (en) 1991-02-25 1991-02-25 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3030169A JP2761113B2 (en) 1991-02-25 1991-02-25 Printed wiring board

Publications (2)

Publication Number Publication Date
JPH04268786A true JPH04268786A (en) 1992-09-24
JP2761113B2 JP2761113B2 (en) 1998-06-04

Family

ID=12296255

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3030169A Expired - Lifetime JP2761113B2 (en) 1991-02-25 1991-02-25 Printed wiring board

Country Status (1)

Country Link
JP (1) JP2761113B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5936846A (en) * 1997-01-16 1999-08-10 Ford Global Technologies Optimized solder joints and lifter pads for improving the solder joint life of surface mount chips
JP2013110231A (en) * 2011-11-18 2013-06-06 Fujitsu Ltd Wiring structure and manufacturing method for wiring structure
JP2015173303A (en) * 2015-07-10 2015-10-01 住友電気工業株式会社 Photovoltaic power generation module, photovoltaic power generation panel, and flexible printed wiring board for photovoltaic power generation module
JP2020129589A (en) * 2019-02-07 2020-08-27 積水化学工業株式会社 Semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164491A (en) * 1986-12-26 1988-07-07 三菱電線工業株式会社 Circuit board and manufacture of the same
JPH03108362A (en) * 1989-09-22 1991-05-08 Denki Kagaku Kogyo Kk Circuit board for mounting semiconductor, and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164491A (en) * 1986-12-26 1988-07-07 三菱電線工業株式会社 Circuit board and manufacture of the same
JPH03108362A (en) * 1989-09-22 1991-05-08 Denki Kagaku Kogyo Kk Circuit board for mounting semiconductor, and manufacture thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5936846A (en) * 1997-01-16 1999-08-10 Ford Global Technologies Optimized solder joints and lifter pads for improving the solder joint life of surface mount chips
JP2013110231A (en) * 2011-11-18 2013-06-06 Fujitsu Ltd Wiring structure and manufacturing method for wiring structure
JP2015173303A (en) * 2015-07-10 2015-10-01 住友電気工業株式会社 Photovoltaic power generation module, photovoltaic power generation panel, and flexible printed wiring board for photovoltaic power generation module
JP2020129589A (en) * 2019-02-07 2020-08-27 積水化学工業株式会社 Semiconductor device

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