JPH04265864A - Measuring terminal of chip type electronic part and manufacture thereof - Google Patents

Measuring terminal of chip type electronic part and manufacture thereof

Info

Publication number
JPH04265864A
JPH04265864A JP4774891A JP4774891A JPH04265864A JP H04265864 A JPH04265864 A JP H04265864A JP 4774891 A JP4774891 A JP 4774891A JP 4774891 A JP4774891 A JP 4774891A JP H04265864 A JPH04265864 A JP H04265864A
Authority
JP
Japan
Prior art keywords
terminal
chip
holder
measurement
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4774891A
Other languages
Japanese (ja)
Inventor
Shigeru Kubota
滋 窪田
Ikuji Kano
生二 叶
Masahiro Kubo
久保 雅宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Kogyo Co Ltd
Original Assignee
Nitto Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Kogyo Co Ltd filed Critical Nitto Kogyo Co Ltd
Priority to JP4774891A priority Critical patent/JPH04265864A/en
Publication of JPH04265864A publication Critical patent/JPH04265864A/en
Pending legal-status Critical Current

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  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

PURPOSE:To measure the electrical characteristics of a chip by bringing both electrodes of the chip into contact with the terminals of terminal pieces being the measuring terminals for inspecting a chip type electronic part and arranged in a dielectric in parallel in an erected state under pressure. CONSTITUTION:Terminal pieces 2a which are formed from narrow and long plate-shaped thin metal plates composed of phosphor bronze and constituted so that the upper end surfaces thereof are formed into the terminals 2 coming into contact with the electrode 1 of a chip (t) and the lower parts thereof are formed as leads 2b are provided and the terminals 2 of the terminal pieces 2a provided in an erected state are arranged in parallel at a set interval l1 or l2. The parallelly arranged ones are embedded in a core holder 5a composed of a dielectric such as plastic or silicon in a left and right symmetric state so as to provide a set interval l3 between the opposed terminals 2 to provide a unit measuring terminal A' and this terminal A' is fitted in the unit measuring terminal fitting hole 8 of a holder 5. Therefore, a small measuring terminal suitable for mass productivity and excellent in durability is extremely inexpensively obtained with high accuracy.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明はチップ型電子部品(以下
チップという)の測定端子、例えば、チップ抵抗器の検
測器に用いる抵抗値測定用端子に係るものであり、単体
チップの他、2以上の単体チップを合併構成(セラミッ
ク基板は共通)した多連型チップの測定端子に係るもの
であり、また該測定端子の製造法に係るものである。
[Field of Industrial Application] The present invention relates to a measuring terminal for a chip-type electronic component (hereinafter referred to as a chip), for example, a terminal for measuring a resistance value used in a tester for a chip resistor. The present invention relates to a measurement terminal of a multi-chip type in which two or more single chips are combined (with a common ceramic substrate), and also relates to a method of manufacturing the measurement terminal.

【0002】0002

【従来技術と課題】チップ(例、チップ抵抗器)の製造
工程、テーピング工程及びマウント工程等において、チ
ップの電気的特性(例、抵抗値)を測定検査する工程が
あり、通常はチップの電極に端子を圧接して電気計測を
行って、チップの合格、不合格を検査選別している。
[Prior Art and Problems] In the manufacturing process, taping process, mounting process, etc. of a chip (e.g., chip resistor), there is a process to measure and inspect the electrical characteristics (e.g., resistance value) of the chip. The terminals are pressure-connected to the chip and electrical measurements are taken to determine whether the chip passes or fails.

【0003】なお、チップには図3のような標準タイプ
の単体チップtの他に、近時は図4のような2以上の単
体チップtを並列合併構成したような多連型チップt′
(図は4連型)があり、単体チップt、例えばチップ抵
抗器tはセラミック基板3の両端に電極1、1を設け、
その間を抵抗体4で接続して設けたものであり、図3の
4連型チップ(抵抗器)tは共通セラミック基板3の両
端に4組の電極1、1を並列して設け、各組電極間を各
抵抗体4で接続して設けたものである
In addition to the standard type single chip t as shown in FIG. 3, recently there has been a multi-chip type chip t' in which two or more single chips t are combined in parallel as shown in FIG.
(The figure shows a four-wire type), and a single chip t, for example a chip resistor t, has electrodes 1, 1 on both ends of a ceramic substrate 3,
These are connected by a resistor 4, and the quadruple chip (resistor) t in Figure 3 has four sets of electrodes 1, 1 arranged in parallel on both ends of a common ceramic substrate 3, The electrodes are connected by each resistor 4.

【0004】従来のチップ抵抗器tの測定方法はチップ
の両方の電極に各1本の端子を接触通電して、その電気
的測定値で検査選別する2端子測定法が一般的であるが
、近時はチップのより高精度が要求され、従って高精度
な検査選別方法が必要とされて、チップの両方の電極に
各2本の端子を接触して平均測定値を得る、4端子測定
法の採用が希求されつつある。
The conventional method for measuring chip resistors t is generally a two-terminal measurement method in which one terminal is connected to both electrodes of the chip, and the electrically measured values are used for inspection and selection. Recently, higher precision of chips is required, and therefore a highly accurate inspection and selection method is required.The four-terminal measurement method involves contacting two terminals each to both electrodes of the chip and obtaining an average measurement value. There is a growing demand for employment of

【0005】しかるところ、近時はチップの小形化が急
速に進んで、例えば1005型(縦1.0×横0.5m
m)、1608型(縦1.6×横0.8mm)などの超
小形チップが多用されつつある。そして、1005型チ
ップの電極1の幅は0.3mm、1608型チップの電
極1の幅は0.4mmであって、該0.3〜0.4mm
の部分に2本の端子を正確に接触する場合は、端子の幅
もあるので、2本の端子間のギャップ(設定間隔l1 
)は0.1mm位しかとれないこととなり、また、多連
型チップtにおける並列測定端子間の寸法(設定間隔l
2 )も0.2mm位しかないため、上記従来構成の測
定端子では対応し得ない状態にあった。
However, in recent years, the miniaturization of chips has progressed rapidly.
Ultra-small chips such as the 1608 type (1.6 mm in height x 0.8 mm in width) are becoming widely used. The width of the electrode 1 of the 1005 type chip is 0.3 mm, and the width of the electrode 1 of the 1608 type chip is 0.4 mm, and the width of the electrode 1 of the 1005 type chip is 0.4 mm.
If you want to accurately contact two terminals in the area, the gap between the two terminals (setting interval l1
) can only be about 0.1 mm, and the dimension between the parallel measurement terminals (set interval l) in the multi-chip t
2) is also only about 0.2 mm, so the measuring terminal of the above conventional configuration cannot handle it.

【0006】なお、従来、図7に示すような細径線を曲
成して設けた線状測定端子aが使用されているが、これ
は、本発明のようにバラの状態にある個々のチップの測
定を行うものではなく、プリント基板16上に既に実装
されたチップtの測定に使用するものであり、該線状端
子を備えた装置をプリント基板16上に移動して各端子
2′先端とチップtの電極1との位置を顕微鏡操作で精
密に調整したのち、直角に曲げた針先のような端子2′
を下降接触して測定するものであるが、これには下記の
ような欠点があった。
[0006] Conventionally, a linear measurement terminal a formed by bending a thin wire as shown in FIG. This device is not used to measure chips, but is used to measure chips t already mounted on the printed circuit board 16, and the device equipped with the wire terminals is moved onto the printed circuit board 16 and each terminal 2' After precisely adjusting the position of the tip and the electrode 1 of the tip t using a microscope, a terminal 2' shaped like a needle tip bent at a right angle is attached.
However, this method had the following drawbacks.

【0007】チップの超小形化に対応するためには線径
を益々小径にせざるを得ず、よって、外力で簡単に変形
するため正しい端子先端間のギャップを設定保持するこ
とが難しく、現在、この調整作業は顕微鏡を使用した手
作業によっており、難作業なため精度が低い上に製造効
率が極めて低く、量産に適さない。
In order to cope with the miniaturization of chips, the diameter of the wire must be made smaller and smaller.As a result, it is difficult to set and maintain the correct gap between the terminal tips because it is easily deformed by external force. This adjustment work is done manually using a microscope, which is difficult and has low precision, as well as extremely low manufacturing efficiency, making it unsuitable for mass production.

【0008】線状端子の先端間隔は極小であるが、未端
部は外線に接続する必要上、広い間隔を要し、よって、
測定端子a全体としては大形となる。
[0008] Although the distance between the tips of the wire terminals is extremely small, the unended portion requires a wide distance because it is necessary to connect it to the outside wire.
The measurement terminal a as a whole is large.

【0009】線径が小なため、測定時の電極に対する圧
接力が小さく、接触不良を生じ、また、上方から下降し
てチップの電極の上面に接触せねばならぬため、位置合
わせが極めて難しく、そのための周辺精密機器を必要と
する。
[0009] Because the wire diameter is small, the pressure force against the electrode during measurement is small, resulting in poor contact, and alignment is extremely difficult because the wire must descend from above to contact the top surface of the electrode on the tip. , which requires peripheral precision equipment.

【0010】上記の理由からして、極めて高価である。[0010] For the reasons mentioned above, it is extremely expensive.

【0011】[0011]

【本発明の目的】本発明は、上記従来の課題を下記の方
法、手段で解決したものであり、それによって、性能が
秀れ、製品精度が高く、製造簡単で量産に適し、従来に
比し、極めて安価な、超小形チップ測定用の測定端子を
提供せんとするものである。
[Object of the present invention] The present invention solves the above-mentioned conventional problems by the following methods and means, and thereby achieves excellent performance, high product precision, easy manufacturing, suitable for mass production, and compared to conventional methods. However, it is an object of the present invention to provide an extremely inexpensive measurement terminal for measuring ultra-small chips.

【0012】0012

【課題を解決するための手段】本発明は、上端面をチッ
プ型電子部品の電極に接触する端子とし、下方部をリー
ドとした、狭長板状の導電性金属薄板からなる端子片を
設け、樹立状態に備えた各端子片の端子を設定間隔l1
 若しくはl2 をおいて並列すると共に、該並列した
ものを相対する各端子間に設定間隔l3 をおいて左右
対称に配置した状態に、プラスチック、シリコン等の誘
電体からなるホルダーに埋設して構成した、チップ型電
子部品の測定端子によって課題を解決したものである。
[Means for Solving the Problems] The present invention provides a terminal piece made of a thin conductive metal plate in the form of a narrow plate, whose upper end surface serves as a terminal that contacts the electrode of a chip-type electronic component, and whose lower part serves as a lead. The terminals of each terminal piece in preparation for the established state are set at intervals l1
Alternatively, they are arranged in parallel with a distance of l2, and the paralleled devices are buried in a holder made of a dielectric material such as plastic or silicon, with the parallel terminals placed symmetrically with a set interval of l3 between the opposing terminals. This problem was solved by using a measurement terminal for a chip-type electronic component.

【0013】また、本発明は、上端面を端子とし下方部
をリードとした端子片を設ける一方、プラスチック等の
誘電体に各端子片を嵌合する嵌合孔を、縦方向に、また
各嵌合孔を設定間隔l1 若しくはl2 をおいて並列
貫設すると共に、設定間隔l3 をおいた対称位置に嵌
合孔を同じく並列貫設したホルダーを設け、該ホルダー
の各嵌合孔に端子片を、ホルダー上面と各端子が面一に
なるように嵌合して構成したことを特徴とする、チップ
型電子部品の測定端子の製造法によって、課題を解決し
たものであり、
Further, the present invention provides a terminal piece with a terminal on the upper end surface and a lead on the lower part, and a fitting hole for fitting each terminal piece in the dielectric material such as plastic, in the vertical direction and in each case. A holder is provided in which the fitting holes are passed through in parallel at a set interval l1 or l2, and the fitting holes are also passed through in parallel at symmetrical positions with a set interval l3, and a terminal piece is inserted into each fitting hole of the holder. This problem has been solved by a method of manufacturing a measurement terminal for a chip-type electronic component, which is characterized in that the top surface of the holder and each terminal are fitted flush with each other.

【0014】更に、本発明は、短筒状誘電体の上下面に
夫々端子片挿通孔を配設した治具を取付け、該上下治具
の各端子片挿通孔に端子片を挿通セットしたのち、短筒
状誘電体内にシリコン等の誘電性材を注入して、各端子
片を誘電性材中に埋設した状態とし、誘電性材の硬化後
、上下治具を取外し、上面に突出した端子片をカットし
たのち、該上面の誘電性材と端子を面一に研磨して、ユ
ニット測定端子を設け、該ユニット測定端子をホルダー
のユニット測定端子嵌合孔に嵌着して構成するようにし
たことを特徴とする、チップ型電子部品の測定端子の製
造法によって、課題を解決したものである、
Furthermore, in the present invention, jigs having terminal piece insertion holes are attached to the upper and lower surfaces of the short cylindrical dielectric body, and after the terminal pieces are inserted and set into the respective terminal piece insertion holes of the upper and lower jigs. A dielectric material such as silicon is injected into the short cylindrical dielectric body, each terminal piece is buried in the dielectric material, and after the dielectric material has hardened, the upper and lower jigs are removed and the terminals protrude from the top surface. After cutting the piece, the dielectric material on the top surface and the terminal are polished flush, a unit measurement terminal is provided, and the unit measurement terminal is fitted into the unit measurement terminal fitting hole of the holder. This problem has been solved by a method for manufacturing measurement terminals for chip-type electronic components, which is characterized by:

【0015
0015
]

【実施例】上端面をチップtの電極1に接触する端子2
とし、下方部をリード2bとした、狭長板状の導電性金
属薄板からなる端子片2aを設け、樹立状態に備えた各
端子片2aの端子2を設定間隔l1 若しくはl2 を
おいて並列すると共に、該並列したものを相対する各端
子2間に設定間隔l3 をおいて左右対称に配置した状
態に、プラスチック、シリコン等の誘電体からなるホル
ダー5に埋設してチップ型電子部品の測定端子Aを構成
したものである。
[Example] Terminal 2 whose upper end surface contacts electrode 1 of chip t
A terminal piece 2a made of a narrow plate-shaped conductive metal thin plate with a lead 2b at the lower part is provided, and the terminals 2 of each terminal piece 2a prepared for the established state are arranged in parallel at a set interval l1 or l2. , the parallel ones are arranged symmetrically with a set interval 13 between the opposing terminals 2, and are buried in a holder 5 made of a dielectric material such as plastic or silicon to obtain the measurement terminal A of the chip type electronic component. It is composed of

【0016】上記測定端子Aにおいて、単体チップtの
端子の並列設定間隔をl1 とし、多連型チップtにお
ける隣接する単体チップt相互間の並列設定間隔をl2
 とする。
In the measurement terminal A, the parallel setting interval between the terminals of the single chip t is l1, and the parallel setting interval between adjacent single chips t in the multiple chip t is l2.
shall be.

【0017】よって、単体チップtの場合は、当然、4
枚の端子片2aを端子2、2間に設定間隔l1 をおい
た状態で、設定間隔l2 をおいて左右2枚宛対称に並
列設置したものであり、チップの連数の増減に応じて、
端子片2aが4枚宛増減することとなる。
Therefore, in the case of a single chip t, naturally 4
Two terminal pieces 2a are installed symmetrically in parallel on the left and right at a set interval l2 with a set interval l1 between the terminals 2 and 2, and depending on the increase or decrease in the number of chips,
The number of terminal pieces 2a will be increased or decreased by four pieces.

【0018】なお、端子片2aは例えば厚さ0.1mm
、幅0.2〜0.3mmのリン青銅板で設ける。並列端
子2、2の設定間隔l1 は0.1mm位、並列端子の
内、4連型チップt用の場合のチップ対チップ間の端子
2、2の設定間隔l2 は0.2mm位に設ける。また
、相対した端子2、2間の設定間隔l3 は0.6〜0
.8mm位に設定する。
Note that the terminal piece 2a has a thickness of 0.1 mm, for example.
, provided with a phosphor bronze plate with a width of 0.2 to 0.3 mm. The set interval 11 between the parallel terminals 2, 2 is set at about 0.1 mm, and the set interval 12 between the terminals 2, 2 between the chips in the case of a quadruple chip t among the parallel terminals is set at about 0.2 mm. Also, the setting interval l3 between the opposing terminals 2 and 2 is 0.6 to 0.
.. Set it to about 8mm.

【0019】また、必要に応じて、端子片2aのリード
2b部分に切り込みを付するなどにより、端子2に対す
る垂直荷重(測定チップtの圧接)に弾発する弾性部6
を形成する。該弾性部6は、例えばケミカルエッチング
加工やワイヤーカット放電加工によって形成する。
Further, if necessary, by making a notch in the lead 2b portion of the terminal piece 2a, an elastic portion 6 that resiliently responds to the vertical load on the terminal 2 (pressure contact of the measuring tip t) can be formed.
form. The elastic portion 6 is formed by, for example, chemical etching or wire-cut electrical discharge machining.

【0020】符号15はホルダー5の取付孔を示す。Reference numeral 15 indicates a mounting hole for the holder 5.

【0021】[0021]

【製造法の実施例1】上端面を端子2とし下方部をリー
ド2bとした端子片2aを設ける一方、
[Example 1 of the manufacturing method] A terminal piece 2a is provided with a terminal 2 on the upper end surface and a lead 2b on the lower part,

【0022】円
柱状の誘電体に各端子片2aを嵌合する嵌合孔7を、縦
方向に、また各嵌合孔7を設定間隔l1 若しくはl2
 をおいて並列に貫設すると共に、設定間隔l3 をお
いた対称位置に嵌合孔7を同じく並列に貫通したコアホ
ルダー5aを、プラスチックの成形加工によって設け、
The fitting holes 7 for fitting each terminal piece 2a into the cylindrical dielectric body are arranged in the vertical direction and each fitting hole 7 is set at a set interval l1 or l2.
Core holders 5a are provided by plastic molding process, and core holders 5a are inserted through the fitting holes 7 in parallel at symmetrical positions with a set interval l3.

【0023】該コアホルダー5aの各嵌合孔7に端子片
2aを、コアホルダー5a上面と各端子片2aが面一に
なるように嵌合してユニット測定端子A´を設け、
A unit measurement terminal A' is provided by fitting the terminal piece 2a into each fitting hole 7 of the core holder 5a so that the upper surface of the core holder 5a and each terminal piece 2a are flush with each other,

【0
024】該ユニット測定端子A´のコアホルダー5aの
下面に突出した各端子片2aのリード2bを接着剤9で
接着することによって、各端子片2aをコアホルダー5
aに固着し、
0
[024] By bonding the leads 2b of each terminal piece 2a protruding from the bottom surface of the core holder 5a of the unit measurement terminal A' with adhesive 9, each terminal piece 2a is attached to the core holder 5a.
sticks to a,

【0025】該ユニット測定端子A´を、同じくプラス
チックの成形加工によって設けた台形のホルダー5のユ
ニット測定端子嵌合孔8に嵌合固着して、本発明チップ
型電子部品の測定端子Aを製造したものである。
The unit measuring terminal A' is fitted and fixed into the unit measuring terminal fitting hole 8 of the trapezoidal holder 5, which is also formed by molding plastic, to produce the measuring terminal A of the chip-type electronic component of the present invention. This is what I did.

【0026】[0026]

【製造法の実施例2】短筒状誘電体10の上下面に夫々
端子片挿通孔11を配設した上下治具12、13を取付
け、
[Embodiment 2 of manufacturing method] Upper and lower jigs 12 and 13 each having a terminal piece insertion hole 11 are attached to the upper and lower surfaces of a short cylindrical dielectric body 10,

【0027】該上下治具12、13の各端子片挿通孔1
1に端子片2aを挿通セットしたのち、
Each terminal piece insertion hole 1 of the upper and lower jigs 12 and 13
After inserting and setting the terminal piece 2a into 1,

【0028】短
筒状誘電体10内にシリコン等の誘電性材14を注入し
て、各端子片2aを誘電性材14中に埋設した状態とし
A dielectric material 14 such as silicon is injected into the short cylindrical dielectric 10 so that each terminal piece 2a is buried in the dielectric material 14,

【0029】誘電性材14の硬化後、上下治具12、1
3を取外し、
After curing the dielectric material 14, the upper and lower jigs 12, 1
Remove 3,

【0030】上面に突出した端子片2aをカットしたの
ち、該上面の誘電性材14と端子2を面一に研磨して、
ユニット測定端子A´を設け、
After cutting the terminal piece 2a protruding from the top surface, the dielectric material 14 on the top surface and the terminal 2 are polished to be flush with each other.
A unit measurement terminal A' is provided,

【0031】該ユニット測定端子A´をホルダー5のユ
ニット測定端子嵌合孔8に嵌合固着して、本発明チップ
型電子部品の測定端子Aを製造したものである。
The unit measurement terminal A' was fitted and fixed into the unit measurement terminal fitting hole 8 of the holder 5, thereby manufacturing the measurement terminal A of the chip type electronic component of the present invention.

【0032】なお、下治具13の各端子片挿通孔11の
設定間隔l1 、l2 、及びl3 を上治具12に比
し大とすることによって、リード2b末端相互の間隔を
大として、該リード2b末端に対する外線の接続を容易
としたものである。
Furthermore, by making the set intervals l1, l2, and l3 of each terminal piece insertion hole 11 of the lower jig 13 larger than that of the upper jig 12, the mutual interval between the ends of the leads 2b is increased. This facilitates the connection of the external wire to the end of the lead 2b.

【0033】また、誘電性材14として、注入硬化後も
柔軟で弾力性のあるシリコン等を使用することによって
、該誘電性材14中に埋設された端子片2aに、その端
子2に対する垂直荷重(測定チップの圧接)に対して端
子片2aが僅かに撓み弾発復元し得るばね弾発性を保有
せしめたものである。
Furthermore, by using silicone or the like as the dielectric material 14, which remains flexible and elastic even after injection hardening, the vertical load on the terminal 2 can be applied to the terminal piece 2a embedded in the dielectric material 14. The terminal piece 2a is made to have spring elasticity so that it can be slightly bent and restored when the measuring chip is pressed into contact with the measuring chip.

【0034】[0034]

【作用及び効果】チップtの電極1に対して測定端子A
の端子2を接触して測定を行う場合、図3に示すように
チップtの電極の3面、即ち、上面、側面または底面が
あるが、上面は抵抗体4の形成が不揃いで電極1まで喰
み出して電極1面が狭くなっている場合が多い上に、該
抵抗体4が盛り上っているため、それに衝突して端子2
が接触不能な恐れがあって好ましくない(上記
[Operation and Effect] Measurement terminal A is connected to electrode 1 of chip t.
When making a measurement by touching the terminal 2 of the chip t, there are three surfaces of the electrode of the chip t, that is, the top surface, the side surface, and the bottom surface, as shown in FIG. In many cases, the electrode 1 surface becomes narrow due to protrusion, and the resistor 4 is raised, so it collides with the resistor 4 and the terminal 2
is undesirable because it may become unreachable (the above

【000
6】及び図7に記載の従来例では、それに対応するため
端子2を直角に曲げて、針先のような端子先端だけが接
触するようにしている。)
000
6] and the conventional example shown in FIG. 7, in order to accommodate this, the terminal 2 is bent at a right angle so that only the tip of the terminal, such as a needle tip, makes contact. )

【0035】また、側面は測定チップを定位置に支持す
るための治具の作用面に使用する場合が多く、
[0035] Furthermore, the side surface is often used as the working surface of a jig for supporting the measurement chip in a fixed position.

【003
6】従って、底面が電極1が必ず平面的に露出して面積
も広く、抵抗体4のような障害物もないので、端子2の
接触に最適である。
003
6. Therefore, the electrode 1 is always exposed flat on the bottom surface, the area is large, and there is no obstacle such as the resistor 4, making it ideal for contacting the terminal 2.

【0037】本発明測定端子Aは、チップtの電極1に
底面側から接触して測定するもので、冒頭記載の諸工程
で移動途中のチップtを、測定端子Aの各端子2上に載
せ、上方からチップtを僅かに加圧押下すると、端子片
2aの上端面の端子2が電極1に圧接して端子片2aが
僅かに屈縮若しくは撓むが、同時に弾性部等で反発され
て、よって、正確に接触が保持されて、安定状態で通電
測定し得る。
The measurement terminal A of the present invention is used for measurement by contacting the electrode 1 of the chip t from the bottom side, and the chip t, which is being moved in the steps described at the beginning, is placed on each terminal 2 of the measurement terminal A. When the chip t is slightly pressed down from above, the terminal 2 on the upper end surface of the terminal piece 2a comes into pressure contact with the electrode 1, and the terminal piece 2a slightly bends or bends, but at the same time it is repelled by the elastic part etc. Therefore, contact can be maintained accurately and energization measurement can be performed in a stable state.

【0038】また、本発明測定端子はリン青銅等の金属
薄板等で各端子片2aを形成したものであるので、量産
に適する上に、0.1mm以下の極めて狭幅な端子の製
作も、容易に極めて精密になし得る。
Furthermore, since the measurement terminal of the present invention has each terminal piece 2a formed of a metal thin plate such as phosphor bronze, it is suitable for mass production and also allows for the production of extremely narrow terminals of 0.1 mm or less. It can be easily done with great precision.

【0039】上記のようにして得た各端子片2aをホル
ダー5若しくはコアホルダー5aに埋設するにつき、上
記のような製造方法によったため、従来の如く顕微鏡を
使用した手作業などの極めて困難な作業なしに、端子2
、2間その他のギャップが高精度に設定された状態の測
定端子Aを極めて簡単に製造し得る。
In order to embed each terminal piece 2a obtained as described above in the holder 5 or core holder 5a, since the above manufacturing method is used, it is extremely difficult to embed it by hand using a microscope as in the past. Terminal 2 without any work
, 2, and other gaps are set with high accuracy, it is possible to manufacture the measurement terminal A very easily.

【0040】即ち、端子片を樹立状態に誘電体中に埋設
設置して測定端子を構成したものであるので、誘電体の
介在によって並設端子間のギャップを極小寸法に設定し
得る上に、端子同志の誤接触などを生じない状態に極め
て高精度に設置し得る。
That is, since the measurement terminal is constructed by embedding the terminal piece in the dielectric material in an established state, the gap between the parallel terminals can be set to an extremely small size due to the interposition of the dielectric material, and, It can be installed with extremely high precision without causing erroneous contact between terminals.

【0041】従って、従来の線状端子等では対応するの
が困難であった、例えば1005型、1608型のよう
な超小形チップ及びその多連型チップにも対応し得る測
定端子を提供し得る。
[0041] Therefore, it is possible to provide a measurement terminal that is compatible with ultra-small chips such as 1005 type and 1608 type chips and their multiple chips, which have been difficult to handle with conventional wire terminals. .

【0042】従来の測定端子の場合、チップの小形化に
従って当然その線径等が制約されて、それらの寸法が極
めて小さくならざるを得ず、その結果、測定時のチップ
の接触圧もそれらが変形しない限度内で行わねばならぬ
ため接触不良を生じ、また、端子の断面積が小であるた
め測定に充分な電流容量が得られないなどの重大な欠点
があったが、
In the case of conventional measurement terminals, as the chips become smaller, their wire diameters, etc. are naturally restricted, and their dimensions have to become extremely small.As a result, the contact pressure of the chips during measurement also increases. This had serious drawbacks, such as poor contact because it had to be carried out within limits that would not cause deformation, and insufficient current capacity for measurement due to the small cross-sectional area of the terminal.

【0043】その点本発明は端子片を樹立状態に誘電体
中に埋設設置したので、前記のように端子間のギャップ
を極小にし得るばかりでなく、端子に大きな垂直荷重即
ちチップ測定時の圧接荷重が加わっても、端子片の弾性
部等の弾発作用で正確に対応し得て、チップの電極と端
子の強固確実な接触状態が得られ、更に端子の断面積が
従来に比し格段に大であるので、大きな電流容量が得ら
れる。
In this regard, in the present invention, since the terminal pieces are embedded in the dielectric material in an upright state, it is possible not only to minimize the gap between the terminals as described above, but also to avoid a large vertical load on the terminals, that is, pressure welding during chip measurement. Even if a load is applied, the elastic part of the terminal piece can respond accurately to the elastic part, ensuring a strong and reliable contact between the tip electrode and the terminal, and the cross-sectional area of the terminal is much larger than before. Since the current capacity is large, a large current capacity can be obtained.

【0044】また、本発明は2以上の測定端子を相互間
に小さな間隔をおいて何ら支障なく並列設置し得るので
、2連以上の多連型チップ用の測定端子を簡単に構成し
得る。
Furthermore, according to the present invention, two or more measurement terminals can be arranged in parallel with a small interval between them without any problem, so that measurement terminals for two or more multi-chip types can be easily constructed.

【0045】端子片を樹立状態に並設しそのリードをホ
ルダー下面に突出したので、該リードを適宜曲成して外
線を容易に接続することができ、従って、従来の如く外
線接続部のスペースの確保が問題になるようなことがな
い。
Since the terminal pieces are arranged side by side in an erected state and their leads protrude from the bottom surface of the holder, the external wires can be easily connected by appropriately bending the leads. There has never been a problem with securing.

【0046】従来の線状測定端子や、出願人が先に出願
した平板片状測定端子は、チップとの摩擦磨耗によって
耐久性に欠ける難点があったが、本発明はホルダーに樹
立埋設した端子片の上端面を端子とするものであるため
、端子の磨耗が進んだときは、例えばユニット測定端子
の上面を再研磨して、謂わば金太郎アメ式に、何度でも
再生使用し得る秀れた利点がある。
[0046] Conventional wire-shaped measuring terminals and the flat plate-like measuring terminals that the applicant previously applied for had the disadvantage of lacking durability due to frictional wear with the chip, but the present invention uses terminals that are embedded vertically in a holder. Since the top end surface of the piece is used as a terminal, when the terminal wears out, for example, the top surface of the unit measurement terminal can be re-polished, making it an excellent product that can be reused as many times as you like. There are some advantages.

【0047】上記からして、本発明は、小形で、高精度
で、量産に適し、また耐久性に秀れた測定端子を極めて
安価に提供し得る秀れた特長がある。
From the above, the present invention has the excellent feature of providing a measurement terminal that is small, highly accurate, suitable for mass production, and has excellent durability at an extremely low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の実施例測定端子(4連型チップ用)の
構成概略を示す平面図及びB−B断面図。
FIG. 1 is a plan view and a cross-sectional view taken along the line B-B showing a schematic configuration of a measurement terminal (for four-chip type) according to an embodiment of the present invention.

【図2】端子片の正面図及び平面図。FIG. 2 is a front view and a plan view of a terminal piece.

【図3】単体チップの正面図、平面図及び底面図。FIG. 3 is a front view, a top view, and a bottom view of a single chip.

【図4】4連型チップの正面図、平面図及び底面図。FIG. 4 is a front view, a top view, and a bottom view of a quadruple chip.

【図5】本発明実施例1の製造法の説明図。FIG. 5 is an explanatory diagram of the manufacturing method of Example 1 of the present invention.

【図6】本発明実施例2の製造法の説明図。FIG. 6 is an explanatory diagram of the manufacturing method of Example 2 of the present invention.

【図7】従来の4連型チップ用線状測定端子の平面図及
び横断面図。
FIG. 7 is a plan view and a cross-sectional view of a conventional linear measurement terminal for a four-chip type.

【符号の説明】[Explanation of symbols]

A    本発明測定端子 A´  ユニット測定端子 a    従来の測定端子 l1 、l2 、l3   端子間の設定寸法t   
 チップ型電子部品(単体チップ、多連型チップ)1 
   電極 2    端子 2′  従来の線状端子 2a  端子片 2b  リード 3    セラミック基板 4    抵抗体 5    ホルダー 5a  コアホルダー 6    弾性部 7    嵌合孔 8    ユニット測定端子嵌合孔 9    接着剤 10  短筒状誘電体 11  端子挿通孔 12  上治具 13  下治具 14  誘電性材 15  取付孔 16  プリント基板
A Measurement terminal of the present invention A' Unit measurement terminal a Conventional measurement terminal l1, l2, l3 Set dimension t between terminals
Chip-type electronic components (single chip, multiple chip) 1
Electrode 2 Terminal 2' Conventional wire terminal 2a Terminal piece 2b Lead 3 Ceramic substrate 4 Resistor 5 Holder 5a Core holder 6 Elastic part 7 Fitting hole 8 Unit measurement terminal fitting hole 9 Adhesive 10 Short cylindrical dielectric 11 Terminal insertion hole 12 Upper jig 13 Lower jig 14 Dielectric material 15 Mounting hole 16 Printed circuit board

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】上端面をチップ型電子部品の電極に接触す
る端子とし、下方部をリードとした、狭長板状の導電性
金属薄板からなる端子片を設け、樹立状態に備えた各端
子片の端子を設定間隔l1 若しくはl2 をおいて並
列すると共に、該並列したものを相対する各端子間に設
定間隔l3 をおいて左右対称に配置した状態に、プラ
スチック、シリコン等の誘電体からなるホルダーに埋設
して構成した、チップ型電子部品の測定端子。
Claim 1: Each terminal piece is provided with a terminal piece made of a narrow plate-shaped conductive metal thin plate, the upper end surface of which is a terminal that contacts the electrode of a chip-type electronic component, and the lower part of which is a lead, and each terminal piece is prepared in an established state. A holder made of a dielectric material such as plastic or silicon is used to hold the terminals arranged in parallel with a set interval l1 or l2, and the paralleled terminals are arranged symmetrically with a set interval l3 between each opposing terminal. A measurement terminal for a chip-type electronic component configured by being embedded in the .
【請求項2】単体チップ型電子部品の測定端子の端子の
並列設定間隔をl1とし、多連型チップ型電子部品の測
定端子における隣接する単体チップ型電子部品相互間の
並列設定間隔をl2 とした請求項1のチップ型電子部
品の測定端子。
2. The parallel setting interval between the measurement terminals of the single chip electronic component is l1, and the parallel setting interval between adjacent single chip electronic components at the measurement terminal of the multiple chip electronic component is l2. A measurement terminal for a chip-type electronic component according to claim 1.
【請求項3】端子片のリード部分に切り込みを付するな
どにより、端子に対する垂直荷重に弾発する弾性部を形
成した、請求項1のチップ型電子部品の測定端子。
3. The measurement terminal for a chip-type electronic component according to claim 1, wherein an elastic portion is formed by making a notch in the lead portion of the terminal piece so as to be resilient to a vertical load on the terminal.
【請求項4】上端面を端子とし下方部をリードとした端
子片を設ける一方、プラスチック等の誘電体に各端子片
を嵌合する嵌合孔を、縦方向に、また各嵌合孔を設定間
隔l1 若しくはl2 をおいて並列貫設すると共に、
設定間隔l3 をおいた対称位置に嵌合孔を同じく並列
貫設したホルダーを設け、該ホルダーの各嵌合孔に端子
片を、ホルダー上面と各端子が面一になるように嵌合し
て構成したことを特徴とする、チップ型電子部品の測定
端子の製造法。
4. A terminal piece is provided with the upper end surface as a terminal and the lower part as a lead, and fitting holes for fitting each terminal piece in a dielectric material such as plastic are provided in the vertical direction, and each fitting hole is In parallel installation with a set interval l1 or l2,
A holder is provided with fitting holes extending in parallel at symmetrical positions with a set interval l3, and a terminal piece is fitted into each fitting hole of the holder so that the top surface of the holder and each terminal are flush with each other. A method for manufacturing a measurement terminal for a chip-type electronic component, characterized by comprising:
【請求項5】ホルダー下面に突出した各端子片のリード
を接着剤で接着することによって、各端子片をホルダー
に固着するようにした、請求項4のチップ型電子部品の
測定端子の製造法。
5. The method for manufacturing a measurement terminal for a chip-type electronic component according to claim 4, wherein each terminal piece is fixed to the holder by bonding the lead of each terminal piece protruding from the lower surface of the holder with an adhesive. .
【請求項6】嵌合孔を穿設したホルダーをプラスチック
の成形加工によって設けるようにした、請求項4のチッ
プ型電子部品の測定端子の製造法。
6. The method for manufacturing a measurement terminal for a chip-type electronic component according to claim 4, wherein the holder with the fitting hole is provided by molding plastic.
【請求項7】円柱状の誘電体に各端子片の嵌合孔を貫設
してコアホルダーを設け、該コアホルダーの嵌合孔に端
子片を嵌合してユニット測定端子を設け、該ユニット測
定端子をホルダーのユニット測定端子嵌合孔に嵌着して
構成するようにした、請求項4のチップ型電子部品の測
定端子の製造法。
7. A core holder is provided by penetrating a cylindrical dielectric body with a fitting hole for each terminal piece, and a unit measurement terminal is provided by fitting the terminal piece into the fitting hole of the core holder. 5. The method of manufacturing a measurement terminal for a chip-type electronic component according to claim 4, wherein the unit measurement terminal is fitted into a unit measurement terminal fitting hole of the holder.
【請求項8】ホルダー及びコアホルダーをプラスチック
の成形加工によって設けるようにした、請求項4のチッ
プ型電子部品の測定端子の製造法。
8. The method for manufacturing a measurement terminal for a chip-type electronic component according to claim 4, wherein the holder and the core holder are provided by molding plastic.
【請求項9】短筒状誘電体の上下面に夫々端子片挿通孔
を配設した治具を取付け、該上下治具の各端子片挿通孔
に端子片を挿通セットしたのち、短筒状誘電体内にシリ
コン等の誘電性材を注入して、各端子片を誘電性材中に
埋設した状態とし、誘電性材の硬化後、上下治具を取外
し、上面に突出した端子片をカットしたのち、該上面の
誘電性材と端子を面一に研磨して、ユニット測定端子を
設け、該ユニット測定端子をホルダーのユニット測定端
子嵌合孔に嵌着して構成するようにしたことを特徴とす
る、チップ型電子部品の測定端子の製造法。
9. Attach a jig with a terminal piece insertion hole to the upper and lower surfaces of the short cylindrical dielectric, and insert and set the terminal piece into each terminal piece insertion hole of the upper and lower jigs. A dielectric material such as silicon was injected into the dielectric material, and each terminal piece was buried in the dielectric material. After the dielectric material had hardened, the upper and lower jigs were removed and the terminal pieces protruding from the top were cut. Afterwards, the dielectric material and the terminal on the upper surface are polished flush, a unit measurement terminal is provided, and the unit measurement terminal is fitted into the unit measurement terminal fitting hole of the holder. A method for manufacturing measurement terminals for chip-type electronic components.
【請求項10】下治具の各端子片挿通孔の設定間隔l1
 、l2 、及びl3 を上治具に比し大とすることに
よって、リード末端相互の間隔を大として、該リード末
端に対する外線の接続が容易なユニット測定端子を設け
るようにした、請求項9のチップ型電子部品の測定端子
の製造法。
Claim 10: Setting interval l1 of each terminal piece insertion hole of the lower jig.
, l2, and l3 are made larger than those of the upper jig, thereby increasing the distance between the lead ends and providing unit measurement terminals that allow easy connection of external wires to the lead ends. A method for manufacturing measurement terminals for chip-type electronic components.
JP4774891A 1991-02-20 1991-02-20 Measuring terminal of chip type electronic part and manufacture thereof Pending JPH04265864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4774891A JPH04265864A (en) 1991-02-20 1991-02-20 Measuring terminal of chip type electronic part and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4774891A JPH04265864A (en) 1991-02-20 1991-02-20 Measuring terminal of chip type electronic part and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH04265864A true JPH04265864A (en) 1992-09-22

Family

ID=12783975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4774891A Pending JPH04265864A (en) 1991-02-20 1991-02-20 Measuring terminal of chip type electronic part and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH04265864A (en)

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