JPH04264530A - Active matrix display device - Google Patents

Abstract

PURPOSE:To expand a numerical aperture without the presence of a crossing part of a gate bus wiring and a source bus wiring. CONSTITUTION:The source electrode 15 of a TFT 1 is electrically connected to a gate bus wiring 2 in the next string via a transparent electrode line 17 and a pixel electrode 19 is superposed on the transparent electrode line 17, as well. A video signal electrode for which a video signal is inputted is provided on a substrate opposed to an active matrix substrate 30 and a correction signal which is a base for the video signal is inputted to the gate bus wiring in the string next to the gate bus wiring for which a scanning signal is inputted.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix display device using thin film transistors (hereinafter referred to as "TFT").

0002

2. Description of the Related Art FIG. 10 shows a sectional view of a conventional active matrix display device. FIG. 11 shows an equivalent circuit diagram of the active matrix display device of FIG. 10. In the active matrix substrate 150, as shown in FIG. 10, TFTs 102 and picture element electrodes 103 are provided in a matrix on a first insulating substrate 101 made of glass or the like. T
The FT 102 has a gate bus wiring 11 that supplies scanning signals.
4 and a source bus wiring 115 for supplying video signals are connected (FIG. 11). Furthermore, an alignment film 104 usually made of a polyimide film is formed on the entire surface of this substrate, and the alignment film 104 is subjected to an alignment treatment (FIG. 10).

[0003] In the counter substrate 160, the second insulating substrate 1
A counter electrode 106 made of a transparent electrode is formed on almost the entire surface of the substrate 05, and an alignment film 107 that has been subjected to an alignment treatment is formed on the counter electrode 106. A plastic bead 109 is sandwiched between the active matrix substrate 150 and the counter substrate 160 as a spacer to keep the distance between the substrates 150 and 160 constant. As shown in FIG. 9, the active matrix substrate 150 and the counter substrate 160 are bonded together so that their long sides intersect with each other.
As shown in FIG. 10, an active matrix substrate 150
A liquid crystal 110 is sealed between the substrate 160 and the counter substrate 160 using a sealing resin 108.

[0004] In this active matrix display device,
A liquid crystal layer 1 is provided between the picture element electrode 103 and the counter electrode 106.
10 and alignment films 104 and 107, which form a capacitor 111 as shown in FIG. One electrode of the capacitor 111 is a picture element electrode 103, and the other electrode is a counter electrode 106. Picture element electrode 1
03 is connected to the drain electrode 102d of the TFT 102, and the counter electrode 106 is connected to a common wiring 112 common to each counter electrode 106. A source bus wiring 115 is connected to the source electrode 102s of the TFT 102. The gate bus wiring 114 and the source bus wiring 115 are each connected to an electrode terminal on the outside of the seal resin 108.

In order to drive the active matrix display device shown in FIG.
Each TFT 102 connected to 14 is turned on. When a video signal 117 is input from the source bus wiring 115 in synchronization with this scanning pulse signal, each picture element electrode 1
A voltage is applied to the liquid crystal layer between 03 and the counter electrode 106 to perform display. The counter electrode 106 includes a picture element electrode 10
A DC bias voltage 118 is applied to cancel the DC component added to the voltage.

In the conventional active matrix display device shown in the equivalent circuit diagram of FIG.
Since the source bus wirings 115 cross each other on the substrate through an insulating film, short circuits between these wirings, disconnection defects at stepped portions, etc. are likely to occur, making it difficult to obtain display devices with a high yield. There is a point.

[0007] As a solution to these problems,
There is a display device described in Japanese Patent Application No. 2-24902. This display device has a configuration shown in the equivalent circuit diagram of FIG. 12, and one example of an active matrix substrate constituting the display device is shown in the plan view of FIG. 13. In this display device, the gate electrode 2a of the TFT 1 is connected to the gate bus wiring 2, and the source electrode 15 of the TFT 1 is connected to the gate bus line 2.
This TFT 1 is connected via an electrode line 37 to the gate bus wiring 2 to which the gate electrode 15 of the TFT 1 in the next column is connected. The electrode wire 37 is made of a metal thin film such as Ti, and is connected to the gate bus line 2 through a contact hole 25 formed in an insulating film on the gate bus line 2, as shown in FIG. On the counter substrate facing FIG. 13, a video signal electrode 4 is formed facing each picture element electrode 19. Each video signal electrode 4 arranged in a direction intersecting the gate bus wiring 2 is connected to a common video signal line 34.

[0008]

[Problems to be Solved by the Invention] In this display device, since there is no source bus wiring for supplying video signals on the active matrix substrate, the above-mentioned short circuit between the gate bus wiring and source bus wiring and disconnection at the stepped portion occur. It is possible to solve the problem that defects are likely to occur. but,
In this display device, since there is an electrode line 37 made of a metal thin film that electrically connects the source electrode 15 of the TFT 1 and the gate bus line 2, the area of the picture element electrode 19 cannot be increased. Therefore, there is a problem that the aperture ratio of the display screen cannot be increased.

The present invention solves these problems, and an object of the present invention is to provide an active matrix display device in which there are no intersections between gate bus lines and source bus lines, and which has a large aperture ratio. It is to provide.

0010

Means for Solving the Problems The active matrix display device of the present invention includes first and second insulating substrates, a liquid crystal layer sealed between the first and second substrates, and a liquid crystal layer sealed between the first and second insulating substrates. Picture element electrodes provided in a row on a substrate, thin film transistors connected to each of the picture element electrodes to form a row, gate bus wiring connected to the gate electrode of the thin film transistor, and a row of thin film transistors connected to each of the picture element electrodes. a transparent electrode line for connecting the source electrode of the thin film transistor to the gate bus wiring connected to the thin film transistor in the next column; and a transparent electrode line provided on the second substrate opposite to each of the picture element electrodes. The picture element electrode is superimposed on the transparent electrode line with an insulating film interposed therebetween, thereby achieving the above object.

[0011]

[Examples] Examples of the present invention will be described below.

FIG. 1 shows a plan view of an active matrix substrate constituting the display device of this embodiment. 2(a) is a cross-sectional view taken along line A-A in FIG. 1, and FIG. 2(b) is a cross-sectional view along line A-A in FIG.
-A cross-sectional view taken along line B is shown. Further, FIGS. 3 to 6 show the manufacturing process of the active matrix substrate of FIG. 1. In FIGS. 3 to 6, (a) is a plan view of the active matrix substrate, and (b) is a cross-sectional view taken along line A-A in (a). The active matrix display device of this example will be explained according to the manufacturing process. A Ta metal thin film was formed by sputtering on a first insulating substrate 10 made of a glass substrate or the like. This Ta metal thin film was patterned into the shape of the gate bus wiring 2 and gate electrode 2a shown in FIG. 3(a) by photolithography and etching. In FIG. 3(b), as mentioned above, A of FIG.
-A cross-sectional view along line A is shown.

Next, a silicon nitride film, an amorphous silicon film, and an n+ type amorphous silicon film were sequentially formed on the entire surface of the substrate 10 by plasma CVD. This silicon nitride film becomes the gate insulating film 12. This amorphous silicon film and the n+ type amorphous silicon film were patterned to form a semiconductor layer 13 and a contact layer 14 on the gate electrode 2a, as shown in FIGS. 4(a) and 4(b). Next, the gate insulating film 12 is patterned, and the gate insulating film 12 on the gate bus wiring 2 is patterned.
A contact hole 25 was formed in the portion.

Next, a Ti metal thin film was formed on the entire surface of this substrate 10. This Ti metal thin film was patterned to form a source electrode 15 and a drain electrode 16 having the shapes shown in FIG. 5(a). At this time, the center portion of the contact layer 14 is also etched away, and is divided into a portion below the source electrode 15 and a portion below the drain electrode 16. Through the above steps, TFT1 is completed.

Next, ITO (
An indium tinoxide) film was formed and patterned to form a transparent electrode line 17 electrically connecting the source electrode 15 of the TFT 1 and the gate bus line 2, as shown in FIG. 6(a). One end of the transparent electrode line 17 is superimposed on the source electrode 15 of the TFT 1 (see FIG. 6(
b)), the other end is also formed over the contact hole 25. With the configuration shown in FIG. 6A, the source electrode 15 of the TFT 1 is electrically connected to the gate bus line 2 connected to the TFT 1 in the next column of the TFT 1. Also, Figure 6 (
Although not shown in a), each source electrode 15 in the bottom row of TFTs 1 is connected to one pseudo gate bus wiring having no gate electrode. No TFT is connected to the pseudo gate bus wiring.

A silicon nitride film is formed on the entire surface of the substrate 10 on which the transparent electrode line 17 is formed by using the plasma CVD method, leaving only the portion that covers the TFT 1 and the transparent electrode line 17, thereby forming the protective film 18. formed (Fig. 1(a) and (
b)). The protective film 18 may be formed using polyimide resin, and in that case, the protective film 18 is formed by applying polyimide with a spinner, baking it, and then patterning it.

Next, an ITO film is formed on the entire surface of this substrate and patterned to form a picture element electrode 1 having the shape shown in FIG.
9 was formed. The picture element electrode 19 is also formed on the transparent electrode line 17 with a protective film 18 interposed therebetween. Furthermore, an alignment film (not shown) is formed on the entire surface of the substrate 10, and the active matrix substrate 30 is completed.

FIG. 7 shows a plan view of the counter substrate 31 constituting the active matrix display device of this embodiment. A thin film is formed on a second insulating substrate made of a glass substrate or the like using a black resin such as Color Mosaic CK manufactured by Fuji Hunt Electronics Technology Co., Ltd., and patterned into the shape shown by diagonal lines in FIG. A light shielding film 22 was formed. The window-shaped portion 23 surrounded by the light-shielding film 22 serves as the pixel electrode 1 on the active matrix substrate 30 that will be bonded later.
It corresponds to 9. Further, the size of the window-shaped portion 23 is set smaller than that of the picture element electrode 19, and is set so as to cover the peripheral portion of the picture element electrode 19 when bonded to the active matrix substrate 30.

Next, an ITO film was formed on the entire surface of the substrate 10 by sputtering, and the image signal electrode 4 was patterned by removing the gap region 24 shown by the dashed line in FIG. . The gap region 24 is a continuous region on the active matrix substrate 31 that connects the gap between the picture element electrodes 19 and the portion above the gate bus wiring 2 . Further, an alignment film (not shown) is formed on the entire surface of this substrate, and the counter substrate 31 is completed.

The active matrix substrate 30 and the counter substrate 31 manufactured as described above are bonded together in the same manner as in FIG. 9 described above, liquid crystal is encapsulated, and an active matrix display device is completed.

The equivalent circuit of the active matrix display device of this embodiment is the same as that shown in FIG. 12 described above. A capacitor 6 is formed between a picture element electrode 19 connected to the drain electrode 16 of the TFT 1 and the video signal electrode 4, and a liquid crystal layer and an alignment film are sandwiched therebetween as dielectrics.

A method of driving this active matrix display device will be described. The scanning pulse signals Sn-1, Sn, Sn-1, . . . shown in FIG. 8 are sequentially input to the gate bus wiring terminals Gn-1, Gn, Gn-1, . . . shown in FIG. 12. Here, the description will focus on the scanning signal Sn input to Gn. Sn consists of an on signal 71 that turns the TFT 1 on, an off signal 72 that turns the TFT 1 off, and a correction signal 73. The correction signal 73 is different from the off signal 72 and is applied to the source electrode of the TFT connected to the gate bus wiring terminal Gn-1 when the TFT connected to the previous stage gate bus wiring terminal Gn-1 is turned on. Provided to apply a potential. Such a scanning signal is input to each gate bus wiring 2 in the scanning direction shown by the arrow in FIG. 12, shifted by the time of the on signal 71. As a result, when the ON signal 71 is input to Gn, the correction signal 73 is input to Gn+1.
is input, and a correction signal 73 is input to the source electrode of the TFT connected to Gn.

Video signal electrode terminals Pm-1, Pm, Pm+ electrically connected to the video signal electrode 4 on the counter substrate 31
1... are video signals Vm-1, Vm, Vm+ shown in FIG.
1... is input. Video signal Vm-1, Vm, Vm+1
In order to AC drive the liquid crystal layer, the polarity is reversed every field of the TV signal, and the video signal to be applied to the liquid crystal layer of each picture element is synchronized with the timing when the ON signal is input to the corresponding TFT. and each video signal electrode terminal P
It is input to m-1, Pm, Pm+1...

In the active matrix display device of this embodiment, since there is no bus wiring for supplying video signals on the active matrix substrate 30, no short circuit occurs with the gate bus wiring 2 for supplying scanning signals. Furthermore, since there are no intersections between these bus lines, the occurrence of disconnections in the bus lines is reduced. Further, a picture element electrode 19 is also formed on a transparent electrode line 17 that electrically connects the source electrode 15 of the TFT 1 and the gate bus line connected to the gate electrode of the TFT 1 in the next column of the TFT 1. Therefore, the aperture ratio of the display screen can be increased.

[0025]

In the active matrix display device of the present invention, the video signal electrode to which the video signal is input is formed on the opposing substrate, so that it does not intersect with the gate bus wiring that supplies the scanning signal. Therefore, no short circuit occurs between the gate bus wiring and the video signal electrode. Furthermore, since the pixel electrode is also formed on the transparent electrode line that electrically connects the source electrode of the TFT and the gate bus line that is connected to the gate electrode of the TFT in the next column of the TFT, the display The aperture ratio of the screen can be increased. Therefore, according to the present invention, an active matrix display device with a bright display screen can be provided.

[Brief explanation of the drawing]

FIG. 1 is a plan view of an active matrix substrate constituting an embodiment of an active matrix display device of the present invention.

2A and 2B are cross-sectional views taken along line AA and line BB in FIG. 1, respectively.

3(a) is a plan view showing the manufacturing process of the active matrix substrate of FIG. 1, and FIG. 3(b) is a cross-sectional view taken along line AA in FIG. 3(a).

4(a) is a plan view showing the manufacturing process of the active matrix substrate of FIG. 1, and FIG. 4(b) is a cross-sectional view taken along line AA in FIG. 4(a).

5(a) is a plan view showing the manufacturing process of the active matrix substrate of FIG. 1, and FIG. 5(b) is a cross-sectional view taken along line AA in FIG. 5(a).

6(a) is a plan view showing the manufacturing process of the active matrix substrate of FIG. 1, and FIG. 6(b) is a cross-sectional view taken along line AA in FIG. 6(a).

FIG. 7 is a plan view of a counter substrate constituting an embodiment of the active matrix display device of the present invention.

FIG. 8 is a diagram showing a scanning signal and a video signal input to the active matrix display device of the present invention.

FIG. 9 is a diagram showing how an active matrix substrate and a counter substrate that constitute an active matrix display device are bonded together.

FIG. 10 is a cross-sectional view of a conventional active matrix display device.

FIG. 11 is an equivalent circuit diagram of a conventional active matrix display device.

FIG. 12 is an equivalent circuit diagram of an embodiment of the active matrix display device of the present invention and an improved example of the conventional device.

FIG. 13 is a plan view of an active matrix substrate used in a display device that is an improved version of a conventional active matrix display device.

[Explanation of symbols]

1 TFT 2 Gate bus wiring 2a Gate electrode 4 Video signal electrode 10 Insulating substrate 12 Gate insulating film 15 Source electrode 16 Drain electrode 17 Transparent electrode wire 18 Protective film 19 Picture element electrode 22 Light shielding film 23 Window-shaped part 24 Gap area 25 Contact hole

Claims (1)

[Claims] 1. First and second insulating substrates, a liquid crystal layer sealed between the first and second substrates, and picture elements arranged in a row on the first substrate. electrodes, thin film transistors connected to each of the picture element electrodes in a row, gate bus wiring connected to the gate electrodes of the thin film transistors, and source electrodes of the thin film transistors in the row connected to the thin film transistors in the next row. a transparent electrode line for connection to the gate bus wiring connected to the gate bus line; and a video signal electrode provided on the second substrate opposite to each of the picture element electrodes, the picture element electrodes is superimposed on the transparent electrode line with an insulating film interposed therebetween.