JPH04255213A - Silicon crystal forming method - Google Patents

Abstract

PURPOSE:To form one or several silicon crystal grains on an arbitrary place on an insulating film by conducting solid-phase growth of silicon after ion- implantation by changing the implantation of ions or the depth of implantation of ions while impurity ions are being scanned on the desired place of an amorphous silicon film. CONSTITUTION:After a silicon oxide film 2 has been formed on a silicon substrate 1, an amorphous silicon film 4 is formed. Then, silicon ions 5 are ion- implanted in the amorphous silicon film 4. At this time, the silicon ion implantation is conducted in such a manner that silicon crystal nuclei 7 are grown along the projection flying distance of silicon ions when a heat treatment is conducted on the substrate 1 in a nitrogen atmosphere. The amorphous silicon film can be converted into a silicon crystal layer by conducting the heat treatment continuously, and an arbitrary number of silicon crystal grains can be formed on an arbitrary position by controlling the flying distance of projection.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming silicon crystals, and more particularly to a method for forming polycrystalline silicon films and crystalline silicon layers used in the manufacture of integrated circuits.

0002

2. Description of the Related Art Conventional methods for forming silicon crystals used in the manufacture of integrated circuits, particularly polycrystalline silicon films and solid phase epitaxial layers of silicon, will be explained with reference to the drawings.

The conventional method for forming a polycrystalline silicon film is to use SiH4 as a raw material gas using low pressure chemical vapor deposition under conditions of a growth temperature of 650° C. and a pressure of about 0.5 Torr.
A polycrystalline silicon film 9 is grown on a silicon substrate or on a silicon oxide film 2 formed on a single crystal silicon substrate 1 as shown in FIG.

In the case of a silicon solid phase epitaxial layer, as shown in FIG. 8(a), a silicon oxide film 2 with a thickness of 0.2 to 0.5 μm is first formed on a silicon substrate 1, and then , an opening 10 for a seed crystal is formed. There are various methods for forming the opening 10.
In general, a selective oxidation method or an etching technique may be used. FIG. 8(a) shows the latter example. Thereafter, after going through a process of removing the natural oxide film in the opening 10, a chemical vapor deposition device, a sputter thin film growth device, an electron beam heating evaporation device, or the like is used to deposit the film to a thickness of 0.1 to
A 2.0 μm amorphous silicon film 4 is grown. Next, in an inert gas, etc., at a temperature of 550 to 650℃ for about 2 hours.
Heat treatment is performed for more than 2 hours to inherit the crystal plane orientation of the seed portion, and solid phase epitaxial growth is performed from amorphous silicon to single crystal silicon to form a solid phase epitaxial layer 6A.
(SOI layer) is formed. In this case, silicon crystal nuclei 7A are generated in the amorphous silicon film other than the solid phase epitaxial layer 6A. This solid phase epitaxial layer 6A may locally contain polycrystalline silicon.

[0005]

Problems to be Solved by the Invention The conventional silicon crystal forming method described above has the following problems.

First, when a polycrystalline silicon film 9 is grown on the silicon oxide film shown in FIG.
It is small, about 0 nm, and the crystal grains are slightly (110) oriented, but mainly show random orientation, and the crystal surface has 1
It has irregularities of about 0 to 15 nm. When a polycrystalline silicon transistor is fabricated using this polycrystalline silicon film 9 as the active region of the device, the leakage current and on-current are larger than when the transistor is fabricated on a general single-crystal silicon substrate under the same conditions. It has problems such as small size, poor subthreshold characteristics, fluctuations in threshold voltage, and low dielectric breakdown voltage of the gate oxide film.

In addition, in the silicon solid-phase epitaxial method explained in FIG.
The crystallinity of an epitaxial silicon film largely depends on the growth of silicon crystal grains in the amorphous silicon film. In the example shown in FIG. 8, single-crystal silicon crystals are inherited from the seed part, and solid-phase epitaxial growth first progresses in the vertical direction, and then solid-phase epitaxial growth is performed in the horizontal direction on the insulating film. During the heat treatment, random silicon crystal nuclei 7A as shown in FIG.
As shown in FIG. 8(c), the growth of A causes problems such as the growth of solid phase single crystal silicon being stopped and dislocations occurring, making it difficult to form a high quality solid phase epitaxial layer. Ta.

[0008]

[Means for Solving the Problems] The method for forming a silicon crystal of the present invention is to form an amorphous silicon film on a silicon single crystal substrate, an insulating film substrate, or an insulating film substrate with a portion of the single crystal silicon substrate exposed. and a step of implanting impurity ions into a predetermined region of the amorphous silicon film while scanning an ion beam while changing the implantation amount or implantation depth, and then performing solid phase growth of silicon. It is something that

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 5 shows the relationship between the ion implantation of impurity ions (silicon ions, fluorine ions) into an amorphous silicon film and the solid phase growth of amorphous silicon.

The solid line A in FIG. 5 shows the case where a non-doped amorphous silicon film is heat-treated at 600° C. in a nitrogen atmosphere, and the broken line B shows the case where silicon ions are implanted at a dose of 1.
．． FIG. 7 is a graph showing the degree of crystallinity of the amorphous silicon film with respect to the heat treatment time when ions are implanted into the amorphous silicon film under the condition of 0×10 16 cm −2 and similarly heat treated at 600° C. in a nitrogen atmosphere. It can be seen from FIG. 5 that when crystallizing an amorphous silicon film, by implanting silicon ions into the amorphous silicon film, the start of crystallization is considerably delayed compared to a non-doped amorphous silicon film.

Next, a method of forming a silicon crystal using this principle will be explained with reference to FIG. Figures 1(a) to (c)
) is a sectional view of a semiconductor chip for explaining a first embodiment of the present invention.

First, as shown in FIG. 1(a), after forming a silicon oxide film 2 on a single crystal silicon substrate 1,
After opening a portion that will become a seed crystal (seed) by etching, selective silicon epitaxial growth is performed to form a seed 3 made of an epitaxial layer. Next, Figure 1 (
As shown in b), L using Si2 H6 as the source gas
An amorphous silicon film 4 having a thickness of 50 nm is grown by the PCVD method at a growth temperature of 500° C., and silicon ions 5 are further implanted by the focused ion beam method.

Doping of silicon ions is shown in FIG. 2(a).
As shown in Figure 3, the injection amount is set to the minimum 1.0× at the seed 3 part.
The implantation amount was set to 1011 cm-2, and the implantation amount was increased as the distance from the seed 3 increased to approximately 2.0×1 at the edge of the device fabrication area.
The injection volume is set at 0.016 cm-2. Next, this silicon substrate is subjected to heat treatment at 600° C. in a nitrogen atmosphere, and solid phase epitaxial growth of amorphous silicon is performed according to the seed plane orientation. At this time, as shown in FIG. 2(b), there is a large difference in the generation rate of silicon crystal nuclei depending on the ion implantation dose shown in FIG. 2(a), so as shown in FIG. When the phase epitaxial growth progresses, silicon crystal grains do not grow in the amorphous portion, and it is possible to form a silicon solid phase epitaxial layer (SOI layer) 6 that does not contain silicon polycrystalline grains or dislocations.

The characteristics of a PMOS single transistor in which this solid-phase epitaxial layer is formed as a device active region are as follows from the ID-VG characteristics when measuring a drain voltage of 5V.
Leakage current when gate voltage VG = 0V is approximately 5 x 10-
On current at 5A and gate voltage VG = 5V is approximately 2×1
0-4A, with little variation in S-parameters, and a leakage current of approximately 1 A compared to when using a conventional SOI layer.
/2, approximately 1.2 times the on-current value was obtained, indicating stable characteristics. Furthermore, since devices can be formed on the insulating film, it has advantages such as the possibility of forming multifunctional devices, CMOS devices with high latch-up resistance, and strong resistance to α-ray soft errors.

FIGS. 3A to 3C are cross-sectional views of a semiconductor chip for explaining a second embodiment of the present invention. First, as shown in FIG. 3(a), a silicon oxide film 2 is formed on a single-crystal silicon substrate 1, and then Si2H is added to the raw material gas.
6 Growth temperature 550 by LPCVD method using gas
An amorphous silicon film 4 is deposited at .degree. Thereafter, a silicon oxide film 2A is deposited on the surface and patterned to leave only a portion.

Next, by implanting silicon ions 5 by rotational ion implantation, a profile as shown in FIG. 4(a) can be obtained. Further, this silicon substrate 1 is subjected to heat treatment at 600° C. in a nitrogen atmosphere to crystallize amorphous silicon, but as shown in FIG. 4(b) according to the silicon ion profile shown in FIG. 4(a), Since there is a large difference in the rate of generation of silicon crystal nuclei in the amorphous silicon film, silicon crystal nuclei 7 are generated in the portion where the amount of silicon ions implanted is small, as shown in FIG. 3(b). Furthermore, when the heat treatment time is increased, as shown in FIG. 3(c), solid-phase growth of silicon progresses using this silicon crystal nucleus 7 as a seed crystal, and a silicon crystal layer 8 is formed at an arbitrary location as one device fabrication region. can be formed.

FIGS. 6(a) and 6(b) are cross-sectional views of a semiconductor chip for explaining a third embodiment of the present invention. First, as shown in FIG. 6(a), a silicon oxide film 2 is formed on a silicon substrate 1 as in the second embodiment, and then an LPC film is formed.
An amorphous silicon film 4 is formed by the VD method. Next, silicon ions 5 are formed in this amorphous silicon film 4.
ion implantation. The silicon ion implantation at this time is
The projected range RP is set to be near the interface between the amorphous silicon film 4 and the silicon oxide film 2.

Next, when this silicon substrate 1 is heat-treated at 600° C. for 3 hours in a nitrogen atmosphere, silicon crystal nuclei 7 are generated along the projected range of silicon ions, as shown in FIG. 6(b). Ru. This is because implantation of silicon ions destroys amorphous silicon, making it easier for silicon crystals to grow. By continuing heat treatment, the amorphous silicon film can be turned into a silicon crystal layer. Note that the position of the projected range does not have to be near the interface with the silicon oxide film, and by freely controlling the position of the projected range, the required number of silicon crystal layers can be formed at any position. .

In the above embodiment, the case where silicon ions were implanted was explained, but fluorine (F)
Ions may also be used.

[0020]

Effects of the Invention As explained above, the present invention implants impurity ions into a desired location of an amorphous silicon film while changing the implantation amount or implantation depth while scanning, and then implants the solid phase of silicon. By growing,
One or several silicon crystal grains can be formed anywhere on the insulating film. Furthermore, in solid-phase epitaxial growth of silicon, the area of the single-crystal silicon layer can be expanded compared to the conventional method. Therefore, when a semiconductor element is formed using this silicon crystal layer as an SOI layer, leakage current can be reduced, variations in threshold voltage can be reduced, and subthreshold characteristics can be improved.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a first embodiment of the present invention.

FIG. 2 is a diagram showing the relationship between scanning distance, ion implantation amount, and crystal nucleus growth rate for explaining the first embodiment.

FIG. 3 is a cross-sectional view of a semiconductor chip for explaining a second embodiment of the present invention.

FIG. 4 is a diagram showing the relationship between scanning distance, ion implantation amount, and crystal nucleus growth rate for explaining a second example.

FIG. 5 is a diagram showing the relationship between heat treatment time and crystallinity of an amorphous silicon film.

FIG. 6 is a cross-sectional view of a semiconductor chip for explaining a third embodiment of the present invention.

FIG. 7 is a cross-sectional view of a semiconductor chip for explaining a conventional method of forming a polycrystalline silicon film.

FIG. 8 is a cross-sectional view of a semiconductor chip for explaining a conventional method of forming a solid-phase epitaxial layer.

[Explanation of symbols]

1 Silicon substrate 2, 2A Silicon oxide film 3 Seed 4 Amorphous silicon film 5 Silicon ion 6, 6A Solid phase epitaxial layer 7, 7A
Silicon crystal nucleus 8 Silicon crystal layer 9, 9A Polycrystalline silicon film 10 Opening

Claims (2)

[Claims] 1. A step of depositing an amorphous silicon film on a silicon single crystal substrate, an insulating film substrate, or an insulating film substrate with a portion of the single crystal silicon substrate exposed; 1. A method for forming a silicon crystal, comprising the steps of implanting impurity ions while scanning an ion beam while changing the implantation amount or implantation depth, and then performing solid phase growth of silicon. 2. The method for forming a silicon crystal according to claim 1, wherein the impurity ions are silicon ions or fluorine ions.