JP2695466B2 - Crystal growth method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for forming a semiconductor thin film, and more specifically, to a semiconductor device such as a TFT (thin film transistor) having a high grain size capable of being manufactured with high performance. The present invention also relates to a method for forming a semiconductor thin film having controlled grain boundary positions.

[Prior Art and Problems to be Solved by the Invention] As one method in the field of crystal formation technology for growing a crystal thin film on a substrate such as an amorphous substrate, an amorphous thin film previously formed on a substrate is used. A method of performing solid phase growth by annealing at a low temperature equal to or lower than the melting point has been proposed. For example, an amorphous Si thin film having a thickness of about 100 nm formed on an amorphous SiO ₂ surface is annealed at 600 ° C. in an N ₂ atmosphere to crystallize the amorphous Si thin film. Then, a crystal forming method was reported in which a large-grain-size polycrystalline thin film with a size of about 5 μm was formed (T. Noguchi, H. Hayashi and H. Oh.
shima, 1987, Mat.Res.Soc.Symp.Proc., 106, Polysilicon
and Interfaces, 293, (Elsevier Science Publishing, N
ew York 1988)). Since the surface of the polycrystalline thin film obtained by this method remains flat, it is possible to form electronic devices such as MOS transistors and diodes as they are. In addition, those elements have a polycrystalline average grain size of
Since it is much larger than ordinary polycrystalline Si deposited by the LPCVD method, a relatively high-performance one can be obtained.

However, in this crystal forming method, although the crystal grain size is large, the distribution and the position of the crystal grain boundary are not controlled. Because, in this case, the crystallization of the amorphous Si thin film is based on solid-phase growth of crystal nuclei randomly generated in the amorphous material by annealing, and therefore grain boundary positions are also randomly formed. As a result, the particle size is distributed over a wide range. Therefore, if the average grain size of the crystal grains is simply large, the following problems occur.

For example, in a MOS transistor, the size of the gate is about the same as or smaller than the average crystal grain size, so that the gate part includes a part that does not include grain boundaries and a part that includes several grain boundaries. . The electrical characteristics greatly change between the part that does not include grain boundaries and the part that includes several grain boundaries. For this reason, a large variation occurs in the characteristics between a plurality of elements, and when forming an integrated circuit or the like, the variation in crystal grain size has been a significant obstacle in the integrated circuit.

Among the problems in the large grain size polycrystalline thin film due to the above solid phase crystallization, a method for suppressing the variation in grain size is proposed in Japanese Patent Laid-Open No. 58-56406. The method will be described with reference to FIG. First, as shown in FIG. 4 (a), thin film pieces 43 made of another material are periodically provided on the surface of an amorphous Si thin film 42 formed on an amorphous substrate 41, and the entire substrate is Anneal in a normal heating furnace. Then, nucleation of crystal nuclei 44 occurs preferentially from a portion of the amorphous Si thin film 42 that is in contact with the periphery of the thin film piece 43. Then, when the crystal nuclei are further grown, the amorphous Si thin film 42 is crystallized over the entire area, and a large crystal grain group 45 as shown in FIG.
To obtain a polycrystalline thin film. According to Japanese Patent Laid-Open No. 58-56406, this method can reduce the variation in particle size by about 1/3 as compared with the conventional method described above.

However, it is still insufficient. For example,
When the thin film pieces 43 are arranged in the form of lattice points at intervals of 10 μm, the variation in particle size is contained within the range of 3 to 8 μm. In addition, the control of the grain boundary position is almost not controlled. The reason is amorphous Si
Due to the localized effect of elastic energy in the portion where the thin film 42 and the peripheral portion of the thin film piece 43 are in contact with each other, preferential nucleation occurs around the thin film piece 43, so that a plurality of nuclei are generated along the periphery, and This is because it is difficult to control the number.

Another method of controlling the nucleation position in solid phase growth of an amorphous Si thin film has been proposed in Japanese Patent Laid-Open No. 63-253616. These are amorphous Si as shown in FIG.
Region in which thin film 52 is locally ion-implanted with substance 53 other than Si
This is a method in which 54 is provided and crystal nuclei are preferentially generated there. N, B, etc. have been proposed as the substance 53 other than Si, but in that case, in reality, the selectivity for nucleation between the ion-implanted region 54 and the other regions is insufficient, There is no report that realized this.

The present invention is to solve the problems that the above-mentioned conventional examples have, and an object of the present invention is to control the nucleation position in the solid phase and to form a crystal in which the grain boundary position is determined. To provide a growth method.

[Means for Solving the Problems] The crystal growth method of the present invention is a crystal growth method of crystallizing an amorphous thin film by solid phase growth to form a thin film crystal, wherein the amorphous thin film provided on a base material. The degree of damage due to ion implantation is less than that of other regions, and
The same material as that of the amorphous thin film is formed so that a plurality of minute regions having an area of m diameter or less are formed at a predetermined interval in the vicinity of the interface between the amorphous thin film and the base material. It is characterized in that ions are implanted, and then heat treatment is performed at a temperature equal to or lower than the melting point of the amorphous thin film to preferentially form crystals grown from a single nucleus from the minute region.

[Operation] The details of the operation and configuration of the present invention will be described below together with the findings obtained in the present invention.

The point of the present invention is how to control the growing position of the crystal in the solid phase. That is, in the amorphous thin film, nuclei are preferentially generated at specific positions to suppress nucleation in other regions.

The present inventors have, for example, polycrystalline on the base material made of SiO ₂
Phenomenon that the crystal nucleus generation temperature (crystallization temperature) strongly depends on the ion implantation energy when heat-treating after depositing a Si film and then implanting Si ions to amorphize the polycrystalline Si layer I have found

Therefore, when the reason why the crystal nucleus generation temperature depends on the ion implantation energy was clarified, the following matters were found. The details will be described below.

When the implantation energy is changed, the Si after amorphization is changed.
In the layer (amorphous Si layer), the distribution of the implanted Si ions changes, and as a result, the distribution of the generated vacancy, that is, the distribution of the region where the implantation damage is present, changes in the film thickness direction due to the implantation energy. Change.

Further, in the amorphous material, nuclei that overcome the disadvantage of surface energy are generated, and then a phase transition of Si atoms from an amorphous phase to a crystalline phase occurs.

By the way, nucleation includes uniform nucleation and heterogeneous nucleation. The former is nucleation in a uniform substance (for example, inside an amorphous Si film), and it is mainly determined whether such nucleation occurs. It depends on whether or not it is possible to grow by overcoming the disadvantage of surface energy. On the other hand, in the latter heterogeneous nucleation, nucleation is prompted by contact with a foreign substance, and the activation energy of the latter is lower than that of the former. That is, heterogeneous nucleation is more likely than homogeneous nucleation. In fact, amorphous Si
Nucleation in a thin film is mainly controlled by non-uniform nucleation near the interface of the underlying layer.

Depth that maximizes the amount of ion implantation (projection range)
The present inventor has found that, even under the condition where the injection amount is constant, it has a significant influence on the above-mentioned heterogeneous nucleation at the interface.

FIG. 1 shows the correlation between the implantation energy and the crystallization temperature.

The conditions at this time are as follows. The implantation layer is a 100-nm-thick polycrystalline Si layer deposited by low pressure CVD by decomposition of SiH ₄ at 620 ° C. on a SiO ₂ substrate, and implantation ions are Si ⁺ .
The injection amount was constant (in this case, 5 × 10 ¹⁵ cm ^-2 ) beyond the critical injection amount (about 10 ¹⁵ cm ^-2 ). Injection energy is 40ke
V to 80keV, the injection layer is
Si atoms are knocked on from the lattice position, and the damaged region becomes continuous and becomes amorphized by the injection of more than the critical injection amount. This amorphous Si layer was exposed to N ₂ atmosphere at various temperatures.
After heat treatment for 20 hours, the recrystallization process in the solid phase was observed mainly by using a transmission electron microscope, and the crystallization temperature under the above conditions was investigated.

For example, pay attention to the implantation energy of 40keV and that of 70keV. The implantation depth (projection range) of 40keV and 70keV is 55.2 each.
nm and 99.7 nm, which correspond to the vicinity of the center of the film thickness and the vicinity of the interface with the underlying material in the 100 nm layer. And
There is a difference of 50 ° C or more in these crystallization temperatures, indicating that the one injected near the interface of the base has a higher crystallization temperature and is hard to crystallize, which means that the damaged region is larger than the interface. As a result, it is considered that the heterogeneous nucleation was inhibited. In addition, a layer amorphized by injecting at 40 keV so that the projection range comes near the center of the film thickness, and C
At the temperature at which the amorphous layer deposited by VD crystallizes within 1 hour (that is, 600 ° C), the amorphous layer was heat treated at 70 keV so that the implantation depth was near the interface.
It was confirmed by a transmission electron microscope that it did not crystallize even after 100 hours or more. The state, that is, the relationship between the time from the start of heat treatment to the start of crystallization (latency time) and the implantation depth is shown in FIG. As shown in FIG. 2, the longer the implantation depth toward the interface, the longer the incubation time and the less likely it is to crystallize. (Projection range) / (film thickness) = 1, that is, the latency is maximized and the maximum point is obtained where the vicinity of the interface is most damaged.

From the above, it is clarified that the crystallization temperature and the incubation time differ by changing the implantation energy, and it is considered that the cause is the inhibition of heterogeneous nucleation near the interface.

 The nucleation position is controlled by utilizing the above phenomenon.

As shown in FIG. 3, a mask such as a resist is used on the surface of the amorphous Si deposited layer to cover the region where nucleation occurs, and Si ions are applied only to the region where nucleation does not occur near the amorphous Si layer and the underlying interface. Select the injection energy so that it will be damaged.

Damage is mainly given to the vicinity of the interface in the portion not masked by the resist, and nucleation is inhibited during the subsequent heat treatment. The temperature and time to crystallize the region where the degree of implantation damage is high (hereinafter referred to as interfacial damage region) does not crystallize, and the region where the degree of implantation damage is low or where no implantation damage is caused (hereinafter referred to as non-interface damage region) Obtained from FIGS. 1 and 2, the amorphous Si layer having Si ions implanted at the interface is heat-treated in N ₂ or H ₂ . The heat treatment locally generates nuclei. For amorphous Si layers, typically 100 at around 630 ° C.
A heat treatment for a time is appropriate. If the non-interfacial damage region is made to have a very small area (5 μm diameter or less, desirably 2 μm (diameter) or less, optimally 1 μm (diameter) or less), nuclei will be generated early from the minute region when the heat treatment is started, A single crystal grows (Fig. 3 (B)). When the crystal phase having this single domain is subjected to heat treatment as shown in FIG. 3 (C),
The boundary between the crystalline phase and the amorphous phase moves to the outside.
That is, Si atoms in the amorphous material are jumped into the interface and taken into the crystalline phase. In this way, the crystal size continues to increase, but the phase transition from this amorphous phase to the crystalline phase is
Since it occurs at a lower energy than the energy for nucleation, which is unfavorable to the surface energy, the interfacial damage region is taken up into a single crystal phase generated from the non-interfacial damage region before nucleation, and the final Specifically, adjacent crystals collide with each other to form a crystal grain boundary there.

At this time, the crystal grain size becomes almost equal to the distance between the non-interfacial damage regions, so that the desired crystal grain size can be determined and the grain boundary position thereof is also determined.

The amorphous thin film according to the present invention is not limited to the amorphous thin film formed by implanting ions into the polycrystalline thin film, and may have an amorphous structure during deposition.

When the starting material is a polycrystalline layer, first, the first ion implantation is performed without providing a mask so that the projection range is near the center of the polycrystalline thin film. By such ion implantation, the polycrystalline thin film can be made amorphous without causing implantation damage in the vicinity of the interface between the polycrystalline thin film and the underlying material. Then
The second ion implantation is performed so that the projection range is near the interface between the amorphous thin film and the base substrate, with a mask made of resist or the like provided on the portion corresponding to the minute region. Due to such ion implantation, implantation damage occurs near the interface between the amorphous thin film and the base substrate except for the portion where the mask is provided, while implantation damage does not occur at the portion where the mask is provided. It becomes an area.

When forming a thin film having an amorphous structure during deposition, the above-described first ion implantation may be omitted.

In the above method, the ion implantation was performed twice. However, by appropriately selecting the material and thickness of the mask, the projection range in the portion corresponding to the minute region can be made to be close to the center of the thin film.
On the other hand, the projection range in the other portion can be set near the interface between the amorphous thin film or the polycrystalline thin film and the base substrate, so that the formation of a minute region with a small degree of implantation damage and the amorphization of the polycrystalline thin film. And can be performed by one-time ion implantation.

Such a mask is preferably a mask made of a material that allows the implanted ions to pass therethrough, and examples thereof include an inorganic material such as silicon oxide.

[Examples] (Example 1) Amorphous Si was deposited to a thickness of 100 nm on a glass substrate containing SiO ₂ as a main component by a low pressure CVD method.

SiH ₄ is used as source gas, formation temperature is 550 ℃, pressure
Formed at 0.3 Torr.

After that, a resist was applied, and a resist having a diameter of 1 μm was left in the form of two kinds of lattice points at intervals of 5 μm and 10 μm by a usual lithography technique.

Using this resist as a mask, Si ⁺ ions were implanted over the entire surface at 70 keV. The injection amount was 3 × 10 ¹⁵ cm ^-2 . Due to the implantation energy of 70 keV, the projected range comes close to the interface between 100 nm Si and the underlying SiO ₂ glass. As a result, the interface (Si / SiO ₂ ) was damaged in all regions except the resist having a diameter of 1 μm. After stripping the resist, 630 in an N ₂ atmosphere.
Heat treatment was performed at 80 ° C. for 80 hours. Then, as a result of observation with a transmission electron microscope, the crystal grain boundaries were aligned at intervals of 5 μm and 10 μm, which corresponded to almost the initial pattern intervals, and the grain size distribution was within ± 1 μm with respect to 5 μm and 10 μm on average, respectively.

Similar effects were obtained even when the heat treatment in the N ₂ atmosphere was performed in the H ₂ atmosphere.

Example 2 SiH ₄ was thermally decomposed by a low pressure chemical vapor deposition method on a base material made of a plate-like glass, and a polycrystalline Si thin film was deposited to a thickness of 100 nm. The formation temperature was 620 ° C., the pressure was 0.3 Torr, and the particle size was fine, about 50 nm. Si implantation was performed twice. First, without using a resist mask, Si ions are implanted into the entire surface with an implantation energy of 40 keV and a dose of 3 × 10 ¹⁵ cm ^-2.
By implanting into the Si layer, the damage became continuous and amorphized, as described above. However, the projection range of 40 keV is located near the center of the film thickness of 100 nm, and as a result, there is almost no damage near the Si / SiO ₂ underlayer interface.

After that, as in Example 1, two kinds of resist masks having a diameter of 1 μm and intervals of 5 μm and 10 μm were provided in a grid pattern, and the second time was used.
Si ⁺ ion implantation was performed at 70 keV this time to introduce damage near the interface. The injection amount was the same as the first injection. After stripping the resist, it was heat-treated in N ₂ at 620 ° C. for 100 hours. as a result,
As in Example 1, the particle size is 5 μm ± 1 μm, 10 μm ± 1 μm
m, and the grain boundaries were aligned in a lattice.

When a large number of field effect transistors with a channel length of 3 μm were made on the Si layer having a thickness of 100 nm obtained in Example 1 and Example 2 by using an ordinary IC process, the electron mobility was 20.
0 ± 5 cm / V · sec, and threshold variation was ± 0.2 V. Since it is possible to arrange so that there is no grain boundary in the channel part of the transistor, high performance of device characteristics,
It has become possible to narrow the distribution of device characteristics.

Thick (Example 3) 50 nm amorphous Ge thin film, vacuum deposition by the electron beam on the underlying material formed of SiO _2. The degree of vacuum is 1 × 10
Deposited at ^-6 Torr, room temperature. 1.5μm depending on resist
Mask the area with a diameter of 10 μm and use 1 Ge ⁺ ion for the entire area.
Inject at 30 keV. The injection volume was 2 × 10 ¹⁵ cm ^-2 . Ge ⁺
The ion implantation depth is about 50 nm from the surface, and the ions are mainly concentrated near the interface of the underlying substrate, causing damage to the interface. After removing the mask, heat treatment at 380 ° C for 50 hours in N ₂ atmosphere or H ₂ atmosphere showed that a single crystal was formed only from the micro area covered with the mask and Ge ⁺ ions were not implanted and the interface was not damaged. Grow and grow into the amorphous Ge region where the interface is damaged by Ge ⁺ ions, and both crystals collide in the middle of adjacent crystal nucleation points, forming a grain boundary there. . As a result of examining the crystal structure with a transmission electron microscope, the diameter of the crystal of each single domain was 10 μm ± 1 μm.

(Example 4) A polycrystalline Ge thin film was formed on a base material made of SiO ₂ to a thickness of 50 nm at a deposition temperature of 400 ° C. by thermal decomposition of GeH _{4 by a} low pressure CVD method. It was confirmed by a transmission electron microscope that the as-deposited polycrystalline Ge had a grain size of about 100 nm. Then Ge ⁺
Ions are implanted with an implantation energy of 60 keV and a dose of 2 × 10 ¹⁵ cm ^-2 to amorphize the entire film. The implantation depth by the implantation energy of 60 keV is about 25 nm from the surface, and at this time, almost no damage is introduced at the Ge film / SiO ₂ base material interface.

Furthermore, depending on the resist, the area of 1.2 μm is
Masked at intervals and Ge ⁺ ions were implanted at 130 keV 2 × 10 ¹⁵ c
m ^-2 injected. At this time, mainly the interface (Ge / SiO ₂ ) of the implantation region
Damage is introduced. After removing the resist mask, N ₂
Heat treatment was performed at 390 ° C. for 60 hours in the atmosphere.

Only the microscopic regions that are not damaged at the interface of the Ge film are crystallized, and a crystal having a single domain grows. Furthermore, the crystal maintains its crystal structure and extends to the region where damage is introduced into the interface, and finally collides with the adjacent crystal, and it is formed in the middle of the adjacent micro interface non-damaged region. Grain boundaries are formed.

As a result of examination with a transmission electron microscope, the particle size is 15 μm ± 2 μm
Thus, a polycrystalline film with a uniform grain size could be formed.

Example 5 A polycrystalline Si thin film having a thickness of 100 nm was deposited on a fused silica substrate as a base material under the following conditions by the low pressure CVD method.

Working gas SiH ₄ gas flow rate ratio 50sccm Pressure 0.3Torr Substrate temperature 620 ° C Next, an amorphous SiO ₂ film is deposited on this amorphous Si thin film by atmospheric pressure CVD to a thickness of about 30 nm, which is then subjected to normal photolithography. By the process, patterning was performed so that 1 μm square SiO ₂ regions were left in the form of lattice points at 10 μm intervals.

Then, Si ⁺ ions accelerated to an energy of 70 keV were implanted into the entire surface of this substrate at a dose of 5 × 10 ¹⁵ cm ^-2 . By this ion implantation, the polycrystalline Si thin film was amorphized over the entire region, including the region whose surface was covered with the SiO ₂ thin film. And in this case, the projected range of Si ions in Si is 9
Since it is 9.7 nm, in the region where the SiO ₂ thin film is not left on the surface of the Si thin film, the most implanted Si ions are distributed near the interface with the fused silica substrate, and the non-nucleation region is It is formed. On the other hand, in the 1 μm square area where the SiO ₂ thin film remains on the surface, not only the maximum of the distribution of the implanted Si ions (projection range) remains in the Si thin film, Since the absolute amount is small, it becomes a nucleation region.

Therefore, the SiO ₂ thin film scattered on the surface was diluted with water.
After removing by etching with HF, this was annealed while keeping the substrate temperature at 600 ° C. in an N ₂ atmosphere. Then, about 10 hours after the start of annealing, crystal nuclei started to be generated in the 1 μm square region into which Si ions were implanted while being covered with the SiO ₂ thin film. At this point, Si not covered with SiO ₂ thin film
No nucleation occurs in the ion-implanted region, so if annealing is further continued, the crystal nuclei already formed in the 1 μm square region grow laterally beyond the region, and the large-grain thin film is formed. It became a crystal. Then, after annealing for about 100 hours, crystal grains grown from adjacent regions separated by about 10 μm contacted the growth end faces to form grain boundaries, and the amorphous Si thin film was crystallized over almost the entire area. as a result,
While arranging the crystal grain boundaries in a lattice pattern at intervals of about 10 μm, a thin film crystal composed of a crystal grain group having an average grain size of 10 μm was obtained.

(Example 6) Amorphous Si was formed on a quartz substrate as a base material by an electron beam evaporation method in an ultrahigh vacuum under the following conditions.
Was deposited to a film thickness of 100 nm.

Ultimate vacuum 1 × 10 ^-10 Torr Vacuum degree during vapor deposition 5 × 10 ^-10 Torr Substrate temperature 150 ° C. Deposition rate 〜 100 nm / hr On this amorphous Si thin film, a resist of 1 μm square was formed by ordinary photolithography process. The regions were patterned so as to remain in the form of lattice points at intervals of 10 μm.

Further, Si ⁺ ions accelerated to an energy of 70 keV were ion-implanted into the entire substrate at an implantation amount of 1 × 10 ¹⁵ cm ^-2 . In this case, since the projected range of Si ions in Si is 99.7 nm, most Si ions are distributed in the vicinity of the interface between the amorphous Si thin film and the quartz substrate in the region not covered with the resist, Many damages are introduced at the interface.

After removing the resist, the substrate temperature was set to 59 in N ₂ atmosphere.
It was kept at 0 ° C. and heat-treated. About 15 hours after the start of heat treatment,
Crystal nuclei started to be generated in the 1 μm square area where Si ions were not implanted. At this point, the Si
Nucleation did not occur in the ion-implanted region, so if annealing is continued, the crystal nuclei already formed in the 1 μm square region grow laterally beyond that region, resulting in a dendritic large region. It became a grain size thin film crystal. Then, after annealing for about 120 hours, the crystal grain grown from the adjacent region separated by about 10 μm comes into contact with the growth end face to form a grain boundary, and the amorphous Si thin film is crystallized over almost the entire area. As a result, a thin film crystal comprising a group of crystal grains having an average particle diameter of 10 μm was obtained while arranging the crystal grain boundaries in a lattice pattern at intervals of about 10 μm.

(Example 7) A glass substrate was used as a base material, and its surface was amorphous by DC magnetron sputtering under the following conditions.
Si was deposited to a film thickness of 100 nm.

Ultimate vacuum 5 × 10 ^-7 Torr Vacuum degree during vapor deposition 2 × 10 ^-3 Torr Substrate temperature 20 ° C. Deposition rate 〜200 nm / hr Next, a resist is coated on this amorphous Si thin film, and this is coated with ordinary photo resist. By a lithography process, patterning was performed so that 2 μm squares were left at intervals of 10 μm in the form of lattice points.

Then, Si ⁺ ions accelerated to an energy of 60 keV were implanted into the entire surface of this substrate at a dose of 5 × 10 ¹⁵ cm ^-2 .
In this case, since the projected range of Si ions in Si is 84.5 nm, in the region where the resist is not left on the surface of the amorphous Si thin film, most Si ions are present near the interface with the fused silica substrate. Are distributed, and non-nucleation regions are formed. On the other hand, the resist left on the surface is 1μ.
In the m-square region, the implanted Si ions do not reach the amorphous Si thin film but become a nucleation region.

Therefore, after removing the resist scattered on the surface, N ₂
This was annealed by keeping the substrate temperature at 620 ° C. in the atmosphere. Then, about 15 hours after starting the annealing, crystal nuclei started to be generated in a 2 μm square region covered with the resist and in which Si ions were not implanted. At this point, no nucleation occurred in the region where Si ions were implanted without being covered with the resist, so if annealing was continued, 2 μm
The crystal nuclei that had already formed in the m-square region grew laterally beyond that region to become a dendritic large-grain thin-film crystal. Then, after annealing for about 120 hours, the crystal grain grown from the adjacent region separated by about 10 μm comes into contact with the growth end face to form a grain boundary, and the amorphous Si thin film is crystallized over almost the entire area. As a result, a thin film crystal comprising a group of crystal grains having an average particle diameter of 10 μm was obtained while arranging the crystal grain boundaries in a lattice pattern at intervals of about 10 μm.

[Effects of the Invention] According to the present invention, a flat thin film having a large grain size can be formed without requiring a step such as polishing.

Further, according to the present invention, the position of the crystal grain boundary formed between adjacent crystal grains and the grain size can be arbitrarily controlled.

Therefore, various elements with less variation can be formed over a large area.

[Brief description of the drawings]

FIG. 1 is a graph showing the relationship between implantation energy and crystallization temperature. FIG. 2 is a graph showing the relationship between the projected range and the latency. FIG. 3 is a side sectional view for explaining one embodiment of the present invention, and FIGS. 4 and 5 are side sectional views showing a conventional technique.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-63-196032 (JP, A) JP-A-62-108516 (JP, A) JP-A-63-253616 (JP, A) JP-A-2- 52419 (JP, A) JP-A-1-302812 (JP, A)

Claims (3)

(57) [Claims] 1. A crystal growth method in which an amorphous thin film is crystallized by solid phase growth to form a thin film crystal, and the amorphous thin film provided on a base material is more damaged by ion implantation than other regions. The amorphous thin film is configured such that a plurality of minute regions having a small degree and having an area of 5 μm diameter or less are formed near the interface between the amorphous thin film and the base material at a predetermined interval. By implanting ions of the same material as the material to be formed, and then performing heat treatment at a temperature equal to or lower than the melting point of the amorphous thin film, thereby forming crystals preferentially grown from a single nucleus from the minute region. Characteristic crystal growth method. 2. The amorphous thin film is a thin film obtained by ion-implanting the polycrystalline thin film by ion implantation so that the projected range by the ion implantation is near the center of the polycrystalline thin film.
The crystal growth method according to the above. 3. A projection range between the amorphous thin film and the underlying substrate is projected by ion implantation in a state where a mask made of a resist is provided in a portion of the minute region corresponding to the minute region provided in the amorphous thin film. 2. The crystal growth method according to claim 1, wherein ion implantation is performed so as to come close to the interface to form a minute region having a smaller degree of implantation damage than other regions.