JPH04253031A - Manufacture of liquid crystal display device - Google Patents

Abstract

PURPOSE:To improve the yield by covering a terminal part area with a mask, forming an insulating layer, etc., on an insulating substrate across the insulating layer, etc., and extending the constitution part of a drain line to the terminal part area. CONSTITUTION:A gate line 35 is formed on the transparent insulating substrate 31 and the terminal part area including a gate terminal 37 and a drain terminal is covered with a metal mask 39. An insulating layer 40, an amorphous silicon active layer 41, and an amorphous silicon contact layer 42 are laminated on the insulating substrate 31 through the mask 39. In the terminal area where none of those layers is laminated, the insulating substrate is exposed, and the constitution part of the drain line is extended to this area. Therefore, the gate line formed in the 1st layer can be formed as a gate terminal in the exposure area. The gate terminal and its surface can directly be connected and the need for a contact hole is eliminated to reduce contact defects, etc.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly to a method for manufacturing a liquid crystal display device with improved yield.

0002

2. Description of the Related Art There are generally two types of liquid crystal displays: segment display and matrix display. Here, the matrix display will be described. In particular, when displaying detailed images on televisions, etc., high-resolution images are required.
Matrix displays have started to attract attention. This active matrix display can be driven using a MOS transistor array, a thin film transistor array, a varistor element, or an MIM (metal insulator).
It can be roughly divided into driving methods using ulator (metal) elements. The above matters are described in detail in, for example, ``Latest Technology of Liquid Crystals'' published by Kogyo Research Association Co., Ltd. and ``Flat Panel Display 1991'' published by Nikkei BP.

These liquid crystal displays need to be dramatically improved by solving various problems such as an increase in the number of pixels, an increase in yield, and a decrease in cost. In particular, in order to increase the number of pixels, it is necessary to miniaturize the device and take urgent measures to prevent contact failure, disconnection, and short circuits in the conductive parts and active regions that make up the device, and to improve characteristics. Below, in order to specifically explain these problems, we will use Japanese Patent Application Laid-Open No. 62-276526, which describes an active matrix liquid crystal display device using TFTs. .

First, in FIG. 14, reference number (10) is a transparent insulating substrate made of glass or the like. A transparent conductive film (11) made of ITO and Cr,
A metal film (12) made of Ni, Mo, etc. is formed, and the laminated films (11) and (12) are etched by photolithography to form a pixel electrode portion (13) in a matrix shape. Further, a gate electrode (14) and a gate line (15) corresponding to this pixel electrode (13) are formed.

[0005] Here, a resist pattern is formed on the metal film (12) by resist coating, exposure, and development.
Exposed metal film (12) and underlying transparent electrode (11)
The gate electrode (14) and gate line (
15) and a pixel electrode section (13). Subsequently, as shown in FIG. 15, a gate insulating film (16) and two amorphous silicon layers (17) and (18) are successively laminated using a plasma CVD method so as to cover the metal film (12). . Here, the gate insulating film (16) is a silicon nitride film, and the amorphous silicon layer consists of an active amorphous silicon layer (17) and an ion-doped amorphous silicon layer (18). The stacked gate insulating film (16) and two amorphous silicon layers (17) and (18) are then processed by photolithography, and here the gate electrode (14) and gate line (
The gate insulating film (16) and 2
Processing is performed so that the amorphous silicon layers (17) and (18) of the layers remain.

Next, as shown in FIG. 16, aluminum is deposited to cover the amorphous silicon layers (17) and (18), a resist film (19) is formed by photolithography, and a metal film (20) made of aluminum is formed. Etch the drain electrode (21) and drain line (22).
) and a source electrode (23) are formed. Furthermore, as shown in FIG. 17, the ion-doped amorphous silicon layer (18) exposed on the surface and the metal film (12) of the pixel electrode part (13) are removed with the resist film (19) remaining.
) is removed by etching.

Finally, when the resist film (19) is removed, a transparent pixel electrode (24) is formed on the upper surface of the insulating substrate (10) as shown in FIG. are formed in an electrically connected state. Further, the liquid crystal device is formed as shown in FIG. The small squares formed in a matrix in the center are a set of TFTs, display electrodes formed around the TFTs, gate lines (100), drain lines (101), auxiliary capacitors, and auxiliary capacitor lines (102). A drain line (101) extends from left to right and is connected to a drain terminal (103), and a relief line (101) is connected to the drain terminal (103).
104) are formed across. On the other hand, a gate line (100) and an auxiliary capacitance line (102) extend above and below, and the gate line (100) connects to a gate terminal (105).
The auxiliary capacitance line (102) is connected in parallel with the connection line (106) so as to cross the gate line (100). Since the drain line (101) and the relief line (104) and the connection line (106) and the gate line (100) cross each other, they cannot be formed in the same layer and are crossed over.

[0008]

As described above, it is necessary to provide a crossover because there are relief lines and connection lines. FIG. 19 shows a crossover between the gate line (15) and the connection line, and a contact hole is provided closer to the gate terminal than the connection line to make contact with the second layer of gate terminal conductive material. FIG. 20 shows a crossover between the drain line (22) and the relief line, which also uses two contact holes.

On the other hand, as the number of pixels increases, the gate lines and drain lines also increase, so the contact holes also increase, and as the contact holes become smaller, defects in contact hole formation, contact defects, and process There was a problem that as the number increased, it caused defects.

0010

[Means for Solving the Problems] The present invention has been made in view of the above-mentioned problems, and includes a step of forming at least a gate line (35) on a transparent insulating substrate (31), and a step of forming a gate line (35) around a liquid crystal display device. A step of covering a terminal area having at least a gate terminal (37) and a drain terminal (38) to be formed with a mask (39), and applying an insulating layer on the insulating substrate (31) through the mask (39). (40), a step of laminating an amorphous silicon active layer (41) and an amorphous silicon contact layer (42), and using the mask (39), this insulating layer (40), amorphous silicon active layer (41) and amorphous silicon This problem is solved by at least the step of extending the component of the drain line (44) into the terminal region where the contact layer (42) is not laminated.

Further, a step of extending at least a gate line (35) on the insulating substrate (31) to the gate terminal (37) region or the vicinity of the gate terminal (37), and a step of forming the gate line (35) around the liquid crystal display device. a step of covering with a mask (39) an end of the gate terminal (37) extending to the terminal region or near the terminal region having at least the gate terminal (37) and the drain terminal (38);
) an insulating layer (40) on the insulating substrate (31) via
It includes at least the step of laminating an amorphous silicon active layer (41) and an amorphous silicon contact layer (42), and the insulating layer (
40), connect the gate line (35) to the gate terminal (37) in the area where the amorphous silicon active layer (41) and the amorphous silicon contact layer (42) are not laminated.
) or a contact surface for electrical connection with the gate terminal (37).

0012

[Operation] As shown in Fig. 3, the terminal area is covered with a metal mask (39), an insulating film (40), an amorphous silicon film (4
1) and (42) are applied. As a result, nothing is formed on the insulating substrate (31) corresponding to the terminal area. Therefore, a relief line (53) is formed in the first layer, and a drain line (44) is extended from the second layer over the side of the insulating film (40) near the drain terminal, as shown in FIGS. However, if the drain terminal is formed, the drain line and the drain terminal can be connected without forming a contact hole.

On the other hand, as shown in FIG. 10, by extending the gate line (35) to a region where the insulating film (40) is not formed, the gate line itself can be used as a gate terminal. By exposing the gate line (35) in the area where the gate line 40) is not formed, this exposed portion and the gate terminal can be formed without a contact hole.

[0014]

[Example] The present invention will be explained below. As is clear from the above description, the present invention provides switching elements formed in a matrix on a transparent insulating substrate, and row lines or column lines electrically connected to the switching elements divided into a plurality of layers. For example, T
It has excellent effects in those using FT, those using TFD, etc. First, a method for manufacturing a liquid crystal device using TFTs will be specifically explained with reference to FIGS. 1 to 9.

First, an insulating substrate (31) that transmits light is prepared and cleaned. Next, photoresist (32) is applied to the gate, gate line, connection line, relief line,
The resist corresponding to the storage electrode and auxiliary capacitance line is removed and patterned, and the entire surface gate material (33
) is applied to the entire surface. Here, aluminum and titanium or aluminum and copper are used as gate materials and formed by sputtering. This is shown in Figure 1. The drawings below are divided into left and right by wavy lines, with the left side showing the transistor and the right side showing the drain terminal. Furthermore, the formation positions of the connection line, relief line, and auxiliary capacitance line are shown in FIG.

[0016] Subsequently, the resist is removed. Figure 2
As shown in FIG. 3, all of the resist is stripped off, and at the same time, a gate (34), a gate line (35), and a storage electrode (36) are formed between the resist (32). Figure 11 shows
It is an enlarged plan view of the cell, and the gate (34) and gate line (35) are shown in dotted lines above and below. Furthermore, storage electrodes (36) are formed vertically like a fishbone with dotted lines. The above steps are the first characteristic steps of the present invention, and because they are formed by a so-called lift-off method, the steps of the gate (34), gate line (35), and storage electrode (36) are formed gently. be done. In other words, as shown in Figure 1, resist (
32) becomes a wall during the formation of the gate material, making it difficult for the gate material to wrap around the region adjacent to the resist.

Subsequently, a ring-shaped mask such as a metal mask (39) is formed to cover the terminal portion of FIG. 12, here the gate terminal (37) and the drain terminal (38), and an insulating film (40) such as silicon is formed. A ticker film, an amorphous silicon film (41), and a highly concentrated N-type amorphous silicon film (42) are formed. Also on this is a chromium film (43
) may be formed continuously or by sputtering.

The reason why the metal mask (39) is used in this step is to explain the characteristics of the present invention, and is to explain the characteristics of the present invention. ) This is because contact holes are not formed when connecting. In addition, approximately 30
This is because the temperature rises to 0 degrees. If there is a material other than metal that can withstand this high temperature, it may be used as a mask. As will become clear in the following steps, by using a metal mask, the area corresponding to the terminal part is covered with an insulating film (40),
Amorphous silicon films (41), (42) and chromium film (43) are not formed. Therefore, if the gate line (35) is extended to this region, the gate line (35)
35) surface is exposed. Therefore gate line (35)
It can use itself as a gate terminal or make direct contact with the gate terminal, eliminating the need for a contact hole.

Furthermore, although FIG. 20 is a diagram when the relief line is in the second layer, the conductor for crossover in the layer below the relief line can be extended as it is in the same way as the gate line, and can be used as a drain terminal. , it is possible to make direct contact with the drain terminal, and a contact hole on the drain terminal side can be omitted. Subsequently, the metal mask (39) is removed, and photoresist is applied, exposed, and developed on the gate (34) to achieve the shape shown by the rectangular solid line in FIG. The chromium film (43) and the amorphous silicon (42) and (41) are chemically etched, leaving only the region corresponding to the gate (45). Also, here, the intersection (46) of the gate line (35) and drain line (44) is also etched as shown by the solid line. Subsequently, the resist is peeled off. For the above, refer to FIG. 4.

Subsequently, as shown in FIG. 5, a transparent electrode material, here ITO (47), is formed over the entire surface. Furthermore, as shown in FIG. 6, a drain electrode (48), a drain line (44),
Patterning is performed so that the resist (51) remains on regions corresponding to the source electrode (49), display electrode (50), drain terminal (38), and gate terminal (37). After etching the ITO (47), the resist (5) is etched.
1), the chromium film (43) and amorphous silicon film (4) corresponding to the channel of the TFT (45) are
2) and peel off the resist (51). As a result, the chromium film (43) constitutes a source electrode and a drain electrode, and the amorphous silicon film (42) constitutes an amorphous silicon contact layer on the source side and an amorphous silicon contact layer on the drain side. Furthermore, the two-layer structure on the source side and drain side is achieved by self-alignment. See Figure 7.

In FIG. 11, the ITO (47) corresponds to the drawing number (52) indicated by a broken line, and the drain line (44)
, a drain electrode region formed integrally with this drain line (44), a display electrode (50), a source electrode region and drain line (44) formed integrally with this display electrode. The formed drain terminal regions are formed continuously.

The relief line (53) shown in FIG. 12 is made of the same material as the gate and formed in the first layer in the step of FIG. Moreover, as shown in Figure 3, the metal mask (
Since the insulating film (40) in the drain terminal region is not formed in step 39), the drain line and the drain terminal can be electrically connected without forming a contact hole, unlike the conventional example. As shown in Figure 9, the terminal part has a two-layer structure of ITO and chromium, but chromium may be omitted, or the ITO may not extend to the terminal part, and only chromium in contact with the ITO may be extended to the terminal part. It may be allowed to exist. Also, the auxiliary capacity line (54
) is also formed in the first layer in the process shown in FIG. 1, and is covered with a metal mask as shown in FIG. 3, so the surface near the terminal portion of the gate line is not covered with the insulating film (40) and is exposed. ing. Therefore, by the steps shown in FIGS. 5 and 6, the gate terminal (37) and the gate line (
35) can be electrically connected. This structure is shown in FIG. Although the three-layer structure here includes the gate line, ITO, and Ni, only the gate line may be extended to the terminal portion, or Ni may be omitted in FIG. 10.

Furthermore, as shown in FIG. 8, only the region that will become the pixel electrode is formed with resist (55), and the entire surface is coated with nickel (55).
6) Form. Here, nickel is formed by electroless plating, including the drain electrode (48) and the drain line (44).
), are formed on the source electrode (49) and drain terminal (38), and are done to reduce their resistance. Here, since nickel can be formed on the ITO by electroless plating, it can be formed with a so-called self-alignment function, and the drain electrode (48) and drain line (44) can be formed with a so-called self-alignment function.
), the source electrode (49) can be formed without shifting from the underlying ITO layer.

Finally, the resist (55) is removed,
Although not shown in FIG. 9, an overcoat is applied, the counter substrate on which the counter electrode is formed and the main substrate (31) are bonded together, and liquid crystal is injected thereinto to complete the process.

[0025]

Effects of the Invention As is clear from the above explanation, the terminal area formed around the liquid crystal display device due to the use of a mask is formed using an insulating film formed on the gate electrode or the gate line, an amorphous silicon active layer, etc. Since no layer, amorphous silicon contact layer, etc. are formed, the insulating substrate is exposed.

Since the connection line is formed outside the gate line at a position opposite to the gate terminal side, the gate line formed in the first layer connects the gate line itself in the exposed region. It can be used as a terminal, and the gate terminal and its surface can be directly connected. Therefore, contact holes are not required. Furthermore, as shown in the conventional example shown in FIG. 19, even if the connection line is in the second layer, the gate line is formed in the first layer, so the gate line itself can be used as a gate terminal in the exposed area, and can also be used as a gate terminal. You can connect the surfaces directly. Therefore, contact holes are not required.

Further, since the relief line is formed in the first layer, the drain line can extend directly to the exposed region, and the drain line itself can be used as a drain terminal. Also, the drain terminal and its surface can be directly contacted. Further, as shown in the conventional example shown in FIG. 20, even if the relief line is formed in the second layer, contact is made to the conductor in the first layer from before it crosses the relief line, and this conductor can be used as a drain terminal as it is. Further, the drain terminal can be directly contacted with the surface of this conductor. Therefore, contact holes can be completely eliminated or reduced.

Therefore, as miniaturization progresses, it is possible to reduce the number of contact holes, thereby reducing contact hole formation defects and
It is possible to reduce contact defects and improve yield.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 2 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 3 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 4 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 5 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 6 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 7 is a cross-sectional view of a liquid crystal display device according to the present invention.

FIG. 8 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 9 is a sectional view of a liquid crystal display device according to the present invention.

FIG. 10 is a cross-sectional view of a liquid crystal display device according to the present invention.

FIG. 11 is a plan view of a liquid crystal display device according to the present invention.

FIG. 12 is a schematic plan view of a liquid crystal display device according to the present invention.

FIG. 13 is a schematic plan view of a conventional liquid crystal display device.

FIG. 14 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 15 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 16 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 17 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 18 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 19 is a cross-sectional view of a conventional liquid crystal display device.

FIG. 20 is a cross-sectional view of a conventional liquid crystal display device.

Claims (5)

[Claims] 1. A method for manufacturing a liquid crystal display device in which a plurality of gate lines and drain lines are formed on a transparent insulating substrate, and TFT switching elements and display electrodes are arranged in a matrix at the intersections of the gate lines and drain lines, the method comprising: a step of forming at least a gate line on the insulating substrate; a step of covering a terminal region having at least a gate terminal and a drain terminal formed around the liquid crystal display device with a mask; laminating an insulating layer, an amorphous silicon active layer and an amorphous silicon contact layer on an insulating substrate, and using the mask to cover the terminal area where the insulating layer, the amorphous silicon active layer and the amorphous silicon contact layer are not laminated; , a method for manufacturing a liquid crystal display device, comprising at least the step of extending a component of the drain line. 2. A method for manufacturing a liquid crystal display device in which a plurality of gate lines and drain lines are formed on a transparent insulating substrate, and TFT switching elements and display electrodes are arranged in a matrix at the intersections of the gate lines and drain lines, the method comprising: a step of extending at least a gate line on the insulating substrate to a gate terminal region or the vicinity of the gate terminal; and a step of extending the gate line to at least a terminal region having at least a gate terminal and a drain terminal formed around the liquid crystal display device or the vicinity thereof. and a step of laminating an insulating layer, an amorphous silicon active layer, and an amorphous silicon contact layer on the insulating substrate through the mask, The gate line exposed through the mask in the area where the insulating layer, the amorphous silicon active layer and the amorphous silicon contact layer are not laminated is used as a gate terminal or a contact surface for electrically connecting to the gate terminal. A method for manufacturing a liquid crystal display device. 3. The method for manufacturing a liquid crystal display device according to claim 1, wherein the mask is a heat-resistant mask or a metal mask used in the lamination step. 4. A gate line formed integrally with the gate on a transparent insulating substrate and extending to the vicinity of the gate terminal (or gate terminal area) provided around the insulating substrate, or this gate line. a step of forming a storage electrode with a mask, a step of covering the gate line (or gate terminal region) extending to the vicinity of the drain terminal and gate terminal formed around the insulating substrate with a mask, and forming a storage electrode through the mask. a step of laminating a silicon ticker film, an amorphous silicon active layer, an amorphous silicon contact layer, and chromium on the insulating substrate, and removing the mask and depositing a chromium layer, an amorphous silicon contact layer, and an amorphous silicon layer corresponding to the gate; a step of etching to leave an active layer; a source region, a drain region, the display electrode of the TFT of which the gate is a part; a drain line region extending integrally with the drain region to the drain terminal; and a gate terminal. a step of forming a region with a display electrode material;
A step of removing a chromium layer and an amorphous silicon contact layer corresponding to the channel region of T, and forming a source region, a drain region, the display electrode formed on the insulating substrate, and a drain terminal integrally with the drain region. 1. A method of manufacturing a liquid crystal display device, comprising at least the step of depositing a conductive material with low resistance on a drain line region and a gate terminal region that extend to the drain line region and the gate terminal region. 5. The method of manufacturing a liquid crystal display device according to claim 4, wherein the mask is a metal mask and the display electrode material is ITO.