JPH04252057A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH04252057A JPH04252057A JP826491A JP826491A JPH04252057A JP H04252057 A JPH04252057 A JP H04252057A JP 826491 A JP826491 A JP 826491A JP 826491 A JP826491 A JP 826491A JP H04252057 A JPH04252057 A JP H04252057A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor pellet
- flexible substrate
- resin
- reinforcement panel
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000008188 pellet Substances 0.000 claims abstract description 19
- 239000004065 semiconductor Substances 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 239000011347 resin Substances 0.000 claims abstract description 15
- 229920005989 resin Polymers 0.000 claims abstract description 15
- 238000007789 sealing Methods 0.000 claims abstract description 6
- 230000003014 reinforcing effect Effects 0.000 claims description 17
- 230000002265 prevention Effects 0.000 claims description 3
- 230000002787 reinforcement Effects 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 4
- 238000005452 bending Methods 0.000 abstract description 2
- 230000002093 peripheral effect Effects 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000012779 reinforcing material Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は薄型化対応としてフレキ
シブル基板を使用する混成集積回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit using a flexible substrate to reduce the thickness of the circuit.
【０００２】0002
【従来の技術】混成集積回路の製造では、プリント基板
上にベアチップを直接実装し、装置又はセットの小型化
，薄型化を進める方法が急速に一般化しつつある。リジ
ッドのプリント板を使用する方法が一般的であるが、混
成集積回路又はモジュールとしてのブロックと、他の部
品又は他のブロックとの接続を容易にするため、フレキ
シブルプリント基板の適用も拡大しつつある。2. Description of the Related Art In the production of hybrid integrated circuits, a method of directly mounting bare chips on a printed circuit board to make devices or sets smaller and thinner is rapidly becoming common. Although the use of rigid printed circuit boards is common, the application of flexible printed circuit boards is also expanding to facilitate the connection of blocks as hybrid integrated circuits or modules with other components or other blocks. be.
【０００３】すなわち図３（ａ）に示すように、フレキ
シブル基板５上に直接半導体ペレット１を搭載し、ワイ
ヤボンディング法によりワイヤ２を接続する場合、製造
時基板の固定方法に難点があるため、セットへの実装ス
ペースから許される範囲でフレキシブル基板５の裏面に
基板固定用の補強板８を追加固定し、製造しやすい工夫
をとっている。That is, as shown in FIG. 3(a), when semiconductor pellets 1 are directly mounted on a flexible substrate 5 and wires 2 are connected by wire bonding, there is a problem in the method of fixing the substrate during manufacturing. A reinforcing plate 8 for fixing the board is additionally fixed to the back surface of the flexible board 5 to the extent permitted by the mounting space in the set, in order to facilitate manufacturing.
【０００４】又、図３（ｂ）に示すように、半導体ペレ
ット実装後の半導体ペレット１及びワイヤ２を機械的，
化学的保護するための樹脂４で封止する構造になるが、
実装密度を向上させるため封止樹脂の広がり範囲を制限
するための樹脂の流れ止め枠９を用いる方法をとる場合
もある。Further, as shown in FIG. 3(b), the semiconductor pellet 1 and the wire 2 after being mounted are mechanically and
The structure is sealed with resin 4 for chemical protection, but
In order to improve the packaging density, a method may be adopted in which a resin flow stopper frame 9 is used to limit the spread range of the sealing resin.
【０００５】[0005]
【発明が解決しようとする課題】上述した従来の混成集
積回路では、フレキシブル基板５の裏面に補強板８が付
加されるこにより、補強板３の厚さだけ製品の厚さが増
すため、薄型化に対して障害となるという問題点があっ
た。[Problems to be Solved by the Invention] In the conventional hybrid integrated circuit described above, by adding the reinforcing plate 8 to the back surface of the flexible substrate 5, the thickness of the product increases by the thickness of the reinforcing plate 3. There was a problem in that it was an obstacle to the development.
【０００６】[0006]
【課題を解決するための手段】本発明の混成集積回路は
フレキシブル基板と、このフレキシブル基板上に固着さ
れた半導体ペレットと、この半導体ペレットの周囲に固
定された樹脂流れ止め枠を兼ねる補強板と、前記半導体
ペレットを封止する樹脂とを含むものである。[Means for Solving the Problems] The hybrid integrated circuit of the present invention includes a flexible substrate, a semiconductor pellet fixed on the flexible substrate, and a reinforcing plate fixed around the semiconductor pellet that also serves as a resin flow prevention frame. , and a resin for sealing the semiconductor pellet.
【０００７】[0007]
【実施例】次に本発明について図面を参照して説明する
。図１は本発明の第１の実施例の断面図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of a first embodiment of the invention.
【０００８】図１において、フレキシブル基板５上には
半導体ペレット１が固着されており、更にワイヤ２をボ
ンディングする際、支障のない範囲で半導体ペレット１
の周辺を開口し、樹脂４の流れ止め枠を兼る補強板３が
固定されている。フレキシブル基板５は０．１〜０．２
ｍｍと薄いため、半導体ペレット１のマウント，ボンデ
ィング及び樹脂封止時に、基板のたわみやそり等の問題
が発生しない様、補強板３の仕様は配慮する必要がある
。即ち、補強板３の厚みは、補強板の取りうる面積で０
．５〜１．０ｍｍの間で決定する。In FIG. 1, a semiconductor pellet 1 is fixed on a flexible substrate 5. Furthermore, when bonding a wire 2, the semiconductor pellet 1 is fixed to a flexible substrate 5.
A reinforcing plate 3, which is open around the periphery of the resin 4 and serves as a frame for preventing the resin 4 from flowing, is fixed thereto. Flexible substrate 5 is 0.1 to 0.2
Since the reinforcing plate 3 is as thin as 1 mm, it is necessary to take into consideration the specifications of the reinforcing plate 3 so that problems such as bending and warping of the substrate do not occur during mounting, bonding, and resin sealing of the semiconductor pellet 1. That is, the thickness of the reinforcing plate 3 is 0 in the area that the reinforcing plate can take.
．． Determine between 5 and 1.0 mm.
【０００９】フレキシブル基板５上に搭載する半導体ペ
レット１は１個だけでなく、複数の場合も同様である。
補強板３の材質は通常はプリント板であるが、フレキシ
ブル基板５の回路配線（図示せず）間の絶縁性を保持し
、加工性が良く、補強材としての機能を有するものなら
使用可能である。The same applies to the case where not only one semiconductor pellet 1 but a plurality of semiconductor pellets 1 are mounted on the flexible substrate 5. The material of the reinforcing board 3 is usually a printed board, but any material that maintains insulation between the circuit wiring (not shown) of the flexible board 5, has good workability, and functions as a reinforcing material can be used. be.
【００１０】図２は本発明の第２の実施例の断面図であ
る。この第２の実施例は、フレキシブル基板５の補強材
としての目的及び封止樹脂の流れ止め枠としての目的以
外に、配線回路も兼ね備えた構造のものである。FIG. 2 is a cross-sectional view of a second embodiment of the invention. This second embodiment has a structure that not only serves as a reinforcing material for the flexible substrate 5 and as a frame for preventing the sealing resin from flowing, but also serves as a wiring circuit.
【００１１】即ち、配線板を兼ねた補強板３Ａは、上面
に配線７がそして側面に端面スルーホール６が形成され
ており、フレキシブル基板５上の配線のみならず、補強
板３Ａ自身にも配線板としての機能を持たせたものであ
る。従って、フレキシブル基板５の面積を小さく抑え、
セットの小型化に寄与させることができる。この配線を
兼ねた補強板３Ａはリジッドなプリント板であり、上面
及び側面にはフレキシブル基板５の配線と接続するパタ
ンが形成されているが、下面はフレキシブル基板５の配
線間の絶縁を保持する工夫をしておくことは言うまでも
ない。That is, the reinforcing plate 3A, which also serves as a wiring board, has wiring 7 on the top surface and an end surface through hole 6 formed on the side surface, so that not only the wiring on the flexible substrate 5 but also the wiring on the reinforcing plate 3A itself is formed. It has the function of a board. Therefore, the area of the flexible substrate 5 can be kept small and
This can contribute to miniaturization of the set. The reinforcing board 3A, which also serves as wiring, is a rigid printed board, and a pattern connecting to the wiring of the flexible board 5 is formed on the top and side surfaces, while the bottom surface maintains insulation between the wirings of the flexible board 5. Needless to say, you need to be creative.
【００１２】0012
【発明の効果】以上説明したように本発明は、半導体ペ
レットの周辺部に樹脂流れ止め枠を兼ねる補強板を設け
、しかもこの補強板を配線板として使用することにより
、薄型化されしかもフレキシブル基板の面積の少い混成
集積回路を得ることができる。As explained above, the present invention provides a reinforcing plate that also serves as a resin flow prevention frame around the semiconductor pellet and uses this reinforcing plate as a wiring board, thereby realizing a thin and flexible board. A hybrid integrated circuit with a small area can be obtained.
【図１】本発明の第１の実施例の断面図である。FIG. 1 is a sectional view of a first embodiment of the invention.
【図２】本発明の第２の実施例の断面図である。FIG. 2 is a sectional view of a second embodiment of the invention.
【図３】従来の混成集積回路の一例の断面図である。FIG. 3 is a cross-sectional view of an example of a conventional hybrid integrated circuit.
１ 半導体ペレット ２ ワイヤ ３，３Ａ 補強板 ４ 樹脂 ５ フレキシブル基板 ６ 端面スルーホール ７ 配線 ８ 補強板 ９ 枠 1 Semiconductor pellet 2 Wire 3,3A Reinforcement plate 4 Resin 5 Flexible board 6 End through hole 7 Wiring 8 Reinforcement plate 9 Frame
Claims (2)
ル基板上に固着された半導体ペレットと、この半導体ペ
レットの周囲に固定された樹脂流れ止め枠を兼ねる補強
板と、前記半導体ペレットを封止する樹脂とを含むこと
を特徴とする混成集積回路。1. A flexible substrate, a semiconductor pellet fixed on the flexible substrate, a reinforcing plate fixed around the semiconductor pellet that also serves as a resin flow prevention frame, and a resin for sealing the semiconductor pellet. A hybrid integrated circuit comprising:
求項１記載の混成集積回路。2. The hybrid integrated circuit according to claim 1, wherein circuit wiring is formed on the reinforcing plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP826491A JPH04252057A (en) | 1991-01-28 | 1991-01-28 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP826491A JPH04252057A (en) | 1991-01-28 | 1991-01-28 | Hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04252057A true JPH04252057A (en) | 1992-09-08 |
Family
ID=11688297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP826491A Pending JPH04252057A (en) | 1991-01-28 | 1991-01-28 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04252057A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997036325A1 (en) * | 1996-03-25 | 1997-10-02 | Micromodule Systems | Packaging and interconnect system for integrated circuits |
| WO2012067003A1 (en) * | 2010-11-17 | 2012-05-24 | シャープ株式会社 | Circuit substrate and manufacturing method therefor |
-
1991
- 1991-01-28 JP JP826491A patent/JPH04252057A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5796164A (en) * | 1993-05-11 | 1998-08-18 | Micromodule Systems, Inc. | Packaging and interconnect system for integrated circuits |
| WO1997036325A1 (en) * | 1996-03-25 | 1997-10-02 | Micromodule Systems | Packaging and interconnect system for integrated circuits |
| WO2012067003A1 (en) * | 2010-11-17 | 2012-05-24 | シャープ株式会社 | Circuit substrate and manufacturing method therefor |
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