JPH0425033A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To make it possible to scale a gate insulating film on the surface of silicon of a CCD by providing a gate insulating film and a gate electrode formed on the surface of a second semiconductor area formed on the top portion of a first semiconductor area and forming the gate insulating film into an ONO three-layer structure by using an amorphous nitride film. CONSTITUTION:Formed on the top portion of a p substrate 101 are an n area 102, an ONO film 103 which becomes a gate insulating film, a poly-silicon gate electrode 104 formed thereon, and a poly-silicon gate electrode 106 of a second layer, formed separated by an oxide film (SiO2) or ONO film 105. Its feature is that a nitride film of the ONO film 103 is formed from an amorphous crystal structure (alpha-SimNn). A method of manufacturing it comprises the steps of forming the lower SiO2 of the ONO film by thermal oxidization, and forming a nitride film of an amorphous structure. Thereafter, a silicon oxide nitride film (SixNyOz) is formed on the alpha-SimNn.

Description

Detailed Description of the Invention The present invention relates to the structure of a semiconductor device that realizes a CCD in which the gate insulating film is scaled without impairing the dynamic range characteristics (maximum charge transfer amount characteristics). It is something.

Conventional technology A buried channel type CCD 1, which is most commonly used as a signal charge transfer circuit for a solid-state image sensor used in a consumer video camera, has a p-substrate 3 as shown in FIG.
n region 302 formed on top of 01 and gate oxide film of thickness Tox (usually about 1000 5i02) 3
A first layer polysilicon gate electrode 304 formed on 03 and a second layer polysilicon gate electrode 30 formed across a gate oxide film (SiO2) 305.
6 is typical.

The energy band diagram of the thermal equilibrium state (thermal equilibrium state when no voltage is applied) along the A-A'' section in Fig. 3 is shown in Fig. 4 (a). In the operating state, a positive voltage (15 to 20
Since V) is applied to the n-region 302, the energy band diagram becomes as shown in FIG. 4(b). At this time, the voltage of the polysilicon gate electrode is Ov. If the voltage applied to the gate electrode increases in the positive direction, the signal charge is accumulated, and if it increases in the negative direction, the signal charge is not accumulated.

When a high voltage is applied across the gate oxide film (SiO2), in the case of a buried channel CCD, negative charges (electrons) are generated or injected into the oxide film, causing characteristic changes. It may happen. This is my friend Figure 4 (
As shown by the dotted line in b), the strength is due to the electrons in the gate oxide film changing the energy band of the gate oxide film.If the film thickness TOX is thick, this is not a big problem.

Apart from this current technological background of CCDs, there is also a 2 million pixel CCD that will be required for imaging equipment in the future high-definition era.
When it comes to CDs, consideration of scaling (miniaturization) is an important design guideline, just as with DRAM semiconductor memory.

In addition, miniaturization of the gate insulating film thickness (Fig. 5 calculation results (maximum transfer charge amount N sig and gate electrode voltage Vg when the insulating film thickness d is 1000 and 500 people)
It can be seen that the smaller the insulating film thickness, the smaller the amplitude of the drive pulse applied to the gate electrode, which is advantageous in lowering the voltage, as shown in the following relationship (relationship between the two).

Problems to be Solved by the Invention In a thin gate oxide film (SiO2), as shown in Figure 4(c), negative charges (
electrons) strengthen the electric field at the n-8i~5i02 interface.As a result, the hole Fowler-Nordheim tunneling current (occurs when carriers are injected into the gate oxide film by the tunnel effect and then flow through the gate oxide film according to the electric field. (current) and impede the normal operation of the CCD. In addition, the thin SiO2 equivalent to 500 people shown in FIG. 5 cannot be used.

ONO film (S i 02 / Si sNi / Si x Ny
A three-layer membrane with an O2 configuration is used.

Therefore, Fig. 6 shows the energy band diagram of the thermal equilibrium state (thermal equilibrium state when no voltage is applied) when replacing the 500 thin SiO2 films in Fig. 4(c) with an ONO film of equivalent film thickness. Shown in (a).

Figure 6(b) shows the energy band diagram when the CCD is in the main operating state and the voltage applied to the gate electrode is Ov.
Shown below.

As shown in Figure 6(b), the lower part 5 from the n-type silicon side
Holes injected into the i02 film 601 by direct tunneling (a tunnel effect phenomenon in which carriers penetrate the gate oxide film)
The thin upper 5iOa film 60 flows as a Renkel current (a current that flows according to the electric field while carriers in the conduction band or valence band of the nitride film move back and forth between the trap level and the electric field).
3 through direct tunneling to the gate electrode 604 side.

As a result, the surface of the n-type silicon tends to become more n-type.Even if the voltage of the gate electrode 604 is changed in the negative direction, a large amount of holes simply flow from the silicon side to the gate electrode, resulting in an accumulation state. Due to these phenomena, simply using a thin ONO film as the gate insulating film is not enough to change the CCD
The maximum transfer charge amount will decrease.

The present invention has focused on these issues, and has developed a buried channel CCD using a thin gate insulating film that is suitable for miniaturization of CCD without impairing the maximum transfer charge amount (dynamic performance).
The purpose is to provide a semiconductor device with this structure.

Means for Solving the Problems A buried channel type CCD structure is adopted in which a three-layer ONO film using an amorphous nitride film is used as a gate insulating film on the surface C of the n-type region on the top of the silicon, which becomes a charge transfer region.

Effects of the present invention (see above) The amorphous nitride film (αSimN)
Nitride film (n) with a dense band gap energy (
By utilizing the fact that SisN4) is larger than C
It becomes possible to scale the gate insulating film on the silicon surface of the CD.

Example Embodiments of the present invention will be described below based on the drawings.

FIG. 1 (main) shows the structure of a semiconductor device according to an embodiment of the present invention.As can be seen from the figure, there is an n-region 102 formed on the upper part of a p-substrate 101, and an n-region 102 formed on the upper surface of the n-region 102. The thickness of the gate insulating film is 'I' ono.
NO film 103 and a first film formed on ONO film 103
The polysilicon gate electrode 104 of the layer and the oxide film (Si
O2) or a second layer of polysilicon gate electrode 106 formed with an ONO film 105 in between. A structural feature is that the nitride film of the ONO film 103 is formed not in a dense polycrystalline structure (S13N=) but in an amorphous crystalline structure (α-3imNn).

In terms of manufacturing method, the lower part 5i02 of the 1iONo film is transformed by about 300 layers by thermal oxidation, and then a nitride film with an amorphous structure is transformed by about 400 layers by plasma CVD or photoCVD using the reaction of 5iH- and NH3. Then α
A silicon oxynitride film (SixNyoz) is formed on the -8imNn by plasma CVD or photoCVD using approximately 50 to 70 people.

The energy band diagram of the thermal equilibrium state (thermal equilibrium state when no voltage is applied) along the A-A'' section in Fig. 1 is shown in Fig. 2(a).The band gap of the amorphous nitride film Energy is 0. compared to polycrystalline nitride film.
It has increased by about 5 eV.

In the main operating state of the CCD shown in FIG. 1, a positive voltage (15 to 20 V) is applied to the n region 102 with respect to the ft n region 101, so the energy band diagram is as shown in FIG. 2(b). Become. The voltage of this opening polysilicon gate electrode is Ov. Since the band gap energy of the amorphous nitride film has increased, it becomes a barrier to holes in the valence band on the surface of the &n region 102. In other words, there are no holes injected into the SiO2 film 202 from the n region.

Therefore, as in the case of a thick gate oxide film, increasing the gate electrode voltage in the positive direction results in a signal charge accumulation state, and increasing in the negative direction results in a signal charge non-storage state.

Effects of the Invention According to the present invention, O2 can be used as a thin gate insulating film without adversely affecting the maximum transfer charge amount, which is the operational performance of the charge transfer region.
Since it becomes possible to employ the NO film, it becomes possible to scale the gate insulating film on the silicon surface of the CCD. As a result, the insulating film of the CCD becomes thinner and the amplitude of the transfer pulse becomes smaller, making it possible to reduce the power supply voltage resulting from scaling, which is a design guideline for increasing the number of pixels. The effect is extremely large.

[Brief explanation of drawings]

Figure 1 shows the structure of a CCD type semiconductor device according to an embodiment of the present invention. Figure 2 shows the energy band along the AA' cross section of the embodiment shown in Figure 1. Figure 3 shows a conventional CCD type semiconductor device. Figure 4 shows the energy band along the A-A' cross section of the conventional example in Figure 3. Figure 5 shows the influence of the thickness of the insulating film on the relationship between the gate voltage and the maximum transferred charge. Summary of Calculated Results FIG. 6 is an energy band diagram along the AA' cross section of the conventional example of FIG. 3 when an ONO film equivalent to a thin oxide film is used. 101, 301...P substrate 102, 302...N region 103, 104, 303, 304...Gate insulating film 2
01, 602...Nitriding air 202, 601...Lower oxide film 203, 603...Upper oxidizing air 104.304...First layer polysilicon gate electrode 106.306...Second layer poly Name of silicon gate electrode agent: Patent attorney Shigetaka Awano Figure (b)

Claims (2)

[Claims] (1) A first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type formed on the top of the first semiconductor region, and a second semiconductor region formed on the surface of the second semiconductor region. The main components are a gate insulating film and a gate electrode formed on the gate insulating film, and the gate insulating film is an ONO (SiO_2/α) using an amorphous nitride film.
-SimNn/Si_xN_yO_z) A semiconductor device characterized by having a gate insulating film having a three-layer structure. (2) A first step of forming an oxide film (SiO_2) on the surface of single crystal silicon, a second step of forming an amorphous nitride film (α-Si_mN_n) on the surface of the oxide film, and a second step of forming an amorphous nitride film (α-Si_mN_n) on the surface of the oxide film. Oxidize the surface to form an oxide film (Si_xN_
A method for manufacturing an insulating film having a three-layer ONO structure, the method comprising a third step of forming an insulating film having a three-layer ONO structure.