JP3302189B2 - Charge-coupled device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a charge-coupled device, and more particularly, to a charge-coupled device having an improved gate insulating film structure.

[0002]

2. Description of the Related Art (Conventional 1) A charge-coupled device (hereinafter referred to as a CCD) in which a plurality of transfer electrodes are arranged close to each other via a gate insulating film on a semiconductor substrate is known.
Currently, it is mainly used for solid-state imaging devices such as linear sensors and area sensors. In this device, a CCD is used for converting input light into signal charges, storing the signals in a photoelectric conversion storage unit, and then transferring the signal charges from the storage unit to an output unit.

The problem when miniaturizing a CCD is that
This is a reduction in the amount of handled signals. Since simply reducing the area reduces the amount of signals that can be handled, there is a need to increase the capacitance by reducing the thickness of the gate insulating film. As a gate insulating film, a silicon oxide film has been most commonly used since the invention of CCD. However, when the silicon oxide film is thinned, the withstand voltage between the substrate and the transfer electrode is deteriorated, and the silicon oxide film is not practical.

Therefore, recently, a silicon nitride film having a large dielectric constant has been used as a gate insulating film instead of a silicon oxide film. At this time, since the actual film thickness does not need to be so thin, the withstand voltage can be secured, and the gate insulating film can be effectively thinned.

However, in the prior art, since the silicon nitride film is used on the entire surface of the gate insulating film of the CCD, it was not possible to reduce the dark current generated near the substrate surface by performing sintering. The dark current can be reduced by sintering when the gate insulating film is a silicon oxide film.

[0006] The sinter means that after forming a CCD, an insulating film containing a large amount of hydrogen atoms is deposited on the CCD, and the hydrogen atoms are combined with dangling bonds of silicon atoms near the substrate surface through a diffusion process to form a CCD. This is a technique for reducing dangling bonds that cause current. Since hydrogen atoms bonded to the dangling bonds do not pass through the silicon nitride film, the dark current cannot be reduced when the gate insulating film is formed of the silicon nitride film. For this reason, there has been a problem that CCD noise increases.

Further, in the prior art, when a silicon nitride film is used as a gate insulating film as described above, it is impossible to reduce a dark current. Therefore, a frame interline transfer type (hereinafter, referred to as an FIT type) is substantially used. 3) There is a problem that a silicon nitride film cannot be applied to a gate insulating film of an area image sensor.

In an interline transfer type (hereinafter, referred to as IT type) image sensor, a method of removing a silicon nitride film in a pixel portion of an image portion and performing sintering is known as a method of reducing dark current.
At this time, hydrogen atoms diffuse into the substrate through the pixel section,
Bonding with a dangling bond included in the CCD is possible, and dark current can be reduced. However, in the FIT type area image sensor, it is possible to reduce the dark current by removing the silicon nitride film in the pixel part in the same manner as the IT type area image sensor, but not in the accumulation part. It is. For this reason, there is a problem that noise increases due to dark current generated in the storage unit.

(Conventional 2) On the other hand, a CCD has a single-layer gate structure, a double-layer overlap structure, and the like. However, in a CCD having a single-layer gate structure, the gate interval is relatively wide as described below. Therefore, the charge transfer efficiency and the charge transfer speed are low. This problem will be described in the case of a two-layer single-layer CCD.

The structure, operation and problems of the single-layer CCD of the first type will be described with reference to FIG. The uppermost diagram in FIG. 10 shows the structure of the single-layer CCD. p-type semiconductor substrate 1
Gate electrodes 3-1 to 3-4 are formed above oxide film 2 with an oxide film 2 formed by oxidation therebetween. An oxide film 4 formed by deposition exists between and above the gate electrodes. Actually, the arrangement of the gate electrodes is repeated on the left and right of FIG. 10, and furthermore, the charge injection port and the discharge port exist at both ends. Here, only the charge transfer operation and the problems necessary for understanding the problem are understood. The range is indicated.

FIGS. 10 (a) to 10 (d) show the distribution of surface potential and transfer charge when this single-layer CCD is operated by changing the voltage of the gate electrode shown in FIG.
And these correspond to times a to d in FIG. 8, respectively. Here, the potential is shown with the downward direction being positive with respect to the potential of the p substrate 1. Time a is the gate electrode 3-2.
Under the condition that the transfer charge exists under the gate electrode 3-
2, a voltage higher than that of the substrate (written as “H”) is applied, and the same voltage as the substrate (written as “L”) is applied to the gate electrodes 3-1, 3-3, and 3-4. I have.

The surface potential is high below the gate electrode 3-2 as shown in FIG. 10 (a), in which electrons serving as transfer charges are present. Then, Gate 3
When -3 is set to "H", the surface potential becomes as shown in FIG.
As described above, the voltage rises below the gates 3-2 and 3-3, and a part of the transfer charge flows below the gate 3-3. Here, since the substrate surface between the gates 3-2 and 3-3 is farther from the gate than the substrate surface immediately below the gate, the influence of the gate voltage is less likely to be exerted, and the surface potential is slightly lower. It is a barrier to transfer.

Next, when the gate 3-2 is set to "L", the remaining charge under the gate 3-2 flows under the gate 3-3 as shown in FIG. Even in this state, the charge transfer barrier remains until the gate voltage becomes sufficiently high, resulting in deterioration of charge transfer efficiency and transfer speed.
This is a major problem in single-layer CCDs.

Thereafter, as shown in FIG.
At time d when 2 becomes "L", the charge exists under the gate 3-3, and the charge transfer for one gate from the state of (a) ends. This series of operations is repeated to transfer charges.

Next, the structure, operation and problems of the single-layer CCD according to the second method will be described. The top diagram in FIG. 11 is a diagram showing the structure of a single-layer CCD called a buried channel type. The structure of the gate is the same as that of the first method shown in FIG. 10, except that an n-type diffusion layer 5 is formed on the surface of the p substrate 1 here. When the substrate 1 is used as a potential reference, 0 or a positive constant voltage (referred to as “H”) is applied to the n-type diffusion layer 5. The gate voltage can be changed between this “H” and a certain lower voltage “L”.

In this case, charges can be transferred by the voltage change shown in FIG. Time a is gate 3-2
Is in a state where electron transfer charges exist under
The same voltage “H” as that of the n-type diffusion layer is applied to −2, but the voltage “L” is applied to the other gates so that there is no electron. Here, since the channel portion between the gates 3-3 and 3-4 is farther from the gate than the channel portion immediately below the gate, the influence of the gate voltage is less likely to be exerted, and the potential is depressed.

Next, at time b when the gate 3-3 is set to "H", a part of the electric charge is transferred to the gate 3-3 as shown in FIG.
Has moved below. Next, at time c when the voltage of the gate 3-2 is lowered, the potential of the gate 3-2 is pulled toward “L” as shown in FIG.
3 is transferred below the gate 3-3. At this time, a potential dent appears in the channel portion between the gates 3-1 and 3-2 due to the large distance from the gate. Here, the electric charge is left behind.

After that, at time d when the gate 3-2 becomes "H", it is ideal that all the transfer charges have moved below the gate 3-3. However, as shown in FIG. Gate 3-
Some charge is left behind between 1 and 3-2. This phenomenon also causes a deterioration in the charge transfer efficiency and the charge transfer speed, which is a serious problem.

The problems of the two types of single-layer CCDs have been described so far. However, in each case, the influence of the gate is hard to reach between the gates, so that the charge transfer efficiency and the transfer speed are deteriorated. As is apparent from the above description, this problem exists as long as the gates are arranged at a certain interval. For example, it exists regardless of how to take the gate voltage, and it exists whether the driving method of the CCD is two-phase driving, three-phase driving, or four-phase driving. In addition, this problem also exists in the case where the transfer charge is not electrons but holes instead of electrons in the case of the n-type CCD of the substrate.

As a countermeasure against this problem, a conventional method is to make the interval between the gates as small as possible to reduce the deterioration of the transfer efficiency and the transfer speed. However, in the case of a single-layer CCD, it is difficult to make the distance between the gates sufficiently small because a short circuit between adjacent gates must be prevented. Further, reducing the gate interval only reduces the degree of deterioration of the charge transfer efficiency and the transfer speed, and does not essentially solve the problem.

[0021]

As described above, in the conventional single-layer CCD, the portion between the gates in the channel portion is less affected by the gate voltage than the portion immediately below the gate. A phenomenon occurs in which a barrier is generated or charges are left behind, which causes deterioration in charge transfer efficiency and charge transfer speed. In particular, in a single-layer CCD, it is difficult to reduce the gate interval while preventing a short circuit between the gates, so this phenomenon is a serious problem.

The present invention has been made in consideration of the above circumstances, and has as its object to make it easy for the gate to influence the portion between the gates of the channel portion, and to compare them at the same gate interval. An object of the present invention is to provide a charge-coupled device capable of improving charge transfer efficiency and charge transfer speed in such a case.

[0023]

[Means for Solving the Problems]

(Configuration) In order to solve the above problem, the present invention employs the following configuration.

That is, the present invention provides a charge-coupled device in which a plurality of transfer electrodes are arranged close to each other on a semiconductor substrate via a first insulating film and the transfer electrodes have a single-layer gate structure. It is characterized in that the first insulating film is formed thinner than under the transfer electrode, and a second insulating film having a higher dielectric constant than the first insulating film is formed between adjacent transfer electrodes.

Here, preferred embodiments of the present invention include the following. (1) A portion where the thickness of the first insulating film is reduced and a second insulating film having a high dielectric constant on the portion where the thickness is reduced are formed by self-alignment with the side wall of the transfer electrode. (2) The substrate is silicon, the first insulating film is a silicon oxide film formed by oxidation of the substrate, and the second insulating film is a silicon nitride film or a silicon oxide film formed by deposition.

(Function) According to the present invention, the thickness of the first insulating film is reduced between adjacent transfer electrodes, and the second insulating film having a higher dielectric constant than the first insulating film is formed on the first insulating film. By arranging, the charge transfer efficiency and the charge transfer speed can be improved. That is, in a substance having a high dielectric constant, the change in potential is small because the shielding effect by the polarization charge is large. Therefore, in order to effectively transmit the voltage of the transfer electrode to the channel, a substance having a higher dielectric constant may be disposed between the transfer electrode and the channel. If the thickness of the gate insulating film is reduced between the transfer electrodes and a material having a higher dielectric constant than the gate insulating film is disposed thereon, the potential difference between the transfer electrodes in the channel portion between the transfer electrodes and below the transfer electrodes is reduced. Produces the following effects.
Therefore, the occurrence of the charge transfer barrier between the transfer electrodes in the channel portion and the occurrence of the charge accumulation are reduced or eliminated. Thereby, charge transfer efficiency and charge transfer speed are improved.

[0027]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, an embodiment of the present invention with reference to the drawings.

[0028] (Reference Example 1) FIG. 1 is a sectional view showing a schematic configuration of a CCD transfer direction according to a first exemplary embodiment of the present invention. This CCD forms a p-type impurity diffusion layer 12 on an n-type silicon substrate 11,
An n-type impurity diffusion layer 13 constituting a buried channel type CCD is formed thereon, and a silicon oxide film 14 and a silicon nitride film 15 constituting a gate insulating film are further interposed.
The CCD transfer electrode 16 is formed.

In this embodiment , the silicon nitride film 15
Are removed in the gap between the transfer electrodes. Thereby, by performing sintering, the silicon nitride film 1 is formed.
Hydrogen atoms are coupled to the dangling bonds near the surface of the silicon substrate 11, that is, in the n-type impurity diffusion layer 13, through a portion from which 5 has been removed, thereby reducing dark current which is one of the causes of CCD noise. Can be reduced.

FIG. 2 is a sectional view showing a manufacturing process of the CCD of the present embodiment . First, as shown in FIG. 2A, a CCD in which a transfer electrode is made of a single-layer polysilicon is formed by using a fine processing technique. This state is the same as the conventional CCD.

Then, as shown in FIG. 2B, using the polysilicon transfer electrode 16 as a mask, the silicon nitride film 15 is etched in the gap between the transfer electrodes by using, for example, reactive ion etching. At this time,
When an ONO film in which SiO ₂ , SiN, and SiO ₂ are sequentially stacked is used as the gate insulating film, the top silicon oxide film may be etched, and then the silicon nitride film may be etched.

Here, in the prior art, as shown in FIG. 2A, the silicon nitride film
It exists all over the CD. Silicon nitride film 1
Since No. 5 does not allow passage of hydrogen atoms, even if sintering is performed, dangling bonds of silicon atoms present in the n-type impurity diffusion layer 13 cannot be combined with hydrogen to reduce dark current.

On the other hand, as in the present embodiment , the transfer electrode 1
If the silicon nitride film 15 has been removed in the gap between the silicon nitride films 6, the dangling bonds existing in the n-type impurity diffusion layer 13 are bonded to hydrogen by sintering, as shown in FIG. The dark current, which is one of the causes of CCD noise, can be reduced.

In this embodiment , the gate insulating film is made of the silicon oxide film 14 and the silicon nitride film 1 formed thereon.
5, but is not limited thereto, and may be an ONO film. O
The NO film is an insulating film composed of a first silicon oxide film, a silicon nitride film formed thereon, and a second silicon oxide film formed thereon.

In this case, at least the silicon nitride film in the gate insulating film is removed. That is, the essence of the present invention is to remove the silicon nitride film contained in the gate insulating film in the gap between the transfer electrodes.

In this embodiment , the n-type substrate 11
A p-type impurity diffusion layer 12 is provided thereon, and an n-type impurity diffusion layer 13 is provided thereon to form a CCD. However, an n-type impurity diffusion layer 1 for forming a buried channel layer on a p-type substrate is provided.
3 may be provided to form a CCD.

The present invention is particularly effective for the single-layer transfer electrode type CCD described in the above-mentioned reference example . This is because, as described above with reference to FIG. 2, in the single-layer transfer electrode type CCD, it is easy to remove the silicon nitride film by self-alignment with respect to the transfer electrode. However, it is currently the most frequently used. It is needless to say that the present invention is also effective for a two-layer overlap type CCD.

[0038] (Reference Example 2) FIG. 3 is a sectional view showing a second two-layer overlap type CCD manufacturing process according to Embodiment of the present invention. FIG.
The same parts as those described above are denoted by the same reference numerals, and detailed description thereof will be omitted.

First, as shown in FIG. 3A, a CCD having a two-layer overlap structure is formed by the same technique as the conventional technique. Here, 16 is a first layer polysilicon, 17 is an interlayer oxide film, and 18 is a second layer polysilicon.

Next, as shown in FIG. 3B, a portion of the second polysilicon layer 18 formed on the first polysilicon layer 16 is removed by, for example, polishing. Next, as shown in FIG. 3C, the second-layer polysilicon 18 is etched by using, for example, reactive ion etching or the like so that the polysilicon does not exist on the gap between the transfer electrodes.

Next, as shown in FIG. 4D, the interlayer oxide film 17 is removed by using a method such as etching with an ammonium fluoride solution. Further, as shown in FIG. 4E, using the first polysilicon layer 16 and the second polysilicon layer 18 as masks, for example, by means of reactive ion etching or the like, the silicon nitride film 15 is formed in the gap between the transfer electrodes. Is etched.

[0042] (Reference Example 3) Figure 5, FIT type CCD according to a third exemplary embodiment of the present invention
FIG. 2 is a plan view illustrating a schematic configuration of an area sensor. The FIT type CCD area sensor includes an image section, a storage section for temporarily storing signals, a horizontal CCD 24, and an output amplifier 25.

The image section comprises a photodiode 21 for performing photoelectric conversion accumulation and a vertical CCD 22.
The storage unit includes a vertical CCD 23. Here, the gate insulating film of the CCD includes a silicon nitride film, and in the vertical CCD 23 of the storage section, the silicon nitride film is removed in the gap between the transfer electrodes.

In such a configuration, if sintering is performed, hydrogen can be bonded to dangling bonds of silicon atoms near the substrate surface. Therefore, it is possible to realize a FIT type CCD area sensor that reduces dark current generated in the storage unit and has no noise.

The dark current can be further reduced by removing the silicon nitride film in the gate insulating film in the gap between the transfer electrodes in the vertical CCD 22 in the image area. Usually, in the image portion, the photodiode 2
In 1, the silicon nitride film is removed to reduce the dark current. However, if the silicon nitride film is removed in the vertical CCD 22, the dark current can be reduced more efficiently.

Further, when the present invention is applied to a vertical CCD of an IT-type CCD area sensor, a step of removing a silicon nitride film from a photodiode is not required, so that an image defect due to the photodiode is reduced. is there. Generally, image defects increase when the silicon nitride film is removed by performing etching such as chemical dry etching using a photodiode.

Reference Example 4 The present invention is particularly effective when the gap between the transfer electrodes of a CCD having a single-layer gate structure is doped with an impurity of the opposite conductivity type to the buried channel layer. The reason is that the gate insulating film in the transfer electrode gap at the time of doping is only a silicon oxide film, and the variation in manufacturing is reduced.

It should be noted that the transfer efficiency of the CCD can be improved by doping the gap between the transfer electrodes of the single-layer CCD with an impurity of the opposite conductivity type to that of the buried channel layer.
It is known from JP 3-194358.

[0049] Figure 6, according to the fourth reference example of the present invention C
FIG. 2 is a cross-sectional view showing a schematic configuration of a transfer direction of a CD, which is a CCD in which a gap between transfer electrodes is doped with an impurity of a conductivity type opposite to a buried channel layer.

Here, the p-type impurity diffusion layer 19
Silicon nitride film 15 according to the manufacturing method described with reference to FIG.
Is removed, B ions are implanted into the gap between the transfer electrodes by self-alignment, for example, using the transfer electrode 16 made of the silicon nitride film 15 and the first-layer polysilicon as a mask.

In each of the above embodiments , polysilicon is used as the transfer electrode, but metal silicide or metal may be used. Specifically, Mo, W, Ti, or silicide thereof may be used. When a metal silicide or metal is used for the transfer electrode, the dark current generally tends to increase as compared with the case where polysilicon is used for the transfer electrode due to the stress. For this reason, if the silicon nitride film is removed in the gap between the transfer electrodes and the hydrogen atoms can be bonded to the dangling bonds by the sinter, the effect cannot be expected.

( Embodiment 1 ) FIG. 7 is a diagram showing a schematic configuration and a potential of a CCD according to a first embodiment of the present invention.

The uppermost diagram in FIG. 7 shows the structure of the single-layer CCD in this embodiment . Silicon oxide film (first insulating film) by oxidation on p-type silicon substrate 1
2 is formed thereon, and a gate electrode (transfer electrode) 3-1 is formed thereon.
To 3-4 are formed. An insulating film (second insulating film) 4 is formed between and on adjacent gate electrodes.

Here, in this embodiment , the thickness of the oxide film 2 is smaller between the adjacent gate electrodes, and the insulating film 4 is formed between the adjacent gate electrodes so that the substrate 1 has a smaller thickness than the gate electrode.
Approaching. The insulating film 4 has a dielectric constant higher than that of the oxide film 2.

The dielectric constant of the insulator is shown below (Table 1). As the insulating film 4 having a high dielectric constant, for example, a silicon nitride film or a silicon oxide film formed by deposition can be used.

[0056]

[Table 1]

FIGS. 8A to 8D are diagrams for explaining voltage changes during charge transfer of the single-layer CCD. FIGS. 7A to 7D show potentials and transfer charges on the substrate surface corresponding to times a to d in FIG. FIG. Here, the potential is shown with the downward direction being positive with respect to the potential of the p substrate 1.

FIG. 7A shows the state of the gate electrode 3 at time a.
In this state, there is a transfer charge below −2, a higher voltage (written as “H”) than the substrate is applied to the gate electrode 3-2, and the gate electrodes 3-1, 3-3, 3- 4, the same voltage as that of the substrate (written as "L") is applied. The distribution of the surface potential and the transfer charge is shown in FIG.
Same as (a).

Next, at time b when the voltage of the gate 3-3 is set to "H", a part of the transfer charge flows into a part of the gate 3-3 below the gate 3-3. Here, we had made the potential barrier between the conventional example and FIG. 10 (b) in the gate 3-2 3-3, in the present embodiment FIG. 7 (b)
Since the potential of the portion between the gates is close to the potential of the gate electrode as shown in (1), this potential barrier is reduced or eliminated.

Thereafter, as shown in FIG.
At time c when -2 is changed to "H", the remaining charge under the gate 3-2 flows under the gate 3-3. However, since the potential barrier is smaller than that in FIG. Movement occurs smoothly. Therefore, the charge transfer speed is improved, or the charge transfer efficiency at the same transfer speed is improved.

Thereafter, as shown in FIG. 7 (d), at time d when the gate 3-2 becomes "L", the electric charge is applied to the gate 3-2.
3 and the charge transfer for one gate from the state of FIG. This series of operations is repeated to transfer charges.

As described above, according to the present embodiment , the oxide film 2 as the gate insulating film is formed thin between the gates, and a material having a higher dielectric constant than the oxide film 2 is used as the insulating film 4 embedded between the gates. Since it is used, the voltage of the gate can be effectively transmitted to the channel below the gate. For this reason, the occurrence of charge transfer barriers between the transfer electrodes and the accumulation of charges in the channel portion are reduced or eliminated, whereby the charge transfer efficiency and the charge transfer speed can be improved.

( Embodiment 2 ) FIG. 9 is a diagram showing a schematic configuration and a potential of a CCD according to a second embodiment of the present invention.

FIG. 9 shows the structure of the single-layer CCD in this embodiment . An n-type diffusion layer 5 is formed on a p-type silicon substrate 1, and a first
As in the embodiment, the gate 3 is formed via the silicon oxide film 2.
-1 to 3-4 and an insulating film 4 are formed.

Here, also in this embodiment , the thickness of the oxide film 2 is thin between the gate electrodes, and the insulating film 4 is closer to the substrate 1 than the gate electrode between the adjacent gate electrodes. The insulating film 4 has a dielectric constant higher than that of the oxide film 2.

A voltage "H" is applied to the n-type diffusion layer 5, and it is not possible to transfer charges by changing the gate voltage between this "H" and a certain voltage "L" lower than this. 11
This is the same as the conventional example shown in FIG. FIGS. 9A to 9D show the potential of the channel portion corresponding to times a to d and the distribution of electrons as transfer charges when the gate voltage is changed according to FIG.

Time a is a state in which a charge exists under the gate 3-2. The gate 3-2 is at "H",
Gates 3-1, 3-3, and 3-4 cut the channel as "L". Here, FIG.
In FIG. 9A, the potential is depressed in the portion between the gates, but FIG. 9A to which the present invention is applied.
In this case, since the potential of the portion between the gates in the channel portion is close to the gate potential, this depression is reduced,
Or gone.

Next, as shown in FIG.
At time b when -3 is set to "H", a part of the charges
-3, which is in the state of FIG.
Same as (b).

Next, when the gate 3-2 is set to "L", the remaining charge under the gate 3-2 flows under the gate 3-3. Here, in the conventional example of FIG.
There is a problem that a potential dent is formed between -1 and 3-2, and charges are left behind. In FIG. 9C to which the present invention is applied, the depression of the potential is reduced or eliminated, that is, the remaining charge is reduced or eliminated. Therefore, the charge transfer efficiency is improved as compared with the conventional single-layer CCD.

Thereafter, as shown in FIG.
At time d when 2 becomes "L", the charge exists under the gate 3-3, and the charge transfer for one gate from the state of (a) ends. This series of operations is repeated to transfer charges.

The present invention is not limited to the above embodiments , but can be applied to other single-layer CCDs as long as the gate electrodes are arranged with a certain interval. In other words, how to take the “H” and “L” values of the gate voltage and the CCD
The present invention is effective irrespective of the driving method, the material of the substrate and the conductivity type. Further, the materials of the first and second insulating films can be appropriately changed according to the specifications. In addition, various modifications can be made without departing from the scope of the present invention.

[0072]

As described above in detail , according to the present invention, the portion between the gate electrodes in the channel portion can be easily controlled by the gate voltage with respect to the single-layer CCD, and the charge transfer can be improved. It is possible to reduce a potential barrier or a potential distortion which causes accumulation of charges, thereby improving a charge transfer speed and a charge transfer efficiency.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a schematic configuration of a CCD in a transfer direction according to a first reference example .

FIG. 2 is a sectional view showing a manufacturing process of the CCD according to the first reference example .

FIG. 3 is a sectional view showing a first half of a manufacturing process of a CCD according to a second reference example .

FIG. 4 is a sectional view showing the latter half of the manufacturing process of the CCD according to the second reference example .

FIG. 5 is a plan view showing a schematic configuration of an FIT type CCD area sensor according to a third reference example .

FIG. 6 is a sectional view showing a schematic configuration of a CCD according to a fourth reference example .

FIG. 7 is a view showing a schematic configuration and a potential of the CCD according to the first embodiment .

FIG. 8 is a diagram showing timing of a gate voltage for operating a single-layer CCD.

9 is a diagram showing a schematic configuration and the potential of the CCD according to the second embodiment.

FIG. 10 is a diagram showing an example of the structure of a first method of a conventional single-layer CCD and the state of operation.

FIG. 11 is a diagram showing an example of the structure of a second method of a conventional single-layer CCD and the operation thereof.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 p-type silicon substrate (semiconductor substrate) 2 silicon oxide film (first insulating film) 3 gate electrode (transfer electrode) 4 insulating film (second insulating film) 5 n-type diffusion layer 11 n Type silicon substrate (semiconductor substrate) 12 p-type impurity diffusion layer 13 n-type impurity diffusion layer 14 silicon oxide film 15 silicon nitride film 16 first-layer polysilicon (transfer electrode) 17 interlayer oxide film 18 2-layer polysilicon (transfer electrode) 19 ... p-type impurity diffusion layer 21 ... photodiode 22 ... vertical CCD of image part 23 ... vertical CCD of storage part 24 ... horizontal CCD 25 ... output amplifier

────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Keiji Mabuchi 1 Ritsumeikan Center, Komukai Toshiba-cho, Saisaki-ku, Kawasaki City, Kanagawa Prefecture (56) References JP-A-6-77457 (JP, A) JP-A-2-271543 (JP, A) JP-A-3-22437 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/339 H01L 27/14-27/148 H01L 29/762-29/768

Claims (3)

(57) [Claims] A charge-coupled device in which a plurality of transfer electrodes are arranged close to each other on a semiconductor substrate via a first insulating film, and the transfer electrodes have a single-layer gate structure. A charge-coupled device, wherein an insulating film is formed thinner than under a transfer electrode, and a second insulating film having a higher dielectric constant than the first insulating film is formed between adjacent transfer electrodes. 2. The method according to claim 1, wherein the portion of the first insulating film whose thickness is to be reduced and the second insulating film having a high dielectric constant thereon are formed by self-alignment with the side wall of the transfer electrode. Item 2. The charge-coupled device according to Item 1 . 3. The substrate is silicon, the first insulating film is a silicon oxide film formed by oxidizing the substrate, and the second insulating film is a silicon nitride film or a silicon oxide film formed by deposition. Claims characterized by the following
2. The charge-coupled device according to 1 .