JPH04243150A - Polysilicon fuse - Google Patents
Polysilicon fuseInfo
- Publication number
- JPH04243150A JPH04243150A JP418991A JP418991A JPH04243150A JP H04243150 A JPH04243150 A JP H04243150A JP 418991 A JP418991 A JP 418991A JP 418991 A JP418991 A JP 418991A JP H04243150 A JPH04243150 A JP H04243150A
- Authority
- JP
- Japan
- Prior art keywords
- fuse
- polysilicon
- silicon substrate
- silicon
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 25
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 25
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 24
- 229910052710 silicon Inorganic materials 0.000 abstract description 24
- 239000010703 silicon Substances 0.000 abstract description 24
- 239000000758 substrate Substances 0.000 abstract description 18
- 230000003647 oxidation Effects 0.000 abstract description 7
- 238000007254 oxidation reaction Methods 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
Abstract
Description
【0001】0001
【産業上の利用分野】本発明はポリシリコンヒューズに
関し、特に、半導体装置で用いるポリシリコンヒューズ
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to polysilicon fuses, and more particularly to polysilicon fuses used in semiconductor devices.
【0002】0002
【従来の技術】従来のポリシリコンを用いたヒューズ回
路は、図3に示すように電気パルスを印加することによ
り切断されるポリシリコンのヒューズ部1と、外部回路
と接続する部分となる、ヒューズ部1よりも広いポリシ
リコンのパッド部2とをシリコン基板4上に厚さ100
オングストロームの絶縁膜6を介して形成している。こ
の半導体装置で使用するポリシリコンヒューズは、ヒュ
ーズ部1に電気パルスを印加することにより、ヒューズ
部1のポリシリコンを焼失させて切断している。2. Description of the Related Art A conventional fuse circuit using polysilicon, as shown in FIG. A polysilicon pad part 2, which is wider than part 1, is placed on a silicon substrate 4 to a thickness of 100 mm.
It is formed with an angstrom insulating film 6 interposed therebetween. The polysilicon fuse used in this semiconductor device is cut by applying an electric pulse to the fuse part 1 to burn out the polysilicon in the fuse part 1.
【0003】0003
【発明が解決しようとする課題】この従来のポリシリコ
ンヒューズ回路の構造では、パッド部2とヒューズ部1
とをシリコン基板4上の数100オングストローム程度
の絶縁膜6上に形成しているので、ヒューズ回路とシリ
コン基板間に寄生容量が生じる。この容量の為にヒュー
ズ自身が積分回路のようになり、ヒューズに印加する電
気パルスの波形をなまらせヒューズの切断を困難にする
という問題点があった。[Problems to be Solved by the Invention] In the structure of this conventional polysilicon fuse circuit, the pad portion 2 and the fuse portion 1
are formed on the insulating film 6 of about several hundred angstroms on the silicon substrate 4, so a parasitic capacitance occurs between the fuse circuit and the silicon substrate. Due to this capacitance, the fuse itself becomes like an integrating circuit, which causes the waveform of the electric pulse applied to the fuse to become dull, making it difficult to blow the fuse.
【0004】0004
【課題を解決するための手段】本発明によれば、電気パ
ルスを印加することにより切断されるポリシリコンのヒ
ューズ部と、外部回路と接続する部分となる、前記ヒュ
ーズ部よりも広いポリシリコンのパッド部とを半導体基
板上に絶縁膜を介して有し、このヒューズ部とパッド部
とをシリコンの選択酸化等で形成さた厚いシリコン酸化
膜を含むn層の絶縁層(nは1以上の整数)上に形成し
たポリシリコンヒューズを得る。[Means for Solving the Problems] According to the present invention, there is provided a polysilicon fuse section that is cut by applying an electric pulse, and a polysilicon fuse section that is wider than the fuse section and that becomes a section connected to an external circuit. The fuse part and the pad part are formed on a semiconductor substrate via an insulating film, and the fuse part and the pad part are formed by an n-layer insulating layer (n is 1 or more) including a thick silicon oxide film formed by selective oxidation of silicon or the like. obtain a polysilicon fuse formed on a polysilicon fuse (an integer number).
【0005】この絶縁層の厚さは、シリコンの選択酸化
で形成された厚い酸化膜以外の薄い酸化膜の厚さの10
倍以上すなわち数1000オングストローム以上とする
。この為、ヒューズ部,パッド部とシリコン基板間の容
量は、n層の絶縁層上に、ヒューズ部,パッド部を備え
た場合、薄い酸化膜上に備えた場合に比して、1/10
以下になる。この為、ヒューズに印加する電気パルスの
波形のなまりは小さくなり、ヒューズの切断を容易にす
る。The thickness of this insulating layer is 10 times the thickness of the thin oxide film other than the thick oxide film formed by selective oxidation of silicon.
It is set to be more than twice as large, that is, several thousand angstroms or more. Therefore, the capacitance between the fuse section, pad section, and silicon substrate is 1/10 when the fuse section and pad section are provided on the n-layer insulating layer, compared to when they are provided on a thin oxide film.
It becomes below. Therefore, the waveform of the electric pulse applied to the fuse becomes less rounded, making it easier to blow the fuse.
【0006】[0006]
【実施例】次に本発明について図面を参照して説明する
。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.
【0007】図1は本発明の一実施例である。ポリシリ
コンのヒューズ部1の両端に、このヒューズ部1よりも
広いパッド部2を有し、ヒューズ部1とパッド部2とは
シリコン基板4上にシリコンの選択酸化により形成され
た厚いシリコン酸化膜3を介して形成されている。この
厚いシリコン酸化膜3により、ヒューズ部1と、パッド
部2とシリコン基板4との間の距離をとり、寄生容量を
小さくしている。FIG. 1 shows an embodiment of the present invention. A polysilicon fuse part 1 has a pad part 2 wider than the fuse part 1 at both ends, and the fuse part 1 and the pad part 2 are thick silicon oxide films formed on a silicon substrate 4 by selective oxidation of silicon. 3. This thick silicon oxide film 3 provides a distance between the fuse section 1, the pad section 2, and the silicon substrate 4, thereby reducing parasitic capacitance.
【0008】図2は、本発明の他の実施例の断面図であ
る。本実施例では、ヒューズ部1,パッド部2と、シリ
コン基板4の間に、シリコンの選択酸化により形成され
た厚いシリコン基板膜3とその上に、シリコン窒化膜5
を有している。ここでは、厚いシリコン酸化膜3の上に
、シリコン窒化膜5を有している為、パッド部2とシリ
コン基板4との間の距離は図1の一実施例よりも大きく
とれる。FIG. 2 is a cross-sectional view of another embodiment of the invention. In this embodiment, a thick silicon substrate film 3 formed by selective oxidation of silicon is formed between a fuse part 1, a pad part 2, and a silicon substrate 4, and a silicon nitride film 5 is formed thereon.
have. Here, since the silicon nitride film 5 is provided on the thick silicon oxide film 3, the distance between the pad portion 2 and the silicon substrate 4 can be larger than that in the embodiment shown in FIG.
【0009】[0009]
【発明の効果】以上説明したように、本発明は、ポリシ
リコンのヒューズ部,ポリシリコンのパッド部とシリコ
ン基板の間にシリコンの選択酸化により形成された厚い
シリコン酸化膜を含むn層の絶縁層を有している。シリ
コンの選択酸化により形成された厚いシリコン酸化膜の
厚さは、それ以外の薄い酸化膜の厚さの10倍以上ある
。よって、ヒューズ部,パッド部をn層の絶縁層上に形
成した場合のポリシリコンヒューズとシリコン基板間の
容量は、薄いシリコン酸化膜上に形成した場合の容量の
1/10以下になる。この為、ヒューズに印加する電気
パルスの波形のなまりは小さくなりヒューズの切断を容
易にするという効果を有する。As described above, the present invention provides an n-layer insulating film including a thick silicon oxide film formed by selective oxidation of silicon between a polysilicon fuse portion, a polysilicon pad portion, and a silicon substrate. It has layers. The thickness of the thick silicon oxide film formed by selective oxidation of silicon is ten times or more the thickness of other thin oxide films. Therefore, when the fuse section and the pad section are formed on an n-layer insulating layer, the capacitance between the polysilicon fuse and the silicon substrate is 1/10 or less of the capacitance when formed on a thin silicon oxide film. Therefore, the waveform of the electric pulse applied to the fuse is less rounded, which has the effect of making it easier to blow the fuse.
【図1】本発明の一実施例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of the present invention.
【図2】本発明の他の実施例を示す断面図である。FIG. 2 is a sectional view showing another embodiment of the present invention.
【図3】従来例を示す断面図である。FIG. 3 is a sectional view showing a conventional example.
1 ポリシリコンのヒューズ部 2 ポリシリコンのパッド部 3 厚いシリコン酸化膜 4 シリコン基板 5 シリコン窒化膜 6 絶縁層 1 Polysilicon fuse part 2 Polysilicon pad part 3 Thick silicon oxide film 4 Silicon substrate 5 Silicon nitride film 6 Insulating layer
Claims (1)
されるポリシリコンのヒューズ部と、前記ヒューズ部の
両端に外部回路と接続する部分となる、前記ヒューズ部
よりも広いポリシリコンのパッド部とを備えるポリシリ
コンヒューズにおいて、前記ヒューズ部と、前記パッド
部とを厚いシリコン酸化膜を含むn層の絶縁層(nは1
以上の整数)上に備えることを特徴とするポリシリコン
ヒューズ。1. A polysilicon fuse section that is cut by applying an electric pulse, and a polysilicon pad section that is wider than the fuse section and is connected to an external circuit at both ends of the fuse section. In the polysilicon fuse, the fuse part and the pad part are formed by an n-layer insulating layer (n is 1) including a thick silicon oxide film.
(an integer greater than or equal to)).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP418991A JPH04243150A (en) | 1991-01-18 | 1991-01-18 | Polysilicon fuse |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP418991A JPH04243150A (en) | 1991-01-18 | 1991-01-18 | Polysilicon fuse |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04243150A true JPH04243150A (en) | 1992-08-31 |
Family
ID=11577759
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP418991A Pending JPH04243150A (en) | 1991-01-18 | 1991-01-18 | Polysilicon fuse |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04243150A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102915961A (en) * | 2012-11-12 | 2013-02-06 | 上海华力微电子有限公司 | Manufacturing method of electronic programmable fuse device |
CN104253107A (en) * | 2013-06-28 | 2014-12-31 | 台湾积体电路制造股份有限公司 | Semiconductor device with self-protecting fuse and method of fabricating the same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5775442A (en) * | 1980-10-29 | 1982-05-12 | Toshiba Corp | Semiconductor device |
-
1991
- 1991-01-18 JP JP418991A patent/JPH04243150A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5775442A (en) * | 1980-10-29 | 1982-05-12 | Toshiba Corp | Semiconductor device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102915961A (en) * | 2012-11-12 | 2013-02-06 | 上海华力微电子有限公司 | Manufacturing method of electronic programmable fuse device |
CN104253107A (en) * | 2013-06-28 | 2014-12-31 | 台湾积体电路制造股份有限公司 | Semiconductor device with self-protecting fuse and method of fabricating the same |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19970805 |