JPH04223372A - Manufacture of photosensor - Google Patents

Manufacture of photosensor

Info

Publication number
JPH04223372A
JPH04223372A JP2413754A JP41375490A JPH04223372A JP H04223372 A JPH04223372 A JP H04223372A JP 2413754 A JP2413754 A JP 2413754A JP 41375490 A JP41375490 A JP 41375490A JP H04223372 A JPH04223372 A JP H04223372A
Authority
JP
Japan
Prior art keywords
film
electrode
mask
opening
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2413754A
Other languages
Japanese (ja)
Inventor
Yasuki Kudo
工藤 泰樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2413754A priority Critical patent/JPH04223372A/en
Publication of JPH04223372A publication Critical patent/JPH04223372A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Facsimile Heads (AREA)

Abstract

PURPOSE:To enable a photosensitive semiconductor layer whose ends are gently sloped to be formed without dry etching carried out under specific conditions. CONSTITUTION:(a): a chrome electrode 2 is formed on a glass substrate 1. (b): silicon is deposited using a mask provided with a hole whose upper opening is larger than its lower opening to form an a-Si film 3 of required shape. (c): an ITO electrode 4 is formed. If a mask shaped as shown in a figure is used when Si is deposited through a glow discharge decomposition method of silane, the ends of the a-Si film are gently sloped as Si is prevented from flying from an oblique direction. Therefore, even if the ITO electrode 4 is formed thin riding partially on the a-Si film 3, it can be protected against disconnection caused by a step.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明はファクシミリ、OCR、
イメージスキャナなどの読み取り部として用いられる長
尺の光センサの製造方法に関する。
[Industrial Application Field] The present invention is applicable to facsimile, OCR,
The present invention relates to a method of manufacturing a long optical sensor used as a reading section of an image scanner or the like.

【0002】0002

【従来の技術】従来の光センサの製造方法について図3
を参照して説明する。ガラス基板1上にクロム膜を0.
1μmの膜厚に被着し、これをパターニングして分割さ
れた個別電極となるクロム電極2を形成する[図3の(
a)]。
[Prior Art] Figure 3 shows a conventional optical sensor manufacturing method.
Explain with reference to. A chromium film is deposited on the glass substrate 1.
The chromium electrode 2 is deposited to a thickness of 1 μm and patterned to form divided individual electrodes [as shown in FIG.
a)].

【0003】シランを用いグロー放電分解法により全面
にa−Si膜3を形成する。このa−Si膜3の膜厚は
、この膜で光を十分に吸収できるように1〜2μmにな
される[図3の(b)]。
An a-Si film 3 is formed on the entire surface by glow discharge decomposition using silane. The thickness of this a-Si film 3 is set to 1 to 2 μm so that this film can sufficiently absorb light [FIG. 3(b)].

【0004】フォトリソグラフィ工程により、a−Si
膜3上に所定のパターンのフォトレジスト膜(図示なし
)を形成し、ドライエッチング法によりa−Si膜3を
パターニングする。この場合に、エッチング条件を調整
してa−Si膜のエッチング段差がなだらかになるよう
にする[図3の(c)]。
[0004] Through the photolithography process, a-Si
A photoresist film (not shown) having a predetermined pattern is formed on the film 3, and the a-Si film 3 is patterned by dry etching. In this case, the etching conditions are adjusted so that the etching step of the a-Si film becomes gentle [FIG. 3(c)].

【0005】次に、ITO(インジウム・錫・酸化物)
膜を全面に被着し、これをフォトエッチング法によりパ
ターニングしてITO電極4を形成する。ITO電極の
膜厚は光の透過率を高く維持するために0.1μm以下
にする[図3の(d)]。先の図3(c)の工程でa−
Si膜のエッチング段差をなだらかにしたのは、次に形
成されるITO膜の膜厚が薄いので、a−Si膜の段差
がシャープであるとここでITO電極に段切れが発生す
るからである。
Next, ITO (indium tin oxide)
A film is deposited on the entire surface and patterned by photo-etching to form an ITO electrode 4. The thickness of the ITO electrode is set to 0.1 μm or less in order to maintain high light transmittance [FIG. 3(d)]. In the step of Figure 3(c) above, a-
The reason why the etching step of the Si film is made gentle is because the thickness of the ITO film to be formed next is thin, so if the step of the a-Si film is sharp, a step break will occur in the ITO electrode here. .

【0006】[0006]

【発明が解決しようとする課題】上述した従来の製造方
法ではa−Si膜をパターニングするのにフォトリソグ
ラフィ工程とドライエッチング法を用いていたので、■
工程が複雑になる、■高価なドライエッチング用設備を
用いなければならない、■スループットが低い等の欠点
があった。
[Problems to be Solved by the Invention] In the conventional manufacturing method described above, a photolithography process and a dry etching method were used to pattern the a-Si film.
The disadvantages include that the process is complicated, (1) expensive dry etching equipment must be used, and (2) throughput is low.

【0007】また、a−Si膜のエッチング段差をなだ
らかに形成するために、ドライエッチングを特別な条件
の下で行わなければならないので、プロセスが煩雑にな
るという問題もあった。
[0007] Furthermore, in order to form the etching steps of the a-Si film smoothly, dry etching must be carried out under special conditions, resulting in a problem that the process becomes complicated.

【0008】[0008]

【課題を解決するための手段】本発明の光センサの製造
方法は、絶縁基板上に第1の電極を形成する工程と、該
電極上にマスクを用いて感光性半導体層を所定の形状に
堆積する工程と、該感光性半導体層上に第2の電極を形
成する工程と、を有するものであって、前記マスクは、
前記絶縁基板と対向する側で開口部の開口面積が狭く反
対側の面で開口面積が広くなる形状を有している。
[Means for Solving the Problems] The method for manufacturing an optical sensor of the present invention includes the steps of forming a first electrode on an insulating substrate, and forming a photosensitive semiconductor layer onto the electrode into a predetermined shape using a mask. and forming a second electrode on the photosensitive semiconductor layer, the mask comprising:
The opening has a shape in which the opening area is narrow on the side facing the insulating substrate, and the opening area is wide on the opposite side.

【0009】[0009]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。図1は本発明の一実施例の製造工程段階を
示す断面図である。
Embodiments Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view showing the manufacturing process steps of an embodiment of the present invention.

【0010】ガラス基板1上にクロムをスパッタにより
0.1μmの膜厚に堆積し、フォトエッチング法により
所定の形状にパターン化してクロム電極2を形成する[
図1の(a)]。
Chromium is deposited on the glass substrate 1 to a thickness of 0.1 μm by sputtering, and patterned into a predetermined shape by photoetching to form the chromium electrode 2.
Figure 1(a)].

【0011】その後、図1の(b)に示すように、メタ
ルマスク20を用いてシランのグロー放電分解法により
所定の形状のa−Si膜3を形成する。このメタルマス
ク20は平坦部22と凸起部23とを有し、平坦部22
のa−Si膜の形成箇所に対応した位置には所望のa−
Si膜の形状に開孔が形成されている。この開孔とこれ
に隣接する凸起部の側壁によってこのマスクの開口部2
1が構成されている。
Thereafter, as shown in FIG. 1B, an a-Si film 3 having a predetermined shape is formed by glow discharge decomposition of silane using a metal mask 20. This metal mask 20 has a flat part 22 and a convex part 23.
A desired a-Si film is formed at a position corresponding to the location where the a-Si film is formed.
Openings are formed in the shape of the Si film. The opening 2 of this mask is formed by this opening and the side wall of the convex portion adjacent thereto.
1 is configured.

【0012】この工程において、シランがプラズマ中で
分解されてSiが活性種となり、これがガラス基板上に
付着してa−Si膜が堆積されるが、本実施例で用いら
れるメタルマスクには、開口部21内に凸起部23が存
在するため、斜め方向からの活性種の基板への付着確率
が低下する。そして、その低下の度合いが開孔の中央に
比べて端部で大きくなるため、端部ほどa−Si膜の堆
積速度が低下する。したがって、凸起部の形状、高さお
よび開孔からの距離を適当に選ぶことにより、a−Si
膜の段差が所望のテーパー角を有するようにすることが
可能となる。
In this step, silane is decomposed in plasma and Si becomes active species, which adheres to the glass substrate to form an a-Si film. Since the convex portion 23 exists within the opening 21, the probability of adhesion of active species to the substrate from an oblique direction is reduced. Since the degree of the decrease is greater at the edges than at the center of the opening, the deposition rate of the a-Si film decreases closer to the edges. Therefore, by appropriately selecting the shape, height, and distance of the protrusion from the aperture, a-Si
It becomes possible to make the step of the membrane have a desired taper angle.

【0013】次に、ITOをスパッタにより0.1μm
堆積し、フォトエッチング法により所定の形状にパター
ン化し、ITO電極4を形成する[図1の(c)]。そ
の後クロム電極2、ITO電極4をそれぞれ信号処理回
路と接続することにより光センサが完成する。
Next, ITO was sputtered to a thickness of 0.1 μm.
It is deposited and patterned into a predetermined shape by photo-etching to form an ITO electrode 4 [FIG. 1(c)]. Thereafter, the chromium electrode 2 and the ITO electrode 4 are connected to a signal processing circuit to complete the optical sensor.

【0014】以上説明したように、本実施例の光センサ
の製造方法によれば、設備が高価でスループットの低い
ドライエッチング法を用いることなくなだらかな段差形
状を有するa−Si膜を形成することができる。
As explained above, according to the optical sensor manufacturing method of this embodiment, it is possible to form an a-Si film having a gently stepped shape without using dry etching which requires expensive equipment and has low throughput. I can do it.

【0015】図2は、本発明の他の実施例の一工程段階
を示す断面図である。この工程は1図(b)の工程に対
応している。本実施例は、一つのガラス基板から光セン
サを多面取りする場合の例である。本実施例ではa−S
i膜3の形成工程において、複数の開口部31を有する
メタルマスク30をガラス基板1上に配置する。このメ
タルマスク30も、先の実施例の場合と同様に平坦部3
2と凸起部33とを有しているが、本実施例では、開口
部31は凸起部にテーパをもって形成されている。即ち
、開口部31の開口面積はガラス基板1と対向する部分
で最も狭く、そしてガラス基板から離れるにしたがって
、次第に大きくなっている。このマスクでは、テーパ角
の大きさおよび凸部の高さを適当に選択することにより
、a−Si膜の段差に所望のテーパ角をつけることが可
能となる。
FIG. 2 is a cross-sectional view showing one process step of another embodiment of the invention. This process corresponds to the process shown in FIG. 1(b). This embodiment is an example in which multiple optical sensors are fabricated from one glass substrate. In this example, a-S
In the step of forming the i-film 3, a metal mask 30 having a plurality of openings 31 is placed on the glass substrate 1. This metal mask 30 also has flat portions 3 as in the previous embodiment.
In this embodiment, the opening 31 is formed with a taper on the protrusion. That is, the opening area of the opening 31 is narrowest at the portion facing the glass substrate 1, and gradually increases as the distance from the glass substrate increases. In this mask, by appropriately selecting the size of the taper angle and the height of the convex portion, it is possible to give a desired taper angle to the step of the a-Si film.

【0016】続いて、先の実施例と同様にITO電極を
形成し、光センサ毎に個々の基板に分割する。
Subsequently, ITO electrodes are formed in the same manner as in the previous embodiment, and the substrates are divided into individual substrates for each optical sensor.

【0017】[0017]

【発明の効果】以上説明したように、本発明の光センサ
の製造方法は、開口部の開口面積が上面と下面とで異な
っているマスクを用いて感光性半導体層を形成するもの
であるので、本発明によれば、複雑なフォトリソグラフ
ィ工程が不要となり、また高価なドライエッチング設備
を用いたり特別なエッチング条件を遵守したりする必要
がなくなり、高スループットで容易に光センサを製造す
ることができるようになる。
[Effects of the Invention] As explained above, in the method for manufacturing an optical sensor of the present invention, a photosensitive semiconductor layer is formed using a mask in which the opening area of the opening portion is different on the upper surface and the lower surface. According to the present invention, there is no need for a complicated photolithography process, no need to use expensive dry etching equipment, and no need to comply with special etching conditions, making it possible to easily manufacture optical sensors with high throughput. become able to.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例の製造工程段階を示す断面図
FIG. 1 is a cross-sectional view showing manufacturing process steps of an embodiment of the present invention.

【図2】本発明の他の実施例を説明するための工程途中
の断面図。
FIG. 2 is a cross-sectional view in the middle of a process for explaining another embodiment of the present invention.

【図3】従来例の製造工程段階を示す断面図。FIG. 3 is a cross-sectional view showing manufacturing process steps in a conventional example.

【符号の説明】[Explanation of symbols]

1  ガラス基板 2  クロム電極 3  a−Si膜 4  ITO電極 20、30  メタルマスク 21、31  開口部 22、32  平坦部 23、33  凸起部 1 Glass substrate 2 Chromium electrode 3 a-Si film 4 ITO electrode 20, 30 Metal mask 21, 31 Opening 22, 32 Flat part 23, 33 Convex part

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】  絶縁基板上に第1の電極を形成する工
程と、開口部の開口面積が厚さ方向で差のあるマスクを
開口面積の小さい方を前記絶縁基板側に向けて前記絶縁
基板上に配置し、半導体を堆積して前記第1の電極の一
方の端部を覆う所定の形状の感光性半導体層を前記絶縁
基板上に形成する工程と、一方の端部が前記感光性半導
体層の上に懸かる第2の電極を前記絶縁基板上に形成す
る工程と、を具備する光センサの製造方法。
1. A step of forming a first electrode on an insulating substrate; and a step of forming a first electrode on the insulating substrate using a mask having an opening area that is different in the thickness direction, with the smaller opening area facing the insulating substrate side. forming a photosensitive semiconductor layer having a predetermined shape on the insulating substrate and covering one end of the first electrode by depositing a semiconductor; forming a second electrode overlying the layer on the insulating substrate.
【請求項2】  前記マスクが、平坦部と凸起部とを有
しており、平坦部において所定の形状の開口が形成され
たものである請求項1記載の光センサの製造方法。
2. The method of manufacturing an optical sensor according to claim 1, wherein the mask has a flat portion and a convex portion, and an opening having a predetermined shape is formed in the flat portion.
【請求項3】  前記マスクの開口部は厚さ方向に次第
に開口面積が拡がる形状である請求項1記載の光センサ
の製造方法。
3. The method of manufacturing an optical sensor according to claim 1, wherein the opening of the mask has a shape in which the opening area gradually increases in the thickness direction.
JP2413754A 1990-12-25 1990-12-25 Manufacture of photosensor Pending JPH04223372A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2413754A JPH04223372A (en) 1990-12-25 1990-12-25 Manufacture of photosensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2413754A JPH04223372A (en) 1990-12-25 1990-12-25 Manufacture of photosensor

Publications (1)

Publication Number Publication Date
JPH04223372A true JPH04223372A (en) 1992-08-13

Family

ID=18522326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2413754A Pending JPH04223372A (en) 1990-12-25 1990-12-25 Manufacture of photosensor

Country Status (1)

Country Link
JP (1) JPH04223372A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06196547A (en) * 1992-09-11 1994-07-15 Matsushita Electric Ind Co Ltd Metal film deposition device and metal film deposition method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06196547A (en) * 1992-09-11 1994-07-15 Matsushita Electric Ind Co Ltd Metal film deposition device and metal film deposition method

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