JPH04184916A - Resist mask forming method and dry etching method - Google Patents

Abstract

PURPOSE:To improve verticality of etching, and increase the patterning precision of a minute thin film pattern, by forming a modified layer on a resist film, after the resist film is silylated. CONSTITUTION:After an Al thin film 3 is formed on an Si substrate 1 on which an insulating film 2 is formed, a positive resist film 4 is formed on the film 3; prebaking is performed; the substrate is moved in a tightly closed chamber; a silylated layer 5 is formed on the surface part of film 4 by vapor phase treatment. When exposure is performed via a light transmitting region 7 of a photo mask 6, the layer 5 in the irradiated region of UV rays 8 is extinguished by substitution for H2. When this substrate is inserted into a microwave downflow equipment, and the film 4 surface is treated by the downflow of N2 plasma, the layer 5 is turned into a modified layer 9 which has [Si-N] bonds and is highly resistant to ion shock. The film 3 is selectively eliminated by RIE treatment using O2 gas wherein the layer 9 is used as a mask, and a resist mask 10 having the layer 9 is completed. An Al wiring 103 is formed.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method for forming a resist mask and a dry etching method, particularly a method for forming a resist mask and a dry etching method that are effective for fine pattern formation technology. The present invention provides a method for forming a resist mask that increases the etching selectivity and improves the perpendicularity (anisotropy) of etching within the layer, and a dry etching method using the resist mask. For the purpose of improving patterning accuracy, the silylated resist film is subjected to silylation treatment before pattern formation or after the patterned resist film is formed, and the resist film subjected to the silylation treatment is exposed to a downflow of plasma, for example, nitrogen plasma. A modified layer such as [Si-N
A method for forming a resist mask including a step of forming a modified layer having Si-Nl bonds, and a method for forming a lower resist film using an upper resist mask in which a modified layer having Si--Nl bonds is formed on the surface. A method for forming a resist mask comprising a step of performing anisotropic dry etching to form a resist mask with a two-layer structure;
A step of selectively etching at least one type of thin film among a metal thin film, a semiconductor thin film, a metal silicide thin film, and an insulating thin film by an anisotropic dry etching means using a resist mask on which a modified layer having Nl bonds is formed. A dry etching method comprising:

[Industrial application field]

The present invention relates to a method for forming a resist mask and a dry etching method, and more particularly to a method for forming a resist mask and a dry etching method that are effective for fine pattern forming techniques.

In recent years, as semiconductor devices have become more highly integrated, the dry etching process used to form various thin film patterns of metals, semiconductors, metal silicides, insulators, etc. in the manufacturing process has become highly vertical (and difficult to match with the resist mask). There is a need for an etching method with a high selectivity.

[Conventional technology]

In the manufacturing process of semiconductor devices, a reactive ion etching (RIE) method is usually used as a dry etching means with high verticality (excellent anisotropy).

In the conventional manufacturing process of semiconductor devices, when forming thin film patterns of metals, semiconductors, metal silicides, insulators, etc., these thin films are subjected to RIE treatment using a novolak resist as a mask.

However, in the above conventional method, the perpendicularity of etching (
When the processing voltage is increased in order to further improve the etching anisotropy, the resist on the mask undergoes a large film thinning due to the ion sputtering effect, making it necessary to maintain a sufficient etching selectivity between the thin film to be etched and the resist. things become difficult.

For this reason, as patterns become increasingly finer and submicron patterns are formed, it is necessary to reduce the thickness of the resist mask due to mask formation accuracy. In the worst case, due to variations in etching, the resist mask may partially disappear during etching, and parts of the thin film that should originally remain as a pattern may be etched away, resulting in missing parts in the thin film pattern. .

Therefore, in the conventional RIE process, when the pattern is miniaturized, it is not possible to perform etching with improved perpendicularity (anisotropy) to a satisfactory degree, and pattern accuracy has to be sacrificed to some extent. Ta.

[Problem to be solved by the invention]

Therefore, the present invention provides a method for forming a resist mask and a method for forming the resist mask, which makes it possible to increase the etching perpendicularity (anisotropy) within the layer by increasing the etching selectivity between the resist mask and the thin film to be etched. The purpose of the present invention is to provide a dry etching method using the present invention, and to improve the patterning accuracy of fine thin film patterns.

[Means to solve the problem]

The above problem can be solved by exposing the silylated resist film to plasma such as nitrogen plasma, such as nitrogen plasma, on the surface of the resist film, before pattern formation or after performing silylation treatment on the patterned resist film. A method for forming a resist mask according to the present invention including a step of forming a modified layer having a modified layer such as [Si-Nl bonds, or an upper layer resist having a modified layer having Si-Nl bonds formed on the surface of the resist mask. A method for forming a resist mask according to the present invention, which includes a step of performing anisotropic dry etching of a lower resist film using a mask to form a resist mask with a two-layer structure; The dry etching method according to the present invention includes the step of selectively etching at least one type of thin film among a metal thin film, a semiconductor thin film, a metal silicide thin film, and an insulating thin film by an anisotropic dry etching means using a resist mask in which a layer is formed. The problem is solved by etching method.

[For production]

That is, in the present invention, when forming a resist mask, the resist film before or after pattern formation is treated with vapor of a silylating agent such as HMD S (hexamethyldisilazane) [(CHs)sSiJ] in a closed chamber. The trimethylsilyl group [-3i(CHs)s] is adsorbed on the surface of the resist film by gas phase treatment or immersion treatment of the HMDS in a liquid (including the paddle method). (Silylation Treatment) Next, the resist film on which the trimethylsilyl groups have been adsorbed is exposed to a downflow of plasma, for example, nitrogen [N2] plasma, and the nitrogen radicals [N''] contained in the downflow are adsorbed onto the resist surface. The methyl group [CH3I of trimethylsilyl is substituted to form a modified layer containing [Si--Nl bonds and having high resistance to ion bombardment] on the resist surface.

In addition, in addition to N2 plasma, oxygen [02
] Plasma can also be used, in which case [Si-
0] A modified layer containing bonds and having high ion bombardment resistance is formed.

As a result, a resist mask is formed which has high resistance to anisotropic dry etching such as RIE processing and has a large selectivity with respect to the thin film to be etched.

Therefore, since the resist mask on which the pattern is transferred from the photomask can be made sufficiently thin, a resist mask with high pattern accuracy can be formed, and a two-layer structure can be formed by anisotropic dry etching using this resist mask. It becomes possible to form resist masks and thin film patterns of metals, semiconductors, metal silicides, insulators, etc. with high precision.

〔Example〕

The present invention will be specifically explained below with reference to illustrated embodiments.

Figures 1(a) to 1) are process sectional views of an embodiment of the present invention;
FIGS. 2(a) to 2) are process sectional views of another embodiment of the present invention, and FIG. 3 is a schematic sectional view of a μ-wave downflow device.

Identical objects are designated by the same reference numerals throughout the plan.

FIG. 1(a) In the first embodiment, which includes a step of performing silylation treatment on a resist film before forming a reference pattern to form a resist mask, silicon (Si) with an insulating film 2 formed on its surface is used.
After forming an aluminum (AI) thin film 3 with a thickness of about 1 .mu.m on a substrate l by the usual lithobatter method on which a wiring pattern is to be formed, for example, a positive electrode with a thickness of about 1 .mu.m is formed on this AI thin film 3 by a spin code method. resist film 4,
For example, novolac naphthoquinone positive resist TSMR
-8000 (manufactured by Tokyo Ohka) and prebaked as usual.

Refer to FIG. 1(b) Next, the above substrate is transferred to a closed chamber equipped with a hot plate, and vapor phase treatment is performed using HMDS for about 15 minutes while heating it to about 150° C., so that trimethylsilyl groups are formed on the surface of the positive resist film 4. A silylated layer 5 is formed by adsorbing .

Here, the HMDS gas was introduced into the sealed container by vaporizing liquid HMDS in the sub-tank by bubbling with nitrogen (N2).

Note that this silylation treatment is performed on HMD heated to about 40°C.
A method of immersing the above substrate in S liquid for about 10 minutes, or 4
The same effect as in the embodiment can also be achieved by the paddle method in which the HMDS liquid is placed on a substrate heated to about 0°C.

Referring to FIG. 1(C), normal exposure is then performed through the light-transmitting area 7 of the photomask 6. In the region irradiated with the Uv light 8 through this exposure, the adsorbed trimethylsilyl group is removed by substitution with generated hydrogen (H2), and the silylated layer 5 disappears.

Referring to FIG. 1(d), this substrate is then inserted into a microwave (μ) wave downflow device, and the surface of the resist film 4 is treated by a downflow of N2 plasma. Through this treatment, the silylated layer 5 is transformed into a modified layer 9 having [Si--N] bonds and having high resistance to ion bombardment.

Note that FIG. 3 is a schematic side sectional view of an example of the μ-wave downflow apparatus used for the N2 downflow processing, in which 51 is a processing container, 52 is a vacuum exhaust port, 53 is a substrate stage, 54 is a heater, and 55 is a Metal mesh, 56 is a plasma generation chamber,
57 is a gas inlet, 58 is a μ wave transmission window, 59 is a waveguide,
Reference numeral 60 indicates plasma, and reference numeral 61 indicates a substrate to be processed.

The N2 downflow process using this device was performed at a N2 flow rate of 500 sec, a substrate temperature of 120°C, and a process time of 5 minutes.

Note that downflow of 02 plasma may be used to form the modified layer, and in that case, the flow rate is 0, flow rate: 500
sec, substrate temperature = 120° C., and processing time = about 5 minutes, a modified layer having [Si-0] bonds and having high ion bombardment resistance is formed. Downflow of gases other than those mentioned above, such as N and O compound gases, may also be used.

Refer to FIG. 1(e). Next, using the modified layer 9 as a mask, the positive resist film 3 is selectively removed by RIE treatment using oxygen (0,) gas. The resist mask IO having the shape is completed.

Refer to Figure 1) Next, use the above resist mask IO as a mask, for example,
A by performing RIE treatment with a mixed gas of silicon chloride (SiC1a), boron trichloride (BClx), and chlorine (Ctt).
The I thin film 3 was selectively etched away to form an Al wiring 103. The etching conditions at this time are pressure crab 0.05
Torr, high frequency power density: 3W/cm", 5i
C1n flow rate: 200 secm, BCIs flow rate:
20 sec.

Ctt flow rate: 20 sec □ In this RIE process, etching is performed at a high power density that is about twice that of normal RIE process, but the ion bombardment resistance of the modified layer 9 on the surface of the resist mask 10 is extremely strong. , sufficient etching selectivity between the resist mask IO and the AI thin film 3 is ensured, and no defects occur in the patterned Al wiring 103. Furthermore, since etching can be performed at high power density as described above, the Al wiring 103 with excellent anisotropy and substantially vertical sides is formed.

Next, an example will be described in which a two-layer resist mask is formed by performing silylation treatment on a patterned upper resist.

Refer to FIG. 2(a) For example, a spin cord is placed on a substrate to be processed in which the insulating film 2 on the St substrate l has different thicknesses and the upper surface of the AI thin film 3 to be patterned is formed with unevenness. By law,
For example, naphthoquinone-novolac resist 0FPR-
800 (manufactured by Tokyo Ohka) to a thickness of about 2 μm, and then baked at a high temperature of about 250° C. to thermally crosslink the resin constituting the lower resist film 11.

Referring to FIG. 2(b), a T film having a thickness of about 1 μm is then deposited on the lower resist film 11 whose surface has been flattened using a conventional method.
After forming an upper resist film made of SMR-8800 and pre-baking as usual, it is exposed to light through a photomask and developed to form a pattern shape corresponding to the shape of the wiring pattern on the lower resist film IT. An upper resist pattern 12 is formed.

Refer to FIG. 2(C) Next, the above substrate is heated to about 150° C. in the same manner as in the previous example, and subjected to a vapor phase treatment using HMDS for about 15 minutes to form a silylation in which trimethylsilyl groups are adsorbed on the surface of the upper resist pattern 12. Form layer 5. In this silylation process, since the lower resist film 11 is thermally crosslinked by the high temperature baking, the silylation layer 5 is not formed on its surface.

Refer to FIG. 2(d).Next, N2 downflow treatment similar to the previous example is performed, and only the surface portion of the silylated upper resist pattern 12 is coated with [Si--Nl bond having high resistance to ion bombardment]. A modified layer 9 is selectively formed.

Refer to FIG. 2(e) Next, using the upper resist pattern 12 having the modified layer 9 on the surface as a mask, RIE treatment is performed using 02 gas to selectively remove the lower resist film 11.
A two-layer resist mask 13 having substantially vertical side surfaces is completed, in which an upper resist pattern 12 having a modified layer 9 on its surface is laminated on a lower resist pattern IIP.

Refer to Figure 2) Then, using the two-layer resist mask 13 as a mask, RIE treatment is performed using a chlorine-based gas similar to that in the above embodiment, and the exposed AI thin film 3 is selectively removed to form an AI wiring 103. do.

The method of the present invention has been described above with respect to the embodiments for forming AI wiring.
Of course, it can also be applied to the formation of thin film patterns of metal silicide, insulators, etc.

The method of the present invention can also be applied to forming a low reflection film on a metal thin film such as AI.

In that case, for example, the following steps are performed.

That is, for example, a dye (Koyal light) is applied on an AI thin film.
After coating a polyvinylphenol resin containing 10 wt% of Nippon Kayaku) to a thickness of approximately 0.5 μm, the substrate with this AI thin film was placed on a hot plate in a sealed container, and heated to approximately 130°C. , H as in the previous example
A silylated layer is formed on the surface of the polyvinylphenol resin layer by vapor phase treatment using MDS gas, and then the silylated layer is converted to [Si-Nl A high refractive index layer with bonding is formed, thereby forming a low reflection film on the AI thin film.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to form a resist mask having a modified layer on its surface that has high resistance to ion bombardment and thus provides high etching selectivity with respect to the thin film to be etched. It has become possible to etch metals, semiconductors, metal silicides, insulators, etc. by significantly increasing the ion acceleration voltage during dry etching compared to conventional methods, and it is now possible to form thin film patterns with highly accurate pattern sides that are nearly vertical. .

Therefore, the present invention is effective in improving the manufacturing quality of highly integrated semiconductor ICs and the like in which patterns are miniaturized.

[Brief explanation of drawings]

Figures 1(a) to 1) are process sectional views of an embodiment of the present invention;
FIGS. 2(a) to 2) are process cross-sectional views of another embodiment of the present invention, and FIG. 3 is a schematic side cross-sectional view of a μ-wave downflow device. In the figure, l is a Si substrate, 2 is an insulating film, 3 is an AI thin film,
4 is a positive resist film, 5 is a silylated layer,
6 is a photomask, 7 is a transparent area, 8 is UV light, 9 is a modified layer, IO is a resist mask, 11 is a lower resist film, 11P is a lower resist pattern, 12 is an upper resist pattern, 13 is a two-layer resist Mask 103 indicates AI wiring. A large ax for personnel use 91/) Process sectional diagram Figure 1 (T no 2) λ; Figure 2 C'''t
I') 1) Cross-sectional view of Minoki Ming U's Okeke 0 Kosha Figure 2 (Ma no 2)

Claims (1)

[Claims] 1. Before pattern formation or after performing silylation treatment on the patterned resist film, the resist film subjected to the silylation treatment is exposed to a downflow of plasma to form a surface of the resist film. A method for forming a resist mask, the method comprising the step of forming a modified layer. 2. The method for forming a resist mask according to claim 1, wherein the plasma downflow is a nitrogen plasma downflow, and the modified layer is a modified layer having [Si--N] bonds. 3. Including the step of performing anisotropic dry etching of the lower resist film using the upper resist mask on which a modified layer having [Si-N] bonds is formed to form a two-layer resist mask. A method for forming a resist mask, characterized in that: 4. At least one of a metal thin film, a semiconductor thin film, a metal silicide thin film, and an insulator thin film by anisotropic dry etching using a resist mask on which a modified layer having [Si-N] bonds is formed. A dry etching method comprising the step of selectively etching a thin film.