JPH04180018A - Liquid crystal display signal processing circuit - Google Patents

Abstract

PURPOSE:To prolong the life of the above circuit by providing a circuit which generates two kinds of medium tone level signals and a switch circuit which alternately changes over these level signals at every one dot, thereby forming a output signal from a switching circuit of a medium monotone signal. CONSTITUTION:A CPU 1 successively supplies two kinds of the medium tone level signals S 1, S 2 to latch circuits 3, 4 via a data bus 2. The level signals S 1, S 2 from the latch circuits 3, 4 are respectively supplied to the fixed terminals on the H side and L side of the switch circuit 5 and the level signals S 1, S 2 are outputted alternately in one dot period by the dot clock DCK from the terminal 6. The level signals S 1, S 2 are then outputted alternately in one period by the display timing signal SDT from an AND circuit 8 and are led out as the medium monotone signal SMT from the terminal 9 and is supplied to the liquid crystal display device. The impress of a DC component is obviated even in the case of long-time display of the medium monotone and the life of the liquid crystal display device is prolonged.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit that processes display signals supplied to a liquid crystal display element.

[Prior Art] Conventionally, when displaying halftone monotone on a liquid crystal display element for a long time, one type of halftone signal Δ, a small signal, or a small signal is supplied over the entire halftone power display area.

[Problems to be Solved by the Invention] In such conventional circuits, one type of halftone level signal or a constant force level is applied for a long time.
There is a problem in that a direct current component is applied to the liquid crystal display element, shortening the life of the liquid crystal display element.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to prevent a DC component from being applied to a liquid crystal display element even when displaying half-tone monotone for a long period of time, thereby preventing shortening of the life of the liquid crystal display element.

Means for Solving the Problems] In order to solve the above problems, the present invention includes a circuit that generates two types of halftone level signals, and a circuit that generates two types of halftone level signals alternately for each dot and soto. Switch to
・It is equipped with a notch circuit, and the output signal of the switch-notch circuit is a halftone monotone signal.

[Function 1] In the above-mentioned configuration, two types of halftone level signals are obtained from the signal generation circuits 1 to 4, and these two kinds of halftone level signals are alternately generated every one doso in the Swiss/Sochi circuit 5. 7-, and the output signals from the switch circuits are supplied to the liquid crystal display element as halftone monotone signals.

Therefore, there are two types of intermediate tone levels or the throat and
Since the display is alternately displayed for each screen, one line of the liquid crystal display element
- If the gutter is sufficiently fine, it will appear as a monotone screen with a level between two types of intermediate tones.

Two types of halftone level signals are alternately supplied to each dot of the liquid crystal display element, so even when displaying halftone monotone on the liquid crystal display element for a long time, no direct current component is applied, and the liquid crystal display This can prevent the element from deteriorating and shortening its lifespan.

[Embodiment] An embodiment of the present invention will be described below with reference to FIG.

In the same figure, 1 is the CPU including software.
) 2 is a stone data bus. Two types of halftone level signals 51. Supplied.

The latch circuit 3 is supplied with 1,000 pulses PLAI from CP L' 1 at the timing when the halftone level signal S1 is supplied. As a result, the signal S1 is taken into the I child circuit 3 and held.

Further, the latch circuit 4 receives a latch pulse P from the CPU at the timing when the halftone bell signal S2 is supplied.
LA2 is supplied. As a result, the signal S2 is taken into the latch circuit 4 and held.

Signals S1 and S output from latch circuits 3 and 4
2 are supplied to fixed terminals on the H side and L side of the circuits h, 2 and 1, respectively. This switching of the switch circuit 5 is controlled by the dot clock DCK supplied from the terminal 6, and is connected to the H side and the L side alternately for one dot period. Therefore, the difference between Sui and Sosen circuit 5 is 1
Signals S1 and S2 are output alternately during the do-no-do period (as shown in FIG. 2A).

The output signal of this Swiss-Sochi circuit 5 is supplied to an AND circuit 8. This AND circuit 8 is supplied with a display timing signal SDT from a terminal 7. This display timing signal is output from a liquid crystal display element control circuit (not shown), and is applied to an area TMD for halftone monotone display. Correspondingly high level rH.

(as shown in FIG. 2B). Therefore, signals S1 and S2 are alternately outputted from the AND circuit 8 for one DO/NODO period corresponding to the region TMD (as shown in FIG. 1C).

Then, the signal output from the AND circuit 8 is led out to a terminal 9 as a halftone monotone signal SMT, and is supplied to a liquid crystal display element (not shown).

In this way, in this example, two types of halftone level signals S1 are generated corresponding to the region TMD for halftone monotone display.
and S2 are alternately supplied to the liquid crystal display element for one dot period. Therefore, if one dot on the liquid crystal display element is thin enough, the viewer can see two types of screen: medium, 71, and 71.
It will be visible as the Moanodo-7 screen of Shibe/f.

According to this example, two types of halftone bell signals S1 and S
2 is supplied alternately to the liquid crystal display element to display a half-tone monotone. Therefore, even when displaying a half-tone monotone on the liquid crystal display element for a long time, a DC component must be applied. Therefore, it is possible to prevent the life of the liquid crystal display element from being shortened. Therefore, there is no problem even if halftone monotone display is performed for a long time.

Note that the present invention is suitable for use in obtaining a halftone monotone signal to be inserted into a portion where there is no video signal in video signals having different display periods, such as those obtained by an NTSC-HD (high-definition) converter.

[Effects of the Invention] As explained above, according to the present invention, two types of halftone level signals are alternately supplied to the liquid crystal display element for each dot, thereby producing a halftone monotone display. Even if halftone monotone display is displayed on the device for a long time, no direct current component is applied to the device, and shortening of the life of the liquid crystal display device can be prevented.

In other words, half-tone monotone display can be performed for a long time without shortening the life of the liquid crystal display element.

[Brief explanation of drawings]

Fig. 1 is a process diagram showing one embodiment of the present invention;
The figure shows the waveforms of each part. I CPU 2 Data bus 3.4 Latch circuit 5 Switch circuit 8 AND circuit Patent applicant Sharp Co., Ltd. agent Patent attorney Ume 1) Katsu (f out 28) A fruitful series of fraudulent fortunes,? Punishment■ Figure 2

Claims (1)

[Claims] (1) In the display signal processing circuit supplied to the liquid crystal display element, a circuit that generates two types of halftone level signals and a switch circuit that alternately switches between the two types of halftone level signals for each dot are included. A liquid crystal display signal processing circuit, characterized in that the output signal of the switch circuit is a halftone monotone signal.