JPH04175917A - Noise removing circuit - Google Patents

Abstract

PURPOSE:To improve noise removal performance corresponding to ambient noise environment without any component replacement even after the noise removing circuit is installed in a device by varying sampling intervals for signal comparison with an indication from an external device. CONSTITUTION:The noise removing circuit is provided with a receiving means which receives an indication signal regarding the sampling intervals and the sampling intervals matching an indicated interval is varied and set. Namely, a latch circuit 13 and a latch circuit 14 sample an input signal at points of time which are different in time series and a comparator 16 outputs a coincidence signal at timing T6 where the ON levels of two sampling signals coincide with each other, so that a latch circuit 18 holds an ON signal. When both the latch circuits 13 and 14 hold level-OFF signals, the (timing T9) latch circuit 18 outputs a level-OFF signal. Consequently, noises are removed from the input signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a noise removal circuit that removes noise in a digital signal transmitted by a signal line.

[Conventional technology]

A typical example of a conventional digital signal noise removal circuit is shown in FIG.

In FIG. 3, the on/off level information signal transmitted on the signal line is held in the first stage latch circuit 1 by a write signal from the transmitting side. Subsequently, the information signal held by the read signal on the transmitting side is read back via the driver 3. The comparator 4 receives the read back information signal and the signal line P.
A matching comparison is made for the level of the current information signal on 1. The comparator 4 generates an OFF noise-free signal when a match is determined, and generates a noise-present signal when a non-coincidence determination is obtained.

On the transmitting side, communication abnormality is detected based on the above-mentioned noise detection (presence/absence) signal. Further, when the above-mentioned match determination is obtained, an output permission signal is generated, and the latch circuit 2 outputs the holding signal of the latch circuit 1.

Further, a noise removal circuit has been proposed in which the receiving side holds an input signal and compares the levels of the input signal at different points in time to detect noise and perform noise removal.

[Problem to be solved by the invention]

However, in the conventional noise removal circuit, since the sampling interval of the comparison signal is fixed, it is not possible to remove the noise generated between the samplings TI and T2, as shown in FIG.

In order to change the sampling timing, it is necessary to replace circuit components, and there is a problem in that it is particularly difficult to replace the components after the noise removal circuit is installed in the device.

SUMMARY OF THE INVENTION An object of the present invention is to provide a noise removal circuit that can eliminate the above-mentioned problems by changing the sampling timing of signals to be compared without replacing parts.

[Means for Solving the Problems] In order to achieve such an object, the present invention provides a sampling circuit that processes a signal to be noise-removed at two different times.
In a noise removal circuit that performs noise removal by sampling twice and comparing the levels of each sampled signal, the noise removal circuit includes a receiving means for receiving a signal instructing a sampling interval of the signal; The present invention is characterized by comprising a control means for variably setting the sampling interval of the circuit.

[Function] In the present invention, the noise removal circuit is provided with a receiving means for receiving an instruction signal regarding the sampling interval, and the sampling interval is variably set in accordance with the instructed interval, so that the circuit components of the noise removal circuit are No need to replace.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

Figure 1 shows the circuit configuration of an embodiment of the present invention.6 This embodiment shows input/output (Ilo) connected to a programmable controller.
An example of installing a noise removal circuit on the module side is shown.

In FIG. 1, the central processing unit (CPU) in the programmable controller sends information indicating the sampling interval for signal comparison via the data bus to the latch circuit II (
receiving means of the present invention).

In this embodiment, the counted number of reference clocks is used as the information indicating the sampling interval.

The counter 12 (control means of the present invention) counts the reference clock, and when it reaches the value held in the latch circuit 11, it generates a single pulse count-up signal.

The latch circuit 13 constituting the sampling circuit holds a 1-bit digital signal of the input data or control signal input from the programmable controller when the counter 12 generates a count-up signal.

The latch circuit 14 constituting the sampling circuit holds the holding signal of the latch circuit 13 when the count-up signal is generated.

The comparator 16 outputs the holding signal of the latch circuit 13 and the latch circuit 1.
The levels of the hold signals No. 4 and 4 are compared, and when the levels match, an on level signal is generated.

The latch circuit 18 inputs a signal created by the judgment signal of the comparator 16 and the inverted signal of the count-up signal of the counter 12, and converts the output signal of the latch circuit 13 into the noise-removed signal at the timing when this signal turns on. Output as .

The noise removal operation in such a circuit will be explained using the waveform diagram of FIG.

For the sake of explanation, it is assumed that the counter 12 generates a count-up signal when it counts three reference clocks.

When the level of the input signal changes from off to on at timing TI in FIG. 2, the latch circuit 13 holds the level-on input signal when the count-up signal is generated at timing T3.

The latch circuit 14 holds the off output signal of the latch circuit 13. Since the comparison result of the comparator 16 is a mismatch, the clock input to the latch circuit 18 remains at level OFF, and the signal at timing T3 of the latch circuit 18 remains at level OFF.

If noise is mixed into the input signal when the next count-up signal is generated (timing T4), the latch circuit 13 holds the level-off input signal. The latch circuit 14 holds the level-on signal of the latch circuit 13 so far. Therefore, since the comparator 16 makes a non-coincidence determination, the holding signal of the latch circuit 18 continues to be level off.

When the count-up signal is generated at timing T6, the latch circuit 13 holds the level-on input signal, but the latch circuit 14 holds the level-off output signal of the latch circuit 13. Therefore, the judgment of the comparator 16 is inconsistent, and the holding signal of the latch circuit 18 continues to be in the level-off state.

In this way, the latch circuit 13. The latch circuit 14 samples the single power signal at different time points in time series, and at timing T6 when the levels of the two sampling signals both match on, the comparator 16 outputs a coincidence signal, and the latch circuit 18 outputs an on signal. (See Figure 2). Furthermore, when both the latch circuits 13 and 14 hold level-off signals (timing T9), the latch circuit 18 outputs a level-off signal. Such processing operations remove noise from the input signal.

Further, the sampling interval of the sampling signal to be compared is the same as the generation cycle of the count-up signal. Therefore, if you want to change the sampling interval, the latch circuit 11 can be changed by writing processing on the programmable controller side.
The count setting value can be changed.

In addition to this embodiment, the following examples can be given.

l) In this embodiment, an example is shown in which the sampling interval is made variable by instructions from the programmable controller, but the sampling interval may also be changed from the I10 unit side. If you want to do this change automatically, you can do the following.

Data anomaly detection system using parity code! is used to detect noise abnormalities, and then the number of times this detection is performed is counted. When the CPU or the like determines that the count result exceeds a certain number of times, the CPU of the I10 unit changes the count setting value of the latch circuit 11. Regarding the values to be changed, the type of change may be determined in advance, for example, 2-4-6→8.

2) In this embodiment, a counter is used as the timing signal generator that instructs the sampling timing, but other circuits that can variably set the timing signal generation timing, such as a timing signal generator that uses multiple types of frequency dividers, may be used. May be used.

〔Effect of the invention〕

As described above, according to the present invention, the sampling interval for signal comparison can be made variable according to instructions from an external device, so there is no need to replace parts even after installing a noise removal circuit in the device. The present invention has the effect that the noise removal performance can be improved.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing the circuit configuration of the embodiment of the present invention, Fig. 2 is a waveform diagram showing signal waveforms of the embodiment of the invention, Fig. 3 is a circuit diagram showing the circuit configuration of the conventional example, and Fig. 4 is FIG. 3 is a waveform diagram showing waveforms of a normal signal and a noise-containing signal. 11.13, 14.18...Latch circuit, 12...
counter. Figure 3 Figure 4

Claims (1)

[Claims] 1) In a noise removal circuit that performs noise removal by sampling a signal to be removed twice at different times in a sampling circuit and comparing the levels of each sampled signal, the sampling interval of the signal is A noise removal circuit comprising: receiving means for receiving an instructing signal; and control means for variably setting the sampling interval of the sampling circuit to the sampling interval indicated by the received signal.