JPH04168719A - Manufacturing apparatus for semiconductor device - Google Patents
Manufacturing apparatus for semiconductor deviceInfo
- Publication number
- JPH04168719A JPH04168719A JP29595690A JP29595690A JPH04168719A JP H04168719 A JPH04168719 A JP H04168719A JP 29595690 A JP29595690 A JP 29595690A JP 29595690 A JP29595690 A JP 29595690A JP H04168719 A JPH04168719 A JP H04168719A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- stage
- developer
- developing
- development
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 6
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000007788 liquid Substances 0.000 claims abstract description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 235000012431 wafers Nutrition 0.000 abstract description 59
- 238000000034 method Methods 0.000 abstract description 2
- 239000006185 dispersion Substances 0.000 abstract 3
- 230000002459 sustained effect Effects 0.000 abstract 1
- 238000004140 cleaning Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000001105 regulatory effect Effects 0.000 description 4
- 230000001934 delay Effects 0.000 description 2
- 101100441413 Caenorhabditis elegans cup-15 gene Proteins 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002277 temperature effect Effects 0.000 description 1
Landscapes
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造装置に関し、特にフォトレジ
ストパターンを現像液を用いて現像する現像装置に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an apparatus for manufacturing semiconductor devices, and more particularly to a developing apparatus for developing a photoresist pattern using a developer.
第4図(a)〜(d)は、従来のこの種の現像装置の機
能を工程順に説明する縦断面図でる。まず図(a)にお
いて、ウェーハチャック1にて保持されたウェーハ2が
カップ15内に搬送される。次に図(b)において、ウ
ェーハ2上の現像液ノズル13より現像液6を供給し、
表面張力による現像液6の液盛り形成を行う。次いで現
像が開始される。この際、ウェーハ2はモーター10に
よってウェーハチャック回転方向Rに低速回転される。FIGS. 4(a) to 4(d) are longitudinal cross-sectional views illustrating the functions of a conventional developing device of this type in the order of steps. First, in FIG. 1A, a wafer 2 held by a wafer chuck 1 is transferred into a cup 15. As shown in FIG. Next, in Figure (b), the developer 6 is supplied from the developer nozzle 13 on the wafer 2,
A liquid mound of the developer 6 is formed by surface tension. Development is then started. At this time, the wafer 2 is rotated at low speed in the wafer chuck rotation direction R by the motor 10.
次に図(c)において、現像終了後、ウェハ2を回転さ
せながらリンス液ノズル14よりリンス液7をウェーハ
2上に供給し、ウェーハ2のリンスを行なう。処理済液
はドレイン管1から排出される。次に図(d)において
、リンス終了後、高速にてウェーハ2を回転させ、ウェ
ーハ2の乾燥を行なう。以上、(a)〜(d)の繰り返
し動作により、ウェーハ2を順次現像していた。Next, in Figure (c), after the development is completed, the rinsing liquid 7 is supplied onto the wafer 2 from the rinsing liquid nozzle 14 while rotating the wafer 2, thereby rinsing the wafer 2. The treated liquid is discharged from the drain pipe 1. Next, in Figure (d), after rinsing is completed, the wafer 2 is rotated at high speed to dry the wafer 2. As described above, the wafer 2 was sequentially developed by repeating the operations (a) to (d).
上述した従来の現像装置は、現像液ノズルが中央にある
ため、現像液がウェーハ中央部から供給され、そのため
現像はウェーハ中央から外周に向けて進行する。従って
、現像されるフォトレジストの寸法は、ウェーハ中央か
ら外周に向けてばらつきが発生するという欠点がある。In the conventional developing device described above, since the developer nozzle is located at the center, the developer is supplied from the center of the wafer, and therefore development proceeds from the center of the wafer toward the outer periphery. Therefore, there is a drawback that the dimensions of the developed photoresist vary from the center of the wafer toward the outer periphery.
特に近年、半導体装置の微細化は著しく、それに伴ない
現像の部分的な遅れはウェーハ面内の寸法制御性にも大
きく影響し、製品の歩留りを悪化させる要因となってい
る。Particularly in recent years, the miniaturization of semiconductor devices has been remarkable, and the resulting local delays in development have a large effect on the dimensional controllability within the wafer plane, becoming a factor that deteriorates the yield of products.
上述した従来の現像装置は、ウェーハ中央部にノズルか
ら現像液を供給する構造であるのに対し、本発明は瞬時
にて同時にウェーハ全面に現像液を供給するための現像
液ステージを設けたという相違点を有する。The conventional developing device described above has a structure in which the developer is supplied from a nozzle to the center of the wafer, whereas the present invention is equipped with a developer stage that instantly and simultaneously supplies the developer to the entire surface of the wafer. have differences.
本発明の半導体製造装置は、ウェーハ上に塗布されたフ
ォトレジスト面に対向する平面を備えた現像ステージを
設け、この現像ステージの平面に複数の処理液吐出口を
形成して構成されている。The semiconductor manufacturing apparatus of the present invention includes a developing stage having a flat surface facing a photoresist surface coated on a wafer, and a plurality of processing liquid discharge ports formed on the flat surface of the developing stage.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図(a)〜(e)は本発明の実施例1の機能を工程
順に説明する縦断面図であり、第2図は実施例1に用い
る現像ステージの平面図である。以下、順を追って説明
する。ます図(a)において、露光処理の終了したウェ
ーハ2は、ウェーハチャック1により処理面か現像ステ
ージ5と対向して保持される。次に図(b)において、
現像ステージ5に現像液吐出口3より現像液6を供給し
、表面張力にて保持する。次に図(c)において、ウェ
ーハチャック1を下げ、現像ステージ5に平行にウェー
ハ2表面を接着させ、ウェーハ2をR方向に回転させな
がら現像を開始する。次に図(d)において、現像終了
後、現像ステージ5の中央にあるリンス液吐出口4より
リンス液7を供給し、ウェーハ上の現像液を洗い流し、
ウェーハ2表面をリンスする。次に図(e)において、
リンス終了後、ウェーハ2は高速回転により乾燥され、
次工程へ送られる。その後、ウェーハチャック2は上昇
し、初期位置へ戻る。現像ステージ5は、現像ステージ
洗浄液ノズル8からの現像ステージ洗浄液9にて洗浄さ
れ、次ウェーハ処理のため待機する。以上、(a)〜(
e)の繰り返し動作により、ウェーハ2を順次現像する
。FIGS. 1(a) to 1(e) are vertical cross-sectional views explaining the functions of the first embodiment of the present invention in the order of steps, and FIG. 2 is a plan view of the developing stage used in the first embodiment. The following is a step-by-step explanation. In Figure (a), a wafer 2 that has undergone exposure processing is held by a wafer chuck 1 with its processing surface facing the development stage 5 . Next, in figure (b),
A developer 6 is supplied to the development stage 5 from the developer discharge port 3 and held by surface tension. Next, in Figure (c), the wafer chuck 1 is lowered, the surface of the wafer 2 is adhered parallel to the development stage 5, and development is started while rotating the wafer 2 in the R direction. Next, in Figure (d), after the development is completed, a rinse liquid 7 is supplied from the rinse liquid outlet 4 in the center of the development stage 5, and the developer on the wafer is washed away.
Rinse the surface of wafer 2. Next, in figure (e),
After rinsing, the wafer 2 is dried by high speed rotation.
Sent to the next process. Thereafter, the wafer chuck 2 rises and returns to its initial position. The developing stage 5 is cleaned with the developing stage cleaning liquid 9 from the developing stage cleaning liquid nozzle 8, and then stands by for the next wafer processing. Above, (a) to (
By repeating the operation e), the wafers 2 are sequentially developed.
本実施例によれば、従来装置に比較し、ウェーハ面内の
現像の部分的な遅れを解消することが可能となり、ウェ
ーハ面内の現像均一性が向上され、ウェーハ面内の寸法
ばらつきが大幅に改善される。ここで、第2図に示すよ
うに、現像ステージ5の現像液吐出口3は小さく且つ数
多く設けている方がより一層現像均−性は向上される。According to this embodiment, compared to conventional equipment, it is possible to eliminate local delays in development within the wafer plane, improve uniformity of development within the wafer plane, and significantly reduce dimensional variations within the wafer plane. will be improved. Here, as shown in FIG. 2, the development uniformity can be further improved by providing a large number of small developer discharge ports 3 of the development stage 5.
また2本実施例の装置と上下を逆(ウェーハ2が下側、
現像ステージ5が上側)にした構成も可能であり、逆に
しない場合と同等の効果が期待出来る。In addition, the apparatus of the second embodiment is upside down (wafer 2 is on the bottom,
A configuration in which the developing stage 5 is on the upper side) is also possible, and the same effect as in the case where the developing stage 5 is not reversed can be expected.
第3図は本発明の実施例2に使用する現像ステージ5の
縦断面図である。現像ステージ5を温調するために、現
像ステージ5内に温調媒体を循環させる。温調媒体は、
温調媒体流入部11より流入し、温調媒体流出部12よ
り流出し、現像液温を一定に保温する。現像時は、一定
温度に保温された現像液6にてウェーハ2を現像する。FIG. 3 is a longitudinal sectional view of the developing stage 5 used in Example 2 of the present invention. In order to control the temperature of the developing stage 5, a temperature regulating medium is circulated within the developing stage 5. The temperature control medium is
The temperature regulating medium flows in from the temperature regulating medium inlet 11 and flows out from the temperature regulating medium outlet 12 to keep the developing solution temperature constant. During development, the wafer 2 is developed with a developer 6 kept at a constant temperature.
その他の動作は実施例1と同様である。Other operations are the same as in the first embodiment.
本実施例によれば、従来の液温だけの定温に終わらず、
ウェーハ2表面上の現像液温も現像ステージ5の恒温の
効果を受け、定温に保持されるため、実施例1に比較し
、ウェーハ間及びロット間の現像ばらつきを解消するこ
とが可能となり、ウェーハ間及びロット間の現像均一性
が向上し、ウェーハ間及びロット間の寸法ばらつきが大
幅に改善できる。According to this embodiment, the temperature is not limited to the conventional liquid temperature.
Since the temperature of the developer on the surface of the wafer 2 is also maintained at a constant temperature due to the constant temperature effect of the development stage 5, compared to Example 1, it is possible to eliminate variations in development between wafers and between lots. Development uniformity between wafers and between lots is improved, and dimensional variations between wafers and between lots can be significantly reduced.
以上説明した様に本発明は、瞬時にて同時にウェーハ全
面に現像液を供給し現像が行なえるため、ウェーハ面内
の現像の部分的な遅れか解消され、ウェーハ面内の現像
均一性が向上し、ウェーハ面内の寸法ばらつきが従来の
6〜8%から2〜3%以下と大幅に改善出来る効果があ
る。As explained above, the present invention can instantaneously and simultaneously supply a developer to the entire wafer surface to perform development, which eliminates only a partial delay in development within the wafer surface and improves the uniformity of development within the wafer surface. However, the dimensional variation within the wafer surface can be significantly improved from 6 to 8% in the conventional method to 2 to 3% or less.
また、現像液温を一定に保温し現像時に使用することに
より、ウェーハ間及びロット間の現像均一性が向上し、
ウェーハ間及びロット間の寸法ば6一
らつきが従来の9〜10%から3〜4%以下と大幅に改
善出来る効果がある。In addition, by keeping the developer temperature constant and using it during development, development uniformity between wafers and between lots is improved.
There is an effect that the dimensional variation between wafers and between lots can be significantly improved from the conventional 9 to 10% to 3 to 4% or less.
第1図は本発明の実施例の1の機能を工程順に説明する
縦断面図、第2図は実施例1に用いる現像ステージの平
面図、第3図は本発明の実施例21・・・ウェーハチャ
ック、2・・・ウェーハ、3・・・現像液吐出口、4・
・・リンス液吐出口、5・・・現像ステージ、6・・・
現像液、7・・・リンス液、8・・・現像ステージ洗浄
液ノズル、9・・・現像ステージ洗浄液、10・・・モ
ーター、11・・・温調媒体流入部、12・・・温調媒
体流出部、13・・・現像液ノズル、14・・・リンス
液ノズル、15・・・カップ、16・・・ドレイン管、
R・・・ウェーハチャック回転方向。FIG. 1 is a vertical cross-sectional view explaining the functions of Example 1 of the present invention in the order of steps, FIG. 2 is a plan view of the developing stage used in Example 1, and FIG. 3 is Example 21 of the present invention... Wafer chuck, 2... wafer, 3... developer discharge port, 4...
...Rinse liquid discharge port, 5...Development stage, 6...
Developing solution, 7... Rinse liquid, 8... Development stage cleaning liquid nozzle, 9... Development stage cleaning liquid, 10... Motor, 11... Temperature control medium inlet, 12... Temperature control medium Outflow part, 13... Developer nozzle, 14... Rinse liquid nozzle, 15... Cup, 16... Drain pipe,
R...Wafer chuck rotation direction.
Claims (1)
て所望のパターンに現像する半導体装置の製造装置にお
いて、前記ウェーハのフォトレジスト面に対向する平面
を備えた現像ステージを設け、この現像ステージの平面
に複数の処理液吐出口を形成したことを特徴とする半導
体装置の製造装置。In a semiconductor device manufacturing apparatus in which a photoresist coated on a wafer is developed into a desired pattern using a developer, a development stage is provided with a flat surface facing the photoresist surface of the wafer, and the flat surface of the development stage is A semiconductor device manufacturing apparatus characterized in that a plurality of processing liquid discharge ports are formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29595690A JPH04168719A (en) | 1990-11-01 | 1990-11-01 | Manufacturing apparatus for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29595690A JPH04168719A (en) | 1990-11-01 | 1990-11-01 | Manufacturing apparatus for semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04168719A true JPH04168719A (en) | 1992-06-16 |
Family
ID=17827277
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29595690A Pending JPH04168719A (en) | 1990-11-01 | 1990-11-01 | Manufacturing apparatus for semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04168719A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08279482A (en) * | 1995-04-05 | 1996-10-22 | Nec Corp | Method and system for cleaning semiconductor substrate |
-
1990
- 1990-11-01 JP JP29595690A patent/JPH04168719A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08279482A (en) * | 1995-04-05 | 1996-10-22 | Nec Corp | Method and system for cleaning semiconductor substrate |
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