JPH04166776A - Large scale integrated circuit device - Google Patents

Abstract

PURPOSE:To test the function of a mega-macrocell by providing a multiplexer for selectively connecting the signal input/output terminal of the mega-macrocell to a bi-directional I/O buffer and applying a test pattern used in a general purpose LSI to the mega-macrocell via the bi-directional I/O buffer. CONSTITUTION:In a test, the input/output terminals of a mega-macrocell 11 are connected to the I/O terminals 12-14 of an integrated circuit device via multiplexers MPX 15-19, respectively. Thus, signals which appear in the input/ output terminals can be outputted to the I/O terminals as they are and the output of the mega-macrocell 11 can be monitored by applying a test pattern to it. Therefore, the test wherein the highly reliable test pattern of a general purpose LSI is used as it is can be performed and the test of the integrated circuit device can be simply, easily and efficiently performed with high reliability.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a large-scale integrated circuit device that can easily test the functionality of a mega-macro cell used in ASIC development.

(Prior Art) Recently, mega-macro cells, which are large-scale circuit blocks having functions equivalent to general-purpose LSIs, have been increasingly used in ASIC development. This type of mega-macro cell plays a major role in meeting the requirements for short-term development and ease of system design, which are becoming increasingly difficult with the large-scale integration of LSIs.

Now, ASIC manufacturing tests developed using mega-macro cells generally involve applying a test pattern that guarantees the functionality of each mega-macro cell to each large-scale circuit block formed by the mega-macro cell. This is done by comparing the output. In other words, by preparing test patterns in advance to guarantee the functions of the mega-macro cells in each block, inputting these test patterns externally to the corresponding mega-macro cells (large-scale circuit blocks), and monitoring the output, the above can be achieved. A functional test of the megamacro cell is performed.

Now, the gate cell configured using mega macro cells is
Basically, if you understand the circuit function from the I/O terminal,
As shown in FIGS. 2(a) and 2(b), it is equivalent to a general-purpose LSI.

However, the mega macrocell itself is defined as an internal cell portion of the entire gate array excluding the I/O buffer, which performs a function equivalent to that of a general-purpose LSI. The input/output terminals of this mega macrocell and the I of the general-purpose LSI (gate array)
When compared with the /O terminal, the input/output terminals of the mega macrocell composed of internal cells as shown in Figure 2(b) are bidirectional I/O terminals in general-purpose LSIs (gate arrays).
Connect terminal C to input terminal C1 and output terminal CO2 output buffer.
It can be viewed as being divided into three enable terminals COE.

Therefore, in order to test the function of the mega-macro cell itself that constitutes the internal cells of an ASIC (large scale integrated circuit device) developed using the mega-macro cell, it is necessary to test the input/output terminals of the mega-macro cell ( Input terminal CI, output terminal CO, output buffer enable terminal COE)
I/O terminals corresponding to each are provided separately from the I/O terminals of the ASIC (large scale integrated circuit device), and a test pattern is input to the mega macrocell through these I/O terminals for testing. It is necessary to test its functionality. Moreover, in this case, it is necessary to prepare a test pattern unique to the mega macrocell in accordance with the configuration of the 1/O terminal (input/output terminal of the mega macro cell) for testing.

In Fig. 3, l is a mega macro cell that constitutes an internal cell, 2.3, 4, and 5.6 are I/O buffers for inputting and outputting signals with the outside, and 7.8 is a mega macro cell. This is a multiplexer for switching the input to the macro cell 1. Also, *marks indicate signal lines connected to other circuit blocks in the developed ASIC (large scale integrated circuit device).

However, it is very difficult to provide test I/O terminals corresponding to the configuration of input/output terminals of the mega-macrocell in this manner and to prepare test patterns corresponding to the terminal configuration. Moreover, since the function test of the mega macrocell can be performed without going through the bidirectional I/O terminals provided in the gate array, which performs the function equivalent to that of a general-purpose LSI,
For example, it is necessary to separately check what the AC characteristics will be when signals are actually input/output via the bidirectional I/O terminal of the gate array, and the problem is that the number of items to be checked increases. be.

(Problems to be Solved by the Invention) Conventionally, ASI
In order to test the functions of individual mega-macro cells in a large-scale integrated circuit (gate array) developed for each cell block, it is necessary to prepare test patterns according to the structure of the input/output terminals of each mega-macro cell. There were some problems.

The present invention was made in consideration of these circumstances, and its purpose is to integrate the functions of individual mega-macro cells in a large-scale integrated circuit (gate array) into a general-purpose LSI.
An object of the present invention is to provide a highly practical large-scale integrated circuit device that can be easily and efficiently tested using a highly reliable test pattern.

[Structure of the Invention] (Means for Solving the Problems) A large-scale integrated circuit device according to the present invention connects signal input/output terminals of a mega-macro cell composed of internal cells to the outside of a gate array. A multiplexer selectively connected to a bidirectional I/O buffer that handles input/output is provided as a test circuit, and a highly reliable test pattern used in a general-purpose LSI is connected to the mega-macro cell via the bidirectional I/O buffer. It is characterized in that it is possible to apply .

(Function) According to the present invention configured as described above, the I/O terminals of the gate array, which is a large-scale integrated circuit device, can be used as they are, and the proven reliability of a general-purpose LSI that is functionally equivalent can be achieved. It is possible to test the function of the mega macro cell that constitutes the internal cell by using the high test pattern as it is. As a result, it is possible to eliminate the hassle of having to provide a dedicated I/O terminal for testing or to design a test pattern that matches the terminal structure of the macrocell, which was the case in the past. It becomes possible to test efficiently and reliably.

(Embodiment) An embodiment of a large-scale integrated circuit device according to the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic configuration diagram of the embodiment device, and 11 is a mega macro cell constituting an internal cell. This mega macro cell 1
1 constitutes a gate array that is functionally equivalent to a general-purpose LSI, and includes 1/O buffers 12 and 13 and a bidirectional I/O buffer 14.

The feature of this embodiment device is that the input/output terminals of the mega macrocell 11 are
O buffers 12.13, multiplexers 15, 16 selectively connected to the bidirectional I/O buffer 14, respectively.
17, 18, and 19 were provided as test circuits.

When testing the function of the mega macro cell 11, the input/output terminals of the mega macro cell 11 are connected to the I/O buffer 12, 13, the bidirectional I/O The main feature is that they are connected to the I/O terminals of the large-scale integrated circuit device through buffers 14, respectively.

In FIG. 1, square marks indicate signal lines connected to other circuit blocks in the developed ASIC (large scale integrated circuit device).

In other words, in this embodiment device, the input/output terminals of the mega macrocell 11 are connected to each I/O terminal including the bidirectional 1/O buffer 14 by a test circuit configured using a multiplexer.
It is possible to connect to the I/O terminals of the large-scale integrated circuit device through O buffers, input test patterns to the mega macro cell 11 through these I/O terminals, and perform a functional test of the mega macro cell 11. It is a feature.

To explain in more detail, general-purpose LSIs originally have bidirectional I/
By connecting the data input terminal, data output terminal, and data output enable terminal of the mega macrocell realized as O terminals to the corresponding signal terminals of the bidirectional I/O buffer 14, A feature of this system is that test patterns for performing functional tests on general-purpose LSIs can be input as they are.

According to the embodiment device configured as described above, when testing the function of the mega macrocell 11, the integrated circuit device (LS
It becomes possible to apply a test pattern to the mega-macro cell 11 and monitor its output by using the I/O terminal of I) as is. In other words, the internally connected input/output terminals of the mega macrocell 11 are connected to the multiplexer 15. Since it is connected to the I/O terminal of the integrated circuit device (LSI) through 19, it is possible to directly output the signal appearing at the input/output terminal to the I/O terminal.

In addition, signals are sent to the mega macro screen 11 via the I/O terminal of the integrated circuit device (LSI), and the I/O
Since the configuration of the O terminal is equivalent to the configuration of the I/O terminal of a general-purpose LSI, the functions of the mega-macro cell II are performed using various highly reliable test patterns used for functional tests of general-purpose LSIs. becomes possible.

Therefore, unlike in the past, there is no need to develop a new test pattern according to the configuration of the input/output terminals of the megamacro cell 11, and the function test of the megamacro cell 11 can be performed efficiently by using existing highly reliable test patterns as they are. It becomes possible to do so.

As described above, according to the present invention, the functions of the mega macrocell 11 constituting the internal cells of a gate array developed as an ASIC functional block functionally equivalent to a general-purpose LSI can be realized by having a terminal configuration equivalent to a general-purpose LSI. Gate array I
Efficient testing can be performed via the /O terminal using a highly reliable test pattern that has a proven track record in general-purpose LSIs. Moreover, it is possible to conduct an effective functional test by simply connecting the input/output terminals of the mega macrocell 11 to external connection terminals including the bidirectional I/O terminals of the gate array via a multiplexer during the functional test. be effective.

Note that the present invention is not limited to the embodiments described above. For example, although the explanation has been given here using a mega macro cell that is often used in ASIC development, the technology of the present invention can be similarly applied to a case where an internal cell is configured using a standard cell. Also, here, an example has been shown in which only one bidirectional I/O terminal of the gate array is decomposed into the data input terminal, data output terminal, and data output enable terminal of the mega macrocell 11. If the bidirectional I/O terminal is divided into multiple input/output terminals of the megamacro cell, these multiple input/output terminals are connected to the corresponding bidirectional I/O terminal of the gate array.
A test circuit may be provided to be connected to the O terminal. In addition, the present invention can be implemented with various modifications without departing from the gist thereof.

[Effects of the Invention] As explained above, according to the present invention, it is possible to test the functions of a mega macro cell that constitutes an internal cell using a highly reliable test pattern of a general-purpose LSI, and the test can be performed easily. It can be performed very easily, reliably, and efficiently, and has great practical effects.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a schematic configuration example of a large-scale integrated circuit device according to an embodiment of the present invention, and FIG. 2 is a diagram schematically showing the relationship between a general-purpose LSI and a gate array constructed using mega-macro cells. FIG. 3 is a diagram showing an example of a configuration for realizing a conventional mega-macro cell function test. 11...mega macrocell, 12,13.14...I
/O buffer, 15, 18.17, 18.19... multiplexer (test circuit). Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

[Claims] A multiplexer is provided that selectively connects the signal input/output terminals of the mega macrocell composed of internal cells to a bidirectional I/O buffer that is responsible for inputting and outputting signals to and from the outside, and the bidirectional I/O buffer is connected to the bidirectional I/O buffer. A large-scale integrated circuit device, characterized in that a test pattern can be applied to the mega-macro cell through the mega-macro cell.