JPH0416668U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of this invention, Fig. 2 is a plan view showing an outline of an optical disk to which this invention can be applied, and Fig. 3 is a schematic diagram used to explain an optical disk to which this invention can be applied. , Fig. 4 is a schematic diagram used to explain the servo area of an optical disk to which this invention can be applied, Fig. 5 is a waveform diagram used to explain an embodiment of this invention, and Fig. 6 is an embodiment of this invention. 7 is a waveform diagram used to explain one embodiment of this invention. FIG. 8 is a block diagram used to explain another embodiment of this invention.
The figure is a block diagram used to explain a conventional data reproducing device, and FIG. 10 is a waveform diagram used to explain the conventional data reproducing device. Explanation of main symbols in the drawings, 2A to 2G...
...Delay circuit, 3...Selector, 4...Shift register, 35...Gray code counter.

Claims (1)

[Scope of claims for utility model registration] (1) A reference clock is recorded on a recording medium,
In a data reproducing device that performs phase compensation of an external clock using a reproduced signal of the reference clock, a plurality of external clocks having mutually different phases are formed, and the plurality of external clocks are connected to a shift register and a shift register. a selector controlled by the output, and detects the external clock that has the most suitable phase relationship between the phase of the selected external clock and the phase of the reproduced signal of the reference clock; 1. A data reproducing device characterized in that data is reproduced using an external clock whose phase relationship between the phase of the reference clock and the phase of the reproduced signal of the reference clock is most suitable. (2) Record the reference clock on a recording medium,
In a data reproducing device that performs phase compensation of an external clock using a reproduced signal of the reference clock, a plurality of external clocks having mutually different phases are formed, and the plurality of external clocks are connected to a Gray code counter and the Gray code. a selector controlled by the output of the counter, and detects the external clock whose phase relationship between the selected external clock and the phase of the reproduced signal of the reference clock most closely matches; A data reproducing device characterized in that data is reproduced using an external clock that has the most suitable phase relationship between the phase of the external clock and the phase of a reproduced signal of a reference clock.