JPH033973B2 - - Google Patents

Info

Publication number
JPH033973B2
JPH033973B2 JP57160025A JP16002582A JPH033973B2 JP H033973 B2 JPH033973 B2 JP H033973B2 JP 57160025 A JP57160025 A JP 57160025A JP 16002582 A JP16002582 A JP 16002582A JP H033973 B2 JPH033973 B2 JP H033973B2
Authority
JP
Japan
Prior art keywords
signal
digital signal
sine wave
pulse signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57160025A
Other languages
Japanese (ja)
Other versions
JPS5949005A (en
Inventor
Seiichi Oomichi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP16002582A priority Critical patent/JPS5949005A/en
Publication of JPS5949005A publication Critical patent/JPS5949005A/en
Publication of JPH033973B2 publication Critical patent/JPH033973B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は時刻あるいは曲番号等を表示する符号
化された多ビツトデイジタル信号を正弦波信号に
変換するパルス信号波形整形回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a pulse signal waveform shaping circuit that converts an encoded multi-bit digital signal indicating time, song number, etc. into a sine wave signal.

(ロ) 背景技術 近頃テープレコーダにおいて、録音開始時刻、
録音した曲の番号、あるいは録音位置を示す信号
を録音し、再生時に前記録音開始時間等が分るよ
うにすることが行なわれている。前記録音開始時
刻等は通常4ビツトデイジタル信号で表わされて
おり、録音開始時に内蔵されている時計を操作
し、そのときの時刻を表わす4ビツトデイジタル
信号を発生させ、その4ビツトデイジタル信号
を、磁気ヘツドを介してテープに録音し、再生時
には前記テープに録音している4ビツトデイジタ
ル信号を磁気ヘツドで再生し、再生された4ビツ
トデイジタル信号で表示装置をドライブし、前記
録音開始時刻が前記表示装置より読み取れるよう
にしている。前記録音開始時刻等を表わす4ビツ
トデイジタル信号は可聴周波数外の10〜15Hzの低
周波が用いられているが、テープに録音すると再
生時に雑音が発生し聴感上好ましくない。これは
上記録音開始時刻を表わすのにデイジタル信号を
単に波形整形した半波信号を用いているので、録
音されるテープ上の磁気が一方向のみに変化し、
再生時それが急激な信号レベルとなるからであ
る。斯る欠点を除去するには前述の録音開始時
刻、曲の番号、あるいは録音位置等を表わす符号
化された多ビツトデイジタル信号、即ち4ビツト
デイジタル信号を正弦波信号の1サイクルに変換
しつなぎ目をゼロクロスとし、その正弦波信号を
録音すればよい。
(b) Background technology Recently, in tape recorders, recording start time,
It is common practice to record a signal indicating the number of the recorded song or the recording position so that the recording start time and the like can be determined during playback. The recording start time, etc. is usually expressed as a 4-bit digital signal, and when recording starts, a built-in clock is operated to generate a 4-bit digital signal representing the time at that time, and the 4-bit digital signal is The recording is recorded on a tape via a magnetic head, and during playback, the 4-bit digital signal recorded on the tape is played back using the magnetic head, the reproduced 4-bit digital signal drives a display device, and the recording start time is set. The information is readable from the display device. The 4-bit digital signal representing the recording start time, etc. uses a low frequency of 10 to 15 Hz, which is outside the audible frequency range, but when recorded on tape, noise is generated during playback, which is not pleasing to the audible sense. This uses a half-wave signal obtained by simply shaping the digital signal to represent the above-mentioned recording start time, so the magnetic field on the tape being recorded changes in only one direction.
This is because the signal level becomes abrupt during reproduction. In order to eliminate this drawback, the encoded multi-bit digital signal representing the recording start time, song number, recording position, etc., that is, the 4-bit digital signal, is converted into one cycle of a sine wave signal, and the joint is All you have to do is set it to zero cross and record the sine wave signal.

(ハ) 問題点を解決するための手段 本発明は斯る場合に用いられる符号化された多
ビツトデイジタル信号を正弦波信号に変換するパ
ルス信号波形整形回路を提供するものである。
(c) Means for Solving the Problems The present invention provides a pulse signal waveform shaping circuit that converts the encoded multi-bit digital signal used in such cases into a sine wave signal.

(ニ) 実施例 以下本発明を図面に従つて説明すると、1は基
準となるパルス信号を発生するパルス信号発生回
路、2は前記パルス信号を分周する分周回路、3
は時刻等を表わす符号化された多ビツトデイジタ
ル信号を発生するデイジタル信号発生回路、4は
前記多ビツトデイジタル信号をシリアルデイジタ
ル信号に変換するパラレルシリアル変換回路、5
は前記パルス信号を正弦波信号に変換する正弦波
変換回路で、直列に接続した二組の積分回路より
なる。6は前記正弦波変換回路で変換した正弦波
信号をスイツチングするトランジスタで、前記パ
ラレルシリアル変換回路4で変換したシリアルデ
イジタル信号でオンオフされる。7は増幅回路、
8は磁気ヘツドである。
(d) Embodiments The present invention will be described below with reference to the drawings. 1 is a pulse signal generation circuit that generates a reference pulse signal, 2 is a frequency dividing circuit that divides the frequency of the pulse signal, and 3 is a frequency dividing circuit that divides the frequency of the pulse signal.
4 is a digital signal generation circuit that generates a coded multi-bit digital signal representing time, etc.; 4 is a parallel-to-serial conversion circuit that converts the multi-bit digital signal into a serial digital signal;
is a sine wave conversion circuit that converts the pulse signal into a sine wave signal, and is composed of two sets of integrating circuits connected in series. A transistor 6 switches the sine wave signal converted by the sine wave conversion circuit, and is turned on and off by the serial digital signal converted by the parallel to serial conversion circuit 4. 7 is an amplifier circuit,
8 is a magnetic head.

次に本発明の動作について説明する。今パルス
信号発生回路1より基準となるパルス信号(第2
図E)を発生する。そのパルス信号は正弦波変換
回路5にて正弦波信号(第2図H)に変換され
る。一方デイジタル信号発生回路3を操作するこ
とによつて前記パルス信号に同期して例えば録音
開始時刻を表わす4ビツトデイジタル信号(第2
図A,B,C,D)を発生する。図においては一
例として8時12分の録音開始時刻を表わす場合を
示しており、4ビツトデイジタル信号(第2図
A,B,C,D)は最初〔1000〕となり、次のタ
イミングでは〔0001〕となり、さらに次のタイミ
ングで〔0010〕となる。これらパラレルのデイジ
タル信号はパラレルシリアル変換回路4におい
て、前記パルス信号(第2図E)を分周回路2に
てL分周して得た分周パルス信号でもつてコント
ロールされ1ビツトのシリアルデイジタル信号
〔100000010010〕(第2図F〕に変換される。この
シリアルデイジタル信号はインバータ10でイン
バートされ(第2図G)、トランジスタ6のベー
スに加えられる。すると前記トランジスタ6は前
記インバートされたシリアルデイジタル信号(第
2図G)がレベル“0”のときのみオフし、他の
期間はオンしているので、前記トランジスタ6が
オフしている前記正弦波信号の1サイクル期間の
み正弦波信号の1サイクルを通過する。従つて増
幅回路7には前記シリアルデイジタル信号(第2
図F)に相当する正弦化された1サイクルの記号
信号(第2図I)が加えられ、増幅される。然る
後磁気ヘツド8に加わりテープ9に録音される。
Next, the operation of the present invention will be explained. Now the reference pulse signal (second
Figure E) is generated. The pulse signal is converted into a sine wave signal (H in FIG. 2) by the sine wave conversion circuit 5. On the other hand, by operating the digital signal generation circuit 3, a 4-bit digital signal (second
Figures A, B, C, D) are generated. The figure shows an example of a recording start time of 8:12, and the 4-bit digital signal (A, B, C, D in Figure 2) is initially [1000], and the next timing is [0001]. ], and then becomes [0010] at the next timing. These parallel digital signals are controlled by a frequency-divided pulse signal obtained by dividing the pulse signal (Fig. 2 E) by L in a frequency divider circuit 2 in a parallel-to-serial conversion circuit 4, and are converted into a 1-bit serial digital signal. [100000010010] (FIG. 2F). This serial digital signal is inverted by the inverter 10 (FIG. 2G) and applied to the base of the transistor 6. The transistor 6 then receives the inverted serial digital signal. Since the signal (FIG. 2 G) is turned off only when the level is "0" and is turned on during other periods, the sine wave signal 1 is turned off only during one cycle of the sinusoidal signal when the transistor 6 is turned off. Therefore, the amplifier circuit 7 receives the serial digital signal (second
A sinusized one-cycle symbol signal (FIG. 2I) corresponding to FIG. F) is applied and amplified. Thereafter, it is added to the magnetic head 8 and recorded on the tape 9.

再生時には磁気ヘツド8にて再生された前記記
号信号をシリアルデイジタル信号に変換し、さら
にそのシリアルデイジタル信号をパラレルデイジ
タル信号に変換することによつて(第2図A,
B,C,D)に示す4ビツトデイジタル信号が得
られるので、その4ビツトデイジタル信号でもつ
て表示装置を駆動し、前記録音開始時刻を表示す
ることができる。
During reproduction, the symbol signal reproduced by the magnetic head 8 is converted into a serial digital signal, and the serial digital signal is further converted into a parallel digital signal (see FIG. 2A,
Since the 4-bit digital signals shown in B, C, and D) are obtained, the display device can be driven with the 4-bit digital signals to display the recording start time.

(ホ) 効果 本発明のパルス信号波形整形回路は上述した如
く、基準となるパルス信号を正弦波信号に変換
し、磁気ヘツドに加え記録信号するものにおい
て、前記パルス信号に同期して時刻等を表す多ビ
ツトデイジタル信号を発生させ、その4ビツトデ
イジタル信号を1/2分周したパルス信号でシリア
ルデイジタル信号に変換し、その1/2分周したシ
リアルデイジタル信号でスイツチ回路をオンオフ
させるようにしたので、磁気ヘツドには前記シリ
アルデイジタル信号に対応して1サイクルの正弦
波信号に変換された記録信号が供給されることに
なる。従つて時刻等を表す多ビツトデイジタル信
号を録音する際に、従来問題にされていた雑音を
除去された良好な録音が出来る。
(E) Effects As described above, the pulse signal waveform shaping circuit of the present invention converts a reference pulse signal into a sine wave signal and adds it to a magnetic head as a recording signal. A multi-bit digital signal is generated, and the 4-bit digital signal is converted into a serial digital signal using a pulse signal whose frequency is divided by 1/2.The switch circuit is turned on and off using the serial digital signal whose frequency is divided by 1/2. Therefore, a recording signal converted into a one-cycle sine wave signal corresponding to the serial digital signal is supplied to the magnetic head. Therefore, when recording a multi-bit digital signal representing time, etc., it is possible to make a good recording without the noise that has been a problem in the past.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のパルス信号波形整形回路図、
第2図は本発明の各部の信号波形図である。 1……パルス信号発生回路、3……デイジタル
信号、発生回路、4……パラレルシリアル変換回
路、5……正弦波変換回路、6……トランジス
タ。
FIG. 1 is a pulse signal waveform shaping circuit diagram of the present invention.
FIG. 2 is a signal waveform diagram of each part of the present invention. DESCRIPTION OF SYMBOLS 1...Pulse signal generation circuit, 3...Digital signal, generation circuit, 4...Parallel-serial conversion circuit, 5...Sine wave conversion circuit, 6...Transistor.

Claims (1)

【特許請求の範囲】[Claims] 1 基準となるパルス信号を発生するパルス信号
発生回路と、前記パルス信号を正弦波信号に変換
する正弦波信号発生回路と、前記パルス信号に同
期し情報を表す符号化された多ビツトデイジタル
信号を発生するデイジタル信号発生回路と、前記
パルス信号を1/2分周する分周回路と、前記1/2分
周されたパルス信号にて前記多ビツトデイジタル
信号をシリアルデイジタル信号に変換するパラレ
ルシリアル変換回路と、該シリアルデイジタル信
号にてオンオフし前記正弦波信号の1サイクルを
通過させ、前記シリアルデイジタル信号に対応す
る1サイクルの正弦波信号に変換された記録信号
を発生させるスイツチ回路と、前記記録信号を記
録する記録手段とよりなるパルス信号波形整形回
路。
1 A pulse signal generation circuit that generates a reference pulse signal, a sine wave signal generation circuit that converts the pulse signal into a sine wave signal, and an encoded multi-bit digital signal that synchronizes with the pulse signal and represents information. A digital signal generating circuit that generates a digital signal, a frequency dividing circuit that divides the frequency of the pulse signal by 1/2, and a parallel-serial conversion that converts the multi-bit digital signal into a serial digital signal using the 1/2 frequency divided pulse signal. a switch circuit that is turned on and off by the serial digital signal, passes one cycle of the sine wave signal, and generates a recording signal converted into a sine wave signal of one cycle corresponding to the serial digital signal; A pulse signal waveform shaping circuit comprising a recording means for recording a signal.
JP16002582A 1982-09-13 1982-09-13 Waveform shaping circuit of pulse signal Granted JPS5949005A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16002582A JPS5949005A (en) 1982-09-13 1982-09-13 Waveform shaping circuit of pulse signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16002582A JPS5949005A (en) 1982-09-13 1982-09-13 Waveform shaping circuit of pulse signal

Publications (2)

Publication Number Publication Date
JPS5949005A JPS5949005A (en) 1984-03-21
JPH033973B2 true JPH033973B2 (en) 1991-01-21

Family

ID=15706334

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16002582A Granted JPS5949005A (en) 1982-09-13 1982-09-13 Waveform shaping circuit of pulse signal

Country Status (1)

Country Link
JP (1) JPS5949005A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62120823A (en) * 1985-11-19 1987-06-02 テンパ−ル工業株式会社 Far infrared heating cooker

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5062616A (en) * 1973-10-05 1975-05-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5062616A (en) * 1973-10-05 1975-05-28

Also Published As

Publication number Publication date
JPS5949005A (en) 1984-03-21

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