JPH04164384A - Hybrid integrated circuit for electric power - Google Patents

Hybrid integrated circuit for electric power

Info

Publication number
JPH04164384A
JPH04164384A JP29157090A JP29157090A JPH04164384A JP H04164384 A JPH04164384 A JP H04164384A JP 29157090 A JP29157090 A JP 29157090A JP 29157090 A JP29157090 A JP 29157090A JP H04164384 A JPH04164384 A JP H04164384A
Authority
JP
Japan
Prior art keywords
substrate
hybrid integrated
electric power
integrated circuit
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29157090A
Other languages
Japanese (ja)
Inventor
Fumiyoshi Matsumura
松村　文好
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP29157090A priority Critical patent/JPH04164384A/en
Publication of JPH04164384A publication Critical patent/JPH04164384A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

PURPOSE:To realize a small-sized hybrid integrated circuit for electric power by coating the surfaces of an Al plate with CU films so as to improve the heat radiating property of the A substrate. CONSTITUTION:Areas 2 are formed on the surfaces of an Al substrate 1 by coating the surfaces with Cu films. A multilayer printed wiring board 3 for control circuit is mounted with an IC 4 for control. The bare chip of an electric power element 5 is directly bonded to the substrate 1. When such a structure is used, a small-sized mounting structure having a good heat transferring property can be realized, since the bare chip of the element 5 is soldered to one Cu surface area 2 on the base of the wiring board 3, namely, the Al substrate 1.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電力用混成集積回路に関し、特に電力用回路
の実装構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power hybrid integrated circuit, and particularly to a mounting structure of a power circuit.

〔従来の技術〕[Conventional technology]

従来の電力用混成集積回路としては、第４図の断面図に
示されるようなプリント配線板ＩＣの上に放熱性を改善
するためのビートシンク７を介して、電力素子５を実装
する構造が一般的であった。A conventional power hybrid integrated circuit has a structure in which a power element 5 is mounted on a printed wiring board IC via a beat sink 7 to improve heat dissipation, as shown in the cross-sectional view of FIG. It was common.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の実装方法では、プリント基板上に電力素
子を搭載するために、大きなヒートシンクを必要とし、
高密度実装を求められる混成集積回路では不利となって
いた。The conventional mounting method described above requires a large heat sink to mount power devices on a printed circuit board.
This was a disadvantage for hybrid integrated circuits that require high-density packaging.

本発明の目的は、このような問題を解決し、電力素子を
ペアチップで使用するに際し、特別のヒートシンクを必
要とせず、更に全体のベースとなるＡｌ基板Ｃｕ化処理
することにより、電力素子の裏面処理が、容易にはんだ
付けによりダイボンディングされるようにした電力用混
成集積回路を提供することにある。The purpose of the present invention is to solve such problems and eliminate the need for a special heat sink when power elements are used as a pair of chips, and furthermore, by processing the Al substrate that serves as the entire base to Cu, the back side of the power element can be The object of the present invention is to provide a power hybrid integrated circuit which can be easily die-bonded by soldering.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の電力用混成集積回路の構成は、Ａｆｌ板の表面
をＣｕ化処理したベース基板と、このベース基板上にそ
れぞれ配設された電力素子部分および制御回路部分を搭
載した多層のガラスエボキシ基板および電力素子部分と
を備え、これらを一体化構成とすることを特徴とする。The configuration of the power hybrid integrated circuit of the present invention includes a base substrate in which the surface of an Afl board is treated with Cu, and a multilayer glass epoxy substrate on which a power element portion and a control circuit portion are respectively disposed on the base substrate. and a power element portion, and is characterized by having an integrated configuration.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例の断面図である。図において
、ＡＪ２基板１はそのＡ、Ｒ表面をカッパライズ処理し
てＣｕ化した領域２としている。また、制御回路用の多
層プリント配線板３は、制御用ＩＣ４を搭載している。FIG. 1 is a sectional view of an embodiment of the present invention. In the figure, the AJ2 substrate 1 has regions 2 in which the A and R surfaces thereof are subjected to a copperization process to become Cu. Moreover, the multilayer printed wiring board 3 for the control circuit is equipped with a control IC 4.

また、電力素子５は、Ａ１基板１へそのペアチップが直
接ボンデインクされている。この構造によれば、ペアチ
ップが直接ベースのＡｌ基板１のＣｕ表面領域２にはん
だ付けされるため、小型で熱伝達の良い実装構造が可能
である。Further, the power element 5 has its paired chips directly bonded to the A1 substrate 1. According to this structure, since the paired chips are directly soldered to the Cu surface region 2 of the base Al substrate 1, a compact mounting structure with good heat transfer is possible.

第２図は本発明の第２の実施例の縦断面図である。この
場合、Ａｆｆｌ基板１ａは、制御回路となる多層プリン
ト配線板３ａが両面実装形式となっているため、部分的
にミーリングが施されている。FIG. 2 is a longitudinal sectional view of a second embodiment of the invention. In this case, the Affl board 1a is partially milled because the multilayer printed wiring board 3a serving as the control circuit is mounted on both sides.

第３図は本発明の第３の実施例の断面図である。この場
合、Ａｌ基板１が電力素子５の極性の違いにより、基板
１ａ、ｌｂと絶縁分離されている。この場合、回路全体
は樹脂ゲース６によって１体化されている。FIG. 3 is a sectional view of a third embodiment of the invention. In this case, the Al substrate 1 is insulated and separated from the substrates 1a and lb due to the difference in polarity of the power element 5. In this case, the entire circuit is integrated by a resin gate 6.

この構造によれば、極性の異る素子や、プロセスの異る
素子等も自由に選択出来る。According to this structure, elements with different polarities, elements with different processes, etc. can be freely selected.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、Ａｌ基板をベースとして
も、表面をカッパライズ処理することにより、高い放熱
性が得られ、そのために、小型の電力用混成集積回路を
容易に実現出来るという効果がある。As explained above, the present invention has the effect that even if an Al substrate is used as a base, high heat dissipation properties can be obtained by coating the surface with copperization treatment, and therefore, a compact power hybrid integrated circuit can be easily realized. be.

【図面の簡単な説明】[Brief explanation of drawings]

第１図、第２図および第３図は本発明の第１゜第２おｊ
び第３の実施例の断面図、第４図は従来の電力用混成集
積ｍｌ路を一例の断面図である。 １、ｌａ、ｌｂ・・・ＡＪＩ基板、１ｃ・・・プリント
配線板、２・・・Ｃｕ表面（Ａｌ基板）領域、３，３ａ
・・・多層プリント配線板、４・・・制御ＩＣｌ３・・
・電力素子、６・・・樹脂ケース、７・・・ヒートシン
ク、８・・・ボンディングワイヤ。FIGS. 1, 2, and 3 show the first and second parts of the present invention.
FIG. 4 is a cross-sectional view of an example of a conventional power hybrid integrated ML path. 1, la, lb... AJI board, 1c... printed wiring board, 2... Cu surface (Al substrate) region, 3, 3a
...Multilayer printed wiring board, 4...Control ICl3...
- Power element, 6... Resin case, 7... Heat sink, 8... Bonding wire.

Claims (1)

【特許請求の範囲】[Claims] 　Ａｌ板の表面をＣｕ化処理したベース基板と、このベ
ース基板上にそれぞれ配設された電力素子部分および制
御回路部分を搭載した多層のガラスエポキシ基板および
電力素子部分とを備え、これらを一体化構成とすること
を特徴とする電力用混成集積回路。It is equipped with a base substrate in which the surface of an Al plate is treated with Cu, and a multilayer glass epoxy substrate and a power element portion each having a power element portion and a control circuit portion disposed on this base substrate, and these are integrated. 1. A power hybrid integrated circuit characterized by having the following configuration.
JP29157090A 1990-10-29 1990-10-29 Hybrid integrated circuit for electric power Pending JPH04164384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29157090A JPH04164384A (en) 1990-10-29 1990-10-29 Hybrid integrated circuit for electric power

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29157090A JPH04164384A (en) 1990-10-29 1990-10-29 Hybrid integrated circuit for electric power

Publications (1)

Publication Number Publication Date
JPH04164384A true JPH04164384A (en) 1992-06-10

Family

ID=17770636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29157090A Pending JPH04164384A (en) 1990-10-29 1990-10-29 Hybrid integrated circuit for electric power

Country Status (1)

Country Link
JP (1) JPH04164384A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0493159U (en) * 1990-12-21 1992-08-13
JPH0567727A (en) * 1991-09-06 1993-03-19 Sansha Electric Mfg Co Ltd Circuit board for semiconductor device
JPH06244303A (en) * 1993-01-27 1994-09-02 Internatl Business Mach Corp <Ibm> Temperature-controllable microminiature electronic package
JPH11307720A (en) * 1998-04-21 1999-11-05 Toyota Autom Loom Works Ltd Semiconductor device
KR100400628B1 (en) * 2000-10-05 2003-10-04 산요덴키가부시키가이샤 Heat-dissipating substrate and semiconductor module
AT512525B1 (en) * 2012-05-04 2013-09-15 Mikroelektronik Ges Mit Beschraenkter Haftung Ab Printed circuit board, in particular for a power electronics module, comprising an electrically conductive substrate

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0493159U (en) * 1990-12-21 1992-08-13
JPH0567727A (en) * 1991-09-06 1993-03-19 Sansha Electric Mfg Co Ltd Circuit board for semiconductor device
JPH06244303A (en) * 1993-01-27 1994-09-02 Internatl Business Mach Corp <Ibm> Temperature-controllable microminiature electronic package
JP2531497B2 (en) * 1993-01-27 1996-09-04 インターナショナル・ビジネス・マシーンズ・コーポレイション Ultra-small electronic package with temperature control
JPH11307720A (en) * 1998-04-21 1999-11-05 Toyota Autom Loom Works Ltd Semiconductor device
KR100400628B1 (en) * 2000-10-05 2003-10-04 산요덴키가부시키가이샤 Heat-dissipating substrate and semiconductor module
AT512525B1 (en) * 2012-05-04 2013-09-15 Mikroelektronik Ges Mit Beschraenkter Haftung Ab Printed circuit board, in particular for a power electronics module, comprising an electrically conductive substrate
AT512525A4 (en) * 2012-05-04 2013-09-15 Mikroelektronik Ges Mit Beschraenkter Haftung Ab Printed circuit board, in particular for a power electronics module, comprising an electrically conductive substrate
US9648736B2 (en) 2012-05-04 2017-05-09 A.B. Mikroelektronik Gesellschaft Mit Beschraenkter Haftung Circuit board, particularly for a power-electronic module, comprising an electrically-conductive substrate
US10091874B2 (en) 2012-05-04 2018-10-02 Ab Mikroelektronik Gesellschaft Mit Beschraenkter Haftung Circuit board, particulary for a power-electronic module, comprising an electrically-conductive substrate
EP2845453B1 (en) * 2012-05-04 2019-06-12 A.B. Mikroelektronik Gesellschaft mit beschränkter Haftung Circuit board, particularly for a power-electronic module, comprising an electrically-conductive substrate

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