JPH04158539A - Semiconductor device and bonding method therefor - Google Patents
Semiconductor device and bonding method thereforInfo
- Publication number
- JPH04158539A JPH04158539A JP2285020A JP28502090A JPH04158539A JP H04158539 A JPH04158539 A JP H04158539A JP 2285020 A JP2285020 A JP 2285020A JP 28502090 A JP28502090 A JP 28502090A JP H04158539 A JPH04158539 A JP H04158539A
- Authority
- JP
- Japan
- Prior art keywords
- protective film
- wafer
- organic protective
- electrode part
- passivation film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000000034 method Methods 0.000 title claims description 6
- 230000001681 protective effect Effects 0.000 claims abstract description 29
- 238000002161 passivation Methods 0.000 claims abstract description 21
- 238000003825 pressing Methods 0.000 claims description 8
- 238000007254 oxidation reaction Methods 0.000 abstract description 5
- 239000004642 Polyimide Substances 0.000 abstract description 4
- 229920001721 polyimide Polymers 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 2
- 230000003647 oxidation Effects 0.000 description 4
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000004814 polyurethane Substances 0.000 description 1
- 229920002635 polyurethane Polymers 0.000 description 1
- 230000009993 protective function Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8536—Bonding interfaces of the semiconductor or solid state body
- H01L2224/85375—Bonding interfaces of the semiconductor or solid state body having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はウェハ表面に電極部とパッシベーション膜とが
形成された半導体装置とこれにおけるボンディング方法
に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device in which an electrode portion and a passivation film are formed on the surface of a wafer, and a bonding method therefor.
従来の技術
ウェハの表面には、第4図に示すように、半導体装置と
外部との電気的接続をとるための電極部51が形成され
るが、前記ウェハ52に耐湿性を付与するため、SiO
□やSi3N4などからなるパッシベーション膜53が
前記表面上に形成される。BACKGROUND ART As shown in FIG. 4, an electrode portion 51 is formed on the surface of a wafer for electrically connecting the semiconductor device to the outside.In order to impart moisture resistance to the wafer 52, SiO
A passivation film 53 made of □, Si3N4, etc. is formed on the surface.
発明が解決しようとする課題
しかし上記従来例では、パッシベーション膜によって電
極部を被覆するとボンディング時に前記電極部との接合
が困難になるため、電極部をそのまま外気にさらさなけ
ればならず、電極部が酸化し易いという問題がある。Problems to be Solved by the Invention However, in the conventional example described above, if the electrode part is covered with a passivation film, it becomes difficult to bond with the electrode part during bonding, so the electrode part must be exposed to the outside air as it is, and the electrode part is There is a problem that it is easily oxidized.
又パッシベーション膜には、第4図に示すようなピンホ
ール54が形成され易く、このピンホール54を通して
ウェハ52表面が外気に触れるため、ウェハ52の耐湿
性が不十分であるという問題もある。In addition, pinholes 54 as shown in FIG. 4 are likely to be formed in the passivation film, and the surface of the wafer 52 is exposed to the outside air through the pinholes 54, resulting in the problem that the moisture resistance of the wafer 52 is insufficient.
本発明は上記問題点に鑑み、電極部の酸化を防止するこ
とができると共にウェハの耐湿性を向上させることがで
き、しかも前記電極部に対する接合の容易な半導体装置
を提供することを目的とする。In view of the above-mentioned problems, an object of the present invention is to provide a semiconductor device that can prevent oxidation of the electrode portion, improve the moisture resistance of the wafer, and can be easily bonded to the electrode portion. .
課題を解決するための手段
本願の半導体装置に関する第1発明は、ウェハ上に形成
された電極部及びパッシベーション膜を、有機保護膜で
被覆したことを特徴とする。尚、電極部に有機保護膜の
前記電極部以外の部位表面から突出する突起部を設ける
と、ボンディングを行う上で好適である。Means for Solving the Problems A first invention related to a semiconductor device of the present application is characterized in that an electrode portion and a passivation film formed on a wafer are covered with an organic protective film. Note that it is preferable to provide the electrode portion with a protrusion that protrudes from the surface of a portion of the organic protective film other than the electrode portion for bonding.
本願の上記半導体装置におけるボンディング方法に関す
る第2発明は、有機保護膜を介して電極部にボンディン
グツールを押当て加圧することにより、有機保護膜の前
記電極部に対応する部位を破壊することによってボンデ
ィングすることを特徴とする。A second invention related to the bonding method for the semiconductor device of the present application is such that bonding is performed by pressing a bonding tool against the electrode portion through the organic protective film and applying pressure to destroy the portion of the organic protective film corresponding to the electrode portion. It is characterized by
作用
上記構成によれば、パッシベーション膜が被覆されてい
ない電極部を有機保護膜によって被覆することにより、
電極部の外気との接触を遮断することができるので、前
記電極部の酸化を防ぐことができる。又有機保護膜がパ
ッシベーション膜のピンホール内に入り込んでこれを埋
めることにより、ウェハ表面と外気との連通を遮断する
ことができ、しかも前記有機保護膜は耐湿性を有するの
で、ウェハの耐湿性を向上させることができる。更にウ
ェハ表面の略全面をパッシベーション膜と有機保護膜と
ムこよって2重に被覆することにより、前記表面の保護
機能を高めることができる。Effects According to the above configuration, by covering the electrode portion not covered with the passivation film with the organic protective film,
Since the electrode portion can be cut off from contact with the outside air, oxidation of the electrode portion can be prevented. In addition, the organic protective film can penetrate into the pinholes of the passivation film and fill them, thereby blocking communication between the wafer surface and the outside air.Moreover, since the organic protective film has moisture resistance, the moisture resistance of the wafer can be reduced. can be improved. Furthermore, by doubly covering substantially the entire surface of the wafer with a passivation film and an organic protective film, the protective function of the surface can be enhanced.
ところでこのような有機保護膜は、機械的強度が弱いと
いう特徴を有する。従ってボンディング時はボンディン
グツールを有機保護膜の電極部に対応する部位に押当て
て加圧することにより、この部位を容易に破壊すること
ができるので、前記電極部に対する接合を容易に行うこ
とができる。尚、この場合、電極部に有機保護膜の前記
電極部以外の部位表面から外部に突出する突起部を予め
又は後付けで形成しておけば、前記突起部にボンディン
グツールを押当てる際、電極部まわりの有機保護層やパ
ッジベージジン膜に傷を付けたり誤って破壊するといっ
た事態を回避することができる。However, such an organic protective film is characterized by low mechanical strength. Therefore, during bonding, by pressing the bonding tool against the part of the organic protective film corresponding to the electrode part and applying pressure, this part can be easily destroyed, so that bonding to the electrode part can be easily performed. . In this case, if a protrusion protruding outward from the surface of the organic protective film other than the electrode part is formed in advance or afterward on the electrode part, when the bonding tool is pressed against the protrusion, the electrode part It is possible to avoid situations where the surrounding organic protective layer or padding film is damaged or accidentally destroyed.
実施例
本発明の実施例を、第1図ないし第3図に基き説明する
6
ウェハ1の表面にAl製の電極部2を形成し、ウェハl
の前記電極部20周縁を含む部位表面に、Singや5
iJsなどからなるI−1,3μm厚のパッシベーショ
ン膜3を形成した後、これらパッシベーション膜3及び
電極部2の露呈面全体を、第1図に示すように、ポリイ
ミドからなる1μm厚の有機保護膜4で被覆した。Embodiment 6 An embodiment of the present invention will be explained based on FIGS. 1 to 3. 6 An electrode part 2 made of Al is formed on the surface of a wafer 1
The surface of the area including the periphery of the electrode portion 20 is coated with
After forming a passivation film 3 made of iJs or the like with a thickness of 1 μm, the entire exposed surface of the passivation film 3 and the electrode portion 2 is covered with an organic protective film made of polyimide with a thickness of 1 μm, as shown in FIG. 4.
この有機保護膜4により電極部2の表面を被覆すること
ができるので、前記電極部2の酸化を防止することがで
きる。又有機保護膜4がその形成時にパッシベーション
83のピンホール3aに流入してこれを埋めることがで
きるので、前記とンホール3aを通して外部の湿気がウ
ェハ1の表面に達するのを防止することができ、半導体
装置の耐湿性を向上させることができる。Since the surface of the electrode section 2 can be covered with this organic protective film 4, oxidation of the electrode section 2 can be prevented. Furthermore, since the organic protective film 4 can flow into and fill the pinholes 3a of the passivation 83 during its formation, it is possible to prevent external moisture from reaching the surface of the wafer 1 through the pinholes 3a. The moisture resistance of a semiconductor device can be improved.
有機保護膜4の製膜方法としてはスピンコードによって
ポリイミド液をウェハ1の表面上に均一に延ばした後、
これを100〜150°Cで1〜3時間加熱して硬化さ
せる。尚、有機保護膜4の素材としては前記ポリイミド
のほか、ポリウレタン、PPS (ポリフェニレンサル
ファイド)、エポキシなどの熱硬化性有機物や熱可塑性
有機物を用いることができ、製膜の方法や条件も用いる
素材などに応じて適宜選択することができる。The method for forming the organic protective film 4 is to uniformly spread a polyimide solution over the surface of the wafer 1 using a spin cord, and then
This is cured by heating at 100 to 150°C for 1 to 3 hours. In addition to the above-mentioned polyimide, the material for the organic protective film 4 may be a thermosetting organic substance or a thermoplastic organic substance such as polyurethane, PPS (polyphenylene sulfide), or epoxy, and the film forming method and conditions also vary. It can be selected as appropriate.
ボンディング時は、第2図に示すように、ボンディング
ツール5の下端面5aをボンディングワイヤ6と共に電
極部2に有機保護膜4を介して押当て、ボンディングツ
ール5の加圧力により、更には必要に応じて超音波や1
50〜260°C程度の加熱などを併用し、有機保護膜
4の前記部位を破壊して前記ワイヤ6を前記電極部2に
接合することができる。At the time of bonding, as shown in FIG. Ultrasound or 1 depending on
The wire 6 can be joined to the electrode portion 2 by destroying the portion of the organic protective film 4 by heating at about 50 to 260° C. or the like.
ところでボンディングツール5を有機保護膜4に押当て
る際、ボンディングツール5の加圧面5aが電極部2ま
わりの部位に接触すると、その部位の有機保護膜4やパ
ッシベーション膜3に傷を付けたり破壊するおそれがあ
る。これに対しては、第3図に示すように、電極部2に
バンブ(突起部) 2aを設けておき、このバンプ2a
に向けてボンディングツール5を押当てることによって
、前記加圧面5aが前記部位に接触するのを回避するこ
とができる。By the way, when the bonding tool 5 is pressed against the organic protective film 4, if the pressurizing surface 5a of the bonding tool 5 comes into contact with the area around the electrode part 2, the organic protective film 4 and the passivation film 3 in that area may be damaged or destroyed. There is a risk. To deal with this, as shown in FIG. 3, a bump (projection) 2a is provided on the electrode portion 2,
By pressing the bonding tool 5 toward the area, the pressing surface 5a can be prevented from coming into contact with the area.
その後、一連の工程を経て得られた電子部品は表面が有
機保護膜4によって保護されているので、これら電子部
品をテープ状体に1列状に収容してテープ状部品集合体
を形成する場合、パッシベーション膜2の擦れを防止す
ることができ、電子部品の耐湿性に対する信輔度を高め
ることができる。After that, the surface of the electronic components obtained through a series of steps is protected by the organic protective film 4, so when these electronic components are housed in a tape-shaped body in a row to form a tape-shaped component assembly. , it is possible to prevent the passivation film 2 from being rubbed, and the reliability of the moisture resistance of the electronic component can be increased.
本発明は上記実施例に示すほか、種々の態様に構成する
ことができる。例えば上記実施例では突起部を電極上に
後付けしているが、電極部が突起部を予め備えたもので
あっても良い。The present invention can be configured in various ways other than those shown in the above embodiments. For example, in the above embodiments, the protrusions are attached on the electrodes afterwards, but the electrodes may be provided with the protrusions in advance.
発明の効果
本発明は上記構成、作用を有するので、電極部の酸化を
防止することができると共にパッシベーション膜のピン
ホールを埋めてウェハの耐湿性を向上させることができ
、しかも前記電極部に対する接合を容易に行うことがで
きる。Effects of the Invention Since the present invention has the above-described structure and operation, it is possible to prevent oxidation of the electrode portion, fill pinholes in the passivation film and improve the moisture resistance of the wafer, and furthermore, it is possible to improve the moisture resistance of the wafer by filling the pinholes in the passivation film. can be easily done.
第1図は本発明の実施例の要部縦断面図、第2図はその
ボンディング時の要部縦断面図、第3図は変形例におけ
るボンディング時の要部縦断面図、第4図は従来例の要
部縦断面図である。
1−−−−−−一・−・−・ウェハ
2・−・−−−−−一−−−−−−−・−電極部2 a
−−−−−・−・・・−突起部
3・・−一−−−・−−一−−−−−・・−パッシベー
ション膜4・・・・−−−−−−−一・・・−・・・有
機保護膜5−−−−−−−−−−−−−一−−・ボンデ
ィングツール代理人 弁理士 小鍜治 明 ほか2名拍
1 図
5−・−求ンう〉ブラーlし
第3図
2a−一亥起邦
第4図FIG. 1 is a longitudinal sectional view of the main part of an embodiment of the present invention, FIG. 2 is a longitudinal sectional view of the main part during bonding, FIG. 3 is a longitudinal sectional view of the main part during bonding in a modified example, and FIG. FIG. 2 is a vertical cross-sectional view of a main part of a conventional example. 1--------1・--・Wafer 2・-------1-----------・-Electrode part 2 a
−−−−−・−・−Protrusion 3・・−1−−−・−−1−−−−−・・−Passivation film 4・・−−−−−−−1・・・−・Organic protective film 5−−−−−−−−−−−−−−1−−・Bonding tool representative Patent attorney Akira Okaji and 2 others 1 Figure 5−・−Kunu〉Blur Fig. 3 2a - Ichigo Kibo Fig. 4
Claims (3)
ン膜を、有機保護膜で被覆したことを特徴とする半導体
装置。(1) A semiconductor device characterized in that an electrode portion and a passivation film formed on a wafer are covered with an organic protective film.
ら突出する突起部を備えたものである請求項1記載の半
導体装置。(2) The semiconductor device according to claim 1, wherein the electrode portion includes a protrusion projecting from a surface of a portion of the organic protective film other than the electrode portion.
を押当て加圧することにより、有機保護膜の前記電極部
に対応する部位を破壊してボンディングすることを特徴
とする請求項1記載の半導体装置におけるボンディング
方法。(3) The semiconductor according to claim 1, wherein the bonding is performed by pressing a bonding tool against the electrode portion through the organic protective film and applying pressure to destroy the portion of the organic protective film corresponding to the electrode portion. Bonding method in equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2285020A JP2529459B2 (en) | 1990-10-22 | 1990-10-22 | Semiconductor device and bonding method therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2285020A JP2529459B2 (en) | 1990-10-22 | 1990-10-22 | Semiconductor device and bonding method therefor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04158539A true JPH04158539A (en) | 1992-06-01 |
JP2529459B2 JP2529459B2 (en) | 1996-08-28 |
Family
ID=17686119
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2285020A Expired - Fee Related JP2529459B2 (en) | 1990-10-22 | 1990-10-22 | Semiconductor device and bonding method therefor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2529459B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04237133A (en) * | 1991-01-22 | 1992-08-25 | Matsushita Electric Ind Co Ltd | Metallic bump formation method and bonding method of electron chip component |
JP2008004598A (en) * | 2006-06-20 | 2008-01-10 | Sanyo Electric Co Ltd | Dicing device, dicing method, semiconductor device, and manufacturing method thereof |
JP2012500487A (en) * | 2008-08-18 | 2012-01-05 | センブラント グローバル リミテッド | Halohydrocarbon polymer coating |
-
1990
- 1990-10-22 JP JP2285020A patent/JP2529459B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04237133A (en) * | 1991-01-22 | 1992-08-25 | Matsushita Electric Ind Co Ltd | Metallic bump formation method and bonding method of electron chip component |
JP2008004598A (en) * | 2006-06-20 | 2008-01-10 | Sanyo Electric Co Ltd | Dicing device, dicing method, semiconductor device, and manufacturing method thereof |
JP2012500487A (en) * | 2008-08-18 | 2012-01-05 | センブラント グローバル リミテッド | Halohydrocarbon polymer coating |
Also Published As
Publication number | Publication date |
---|---|
JP2529459B2 (en) | 1996-08-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3577419B2 (en) | Semiconductor device and manufacturing method thereof | |
JP2002510929A (en) | Surface acoustic wave device package and method | |
JPH10321666A (en) | Resin sealing structure of flip chip mounting type semiconductor element | |
JPH04158539A (en) | Semiconductor device and bonding method therefor | |
JP3486872B2 (en) | Semiconductor device and manufacturing method thereof | |
JP2000164761A (en) | Semiconductor device and manufacture thereof | |
JPH0722454A (en) | Semiconductor integrated circuit device | |
JP2856220B2 (en) | Manufacturing method and bonding method for electronic chip parts | |
KR970072337A (en) | Lead-on chip-type semiconductor chip package using incomplete hardened state of polyimide and method of attaching semiconductor chip | |
JP4356137B2 (en) | Manufacturing method of semiconductor device | |
JPH1140601A (en) | Structure of semiconductor device | |
JPS61147555A (en) | Semiconductor device | |
JP3012809B2 (en) | Method for forming electrode structure of semiconductor device | |
JP3099864B2 (en) | Circuit device having semiconductor element and method of manufacturing the same | |
JP3699271B2 (en) | Semiconductor package and manufacturing method thereof | |
JP2004179590A (en) | Semiconductor device and its manufacturing method | |
JP2505314B2 (en) | Method for forming metal bump on electronic chip component | |
JPH11145345A (en) | Semiconductor device and its manufacture | |
JPH0442922Y2 (en) | ||
JPH1187572A (en) | Resin sealed semiconductor device and production thereof | |
JP2914569B1 (en) | Semiconductor device mounting method and its mounting body | |
JPS62229949A (en) | Manufacture of resin-sealed semiconductor | |
JP3220524B2 (en) | Bare chip | |
JP3145892B2 (en) | Resin-sealed semiconductor device | |
JP2002208602A (en) | Semiconductor package and its manufacturing method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |