JP2529459B2 - Semiconductor device and bonding method therefor - Google Patents
Semiconductor device and bonding method thereforInfo
- Publication number
- JP2529459B2 JP2529459B2 JP2285020A JP28502090A JP2529459B2 JP 2529459 B2 JP2529459 B2 JP 2529459B2 JP 2285020 A JP2285020 A JP 2285020A JP 28502090 A JP28502090 A JP 28502090A JP 2529459 B2 JP2529459 B2 JP 2529459B2
- Authority
- JP
- Japan
- Prior art keywords
- protective film
- organic protective
- wafer
- electrode
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8536—Bonding interfaces of the semiconductor or solid state body
- H01L2224/85375—Bonding interfaces of the semiconductor or solid state body having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明はウエハ表面に電極部とパッシベーション膜と
が形成された半導体装置とこれにおけるボンディング方
法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which an electrode portion and a passivation film are formed on a wafer surface, and a bonding method therefor.
従来の技術 ウエハの表面には、第４図に示すように、半導体装置
と外部との電気的接続をとるための電極部51が形成され
るが、前記ウエハ52に耐湿性を付与するため、SiO2やSi
3N4などからなるパッシベーション膜53が前記表面上に
形成される。2. Description of the Related Art On the surface of a wafer, as shown in FIG. 4, an electrode portion 51 for electrically connecting a semiconductor device to the outside is formed. However, in order to impart moisture resistance to the wafer 52, SiO 2 and Si
A passivation film 53 of 3 N 4 or the like is formed on the surface.
発明が解決しようとする課題 しかし上記従来例では、パッシベーション膜によって
電極部を被覆するとボンディング時に前記電極部との接
合が困難になるため、電極部をそのまま外気にさらさな
ければならず、電極部が酸化し易いという問題がある。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the above-mentioned conventional example, when the electrode portion is covered with the passivation film, it becomes difficult to bond with the electrode portion at the time of bonding. There is a problem that it is easily oxidized.
又パッシベーション膜には、第４図に示すようなピン
ホール54が形成され易く、このピンホール54を通してウ
エハ52表面が外気に触れるため、ウエハ52の耐湿性が不
十分であるという問題もある。Further, a pinhole 54 as shown in FIG. 4 is easily formed in the passivation film, and the surface of the wafer 52 is exposed to the outside air through the pinhole 54, so that the moisture resistance of the wafer 52 is insufficient.
本発明は上記問題点に鑑み、電極部の酸化を防止する
ことができると共にウエハの耐湿性を向上させることが
でき、しかも前記電極部に対する接合の容易な半導体装
置を提供することを目的とする。In view of the above problems, it is an object of the present invention to provide a semiconductor device which can prevent the oxidation of the electrode portion and can improve the moisture resistance of the wafer and can be easily bonded to the electrode portion. .
課題を解決するための手段 本願は、ウエハ上に形成された電極部及びパッシベー
ション膜を有機保護膜で被覆し、かつ、前記有機保護膜
の電極部以外の部位表面から突出する突起部を備えた半
導体装置であり、また、ウエハ上に形成された電極部に
ワイヤボンデイングする方法においては、前記電極部及
びパッシベーション膜を有機保護膜で被覆し、前記電極
部に有機保護膜を介してボンデイングツールを押当て加
圧することにより、有機保護膜の前記電極部に対応する
部位を破壊して、そのまま同一のボンデイングツールに
てワイヤボンデイングすることを特徴とする。Means for Solving the Problems The present application includes an electrode portion and a passivation film formed on a wafer covered with an organic protective film, and a projection portion protruding from the surface of the portion other than the electrode portion of the organic protective film. In a method of wire bonding to an electrode part formed on a wafer, which is a semiconductor device, the electrode part and the passivation film are covered with an organic protective film, and a bonding tool is applied to the electrode part through the organic protective film. It is characterized in that the portion corresponding to the electrode portion of the organic protective film is destroyed by pressing and pressurizing, and the wire bonding is performed with the same bonding tool as it is.
作 用 上記構成によれば、パッシベーション膜が被覆されて
いない電極部を有機保護膜によって被覆することによ
り、電極部の外気との接触を遮断することができるの
で、前記電極部の酸化を防ぐことができる。又有機保護
膜がパッシベーション膜のピンホール内に入り込んでこ
れを埋めることにより、ウエハ表面と外気との連通を遮
断することができ、しかも前記有機保護膜は耐湿性を有
するので、ウエハの耐湿性を向上させることができる。
更にウエハ表面の略全面をパッシベーション膜と有機保
護膜とによって２重に被覆することにより、前記表面の
保護機能を高めることができる。Operation According to the above configuration, by covering the electrode portion not covered with the passivation film with the organic protective film, the contact of the electrode portion with the outside air can be blocked, so that the electrode portion is prevented from being oxidized. You can Further, the organic protective film enters the pinhole of the passivation film and fills the pinhole, so that the communication between the wafer surface and the outside air can be blocked, and since the organic protective film has moisture resistance, the moisture resistance of the wafer can be improved. Can be improved.
Furthermore, the substantially entire surface of the wafer is doubly covered with the passivation film and the organic protective film, whereby the protective function of the surface can be enhanced.
ところでこのような有機保護膜は、機械的強度が弱い
という特徴を有する。従ってボンディング時はボンディ
ングツールを有機保護膜の電極部に対応する部位に押当
てて加圧することにより、この部位を容易に破壊するこ
とができるので、前記電極部に対する接合を容易に行う
ことができる。尚、この場合、電極部に有機保護膜の前
記電極部以外の部位表面から外部に突出する突起部を予
め又は後付けで形成しておけば、前記突起部にボンディ
ングツールを押当てる際、電極部まわりの有機保護層や
パッシベーション膜に傷を付けたり誤って破壊するとい
った事態を回避することができる。By the way, such an organic protective film has a characteristic that mechanical strength is weak. Therefore, at the time of bonding, the bonding tool is pressed against the portion of the organic protective film corresponding to the electrode portion to pressurize the portion, so that the portion can be easily broken, and thus the electrode portion can be easily joined. . In addition, in this case, if a protrusion protruding outward from the surface of the part other than the electrode part of the organic protective film is formed in the electrode part in advance or afterwards, when the bonding tool is pressed against the protrusion part, the electrode part It is possible to avoid a situation where the surrounding organic protective layer or the passivation film is scratched or accidentally destroyed.
実施例 本発明の実施例を、第１図ないし第３図に基き説明す
る。Embodiment An embodiment of the present invention will be described with reference to FIGS.
ウエハ１の表面にAl製の電極部２を形成し、ウエハ１
の前記電極部２の周縁を含む部位表面に、SiO2やSi3N4
などからなる１〜1.3μｍ厚のパッシベーション膜３を
形成した後、これらパッシベーション膜３及び電極部２
の露呈面全体を、第１図に示すように、ポリイミドから
なる１μｍ厚の有機保護膜４で被覆した。The electrode part 2 made of Al is formed on the surface of the wafer 1, and the wafer 1
Of SiO 2 or Si 3 N 4 on the surface of the part including the periphery of the electrode part 2 of
After forming the passivation film 3 having a thickness of 1 to 1.3 μm made of, for example, the passivation film 3 and the electrode portion 2
As shown in FIG. 1, the entire exposed surface of 1 was covered with a 1 μm thick organic protective film 4 made of polyimide.
この有機保護膜４により電極部２の表面を被覆するこ
とができるので、前記電極部２の酸化を防止することが
できる。又有機保護膜４がその形成時にパッシベーショ
ン膜３のピンホール3aに流入してこれを埋めることがで
きるので、前記ピンホール3aを通して外部の湿気がウエ
ハ１の表面に達するのを防止することができ、半導体装
置の耐湿性を向上させることができる。Since the surface of the electrode part 2 can be covered with this organic protective film 4, the oxidation of the electrode part 2 can be prevented. Further, since the organic protective film 4 can flow into the pinhole 3a of the passivation film 3 and fill the organic protective film 4 when it is formed, it is possible to prevent external moisture from reaching the surface of the wafer 1 through the pinhole 3a. Therefore, the moisture resistance of the semiconductor device can be improved.
有機保護膜４の製膜方法としてはスピンコートによっ
てポリイミド液をウエハ１の表面上に均一に延ばした
後、これを100〜150℃で１〜３時間加熱して硬化させ
る。尚、有機保護膜４の素材としては前記ポリイミドの
ほか、ポリウレタン、PPS（ポリフェニレンサルファイ
ド）、エポキシなどの熱硬化性有機物や熱可塑性有機物
を用いることができ、製膜の方法や条件も用いる素材な
どに応じて適宜選択することができる。As a method of forming the organic protective film 4, a polyimide solution is uniformly spread on the surface of the wafer 1 by spin coating, and then heated at 100 to 150 ° C. for 1 to 3 hours to be cured. As the material of the organic protective film 4, in addition to the above-mentioned polyimide, a thermosetting organic material such as polyurethane, PPS (polyphenylene sulfide), epoxy or a thermoplastic organic material can be used. It can be selected as appropriate.
ボンディング時は、第２図に示すように、ボンディン
グツール５の下端面5aをボンディングワイヤ６と共に電
極部２に有機保護膜４を介して押当て、ボンディングツ
ール５の加圧力により、更には必要に応じて超音波や15
0〜260℃程度の加熱などを併用し、有機保護膜４の前記
部位を破壊して前記ワイヤ６を前記電極部２に接合する
ことができる。At the time of bonding, as shown in FIG. 2, the lower end surface 5a of the bonding tool 5 is pressed together with the bonding wire 6 against the electrode portion 2 through the organic protective film 4, and the pressing force of the bonding tool 5 makes it more necessary. Ultrasonic or 15 depending
It is possible to bond the wire 6 to the electrode portion 2 by destroying the portion of the organic protective film 4 by also using heating at about 0 to 260 ° C. or the like.
ところでボンディングツール５を有機保護膜４に押当
てる際、ボンディングツール５の加圧面5aが電極部２ま
わりの部位に接触すると、その部位の有機保護膜４やパ
ッシベーション膜３に傷を付けたり破壊するおそれがあ
る。これに対しては、第３図に示すように、電極部２に
バンプ（突起部）2aを設けておき、このバンプ2aに向け
てボンディングツール５を押当てることによって、前記
加圧面5aが前記部位に接触するのを回避することができ
る。By the way, when the pressing surface 5a of the bonding tool 5 comes into contact with a portion around the electrode portion 2 when the bonding tool 5 is pressed against the organic protective film 4, the organic protective film 4 and the passivation film 3 at that portion are damaged or destroyed. There is a risk. On the other hand, as shown in FIG. 3, bumps (projections) 2a are provided on the electrode portion 2 and the bonding tool 5 is pressed against the bumps 2a, so that the pressing surface 5a is Contact with the site can be avoided.
その後、一連の工程を経て得られた電子部品は表面が
有機保護膜４によって保護されているので、これら電子
部品をテープ状体に１列状に収容してテープ状部品集合
体を形成する場合、パッシベーション膜２の擦れを防止
することができ、電子部品の耐湿性に対する信頼度を高
めることができる。After that, since the surface of the electronic component obtained through a series of steps is protected by the organic protective film 4, when these electronic components are accommodated in a tape-shaped body in one row, a tape-shaped component assembly is formed. It is possible to prevent rubbing of the passivation film 2 and increase the reliability of the moisture resistance of the electronic component.
本発明は上記実施例に示すほか、種々の態様に構成す
ることができる。例えば上記実施例では突起部を電極上
に後付けしているが、電極部が突起部を予め備えたもの
であっても良い。The present invention can be constructed in various modes in addition to the above-mentioned embodiments. For example, in the above-described embodiment, the protrusion is attached to the electrode afterwards, but the electrode may be provided with the protrusion in advance.
発明の効果 本発明は上記構成、作用を有するので、電極部の酸化
を防止することができると共にパッシベーション膜のピ
ンホールを埋めてウエハの耐湿性を向上させることがで
き、しかも前記電極部に対する接合を容易に行うことが
できる。EFFECTS OF THE INVENTION Since the present invention has the above-described structure and action, it is possible to prevent oxidation of the electrode part, fill the pinholes of the passivation film, and improve the moisture resistance of the wafer, and further, to bond to the electrode part. Can be done easily.
第１図は本発明の実施例の要部縦断面図、第２図はその
ボンディング時の要部縦断面図、第３図は本発明の実施
例における突起部を備えた半導体装置の要部縦断面図、
第４図は従来例の要部縦断面図である。 １……ウエハ ２……電極部 2a……突起部 ３……パッシベーション膜 ４……有機保護膜 ５……ボンディングツールFIG. 1 is a longitudinal sectional view of an essential part of an embodiment of the present invention, FIG. 2 is a longitudinal sectional view of an essential part at the time of bonding, and FIG. 3 is an essential part of a semiconductor device having a protrusion in the embodiment of the present invention. Longitudinal section,
FIG. 4 is a longitudinal sectional view of a main part of a conventional example. 1 ... Wafer 2 ... Electrode 2a ... Projection 3 ... Passivation film 4 ... Organic protective film 5 ... Bonding tool
───────────────────────────────────────────────────── フロントページの続き (72)発明者 秋口 尚士 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 昭62−214625（ＪＰ，Ａ) 特開 昭60−121723（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Naoji Akiguchi 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP 62-214625 (JP, A) JP 60- 121723 (JP, A)
Claims (2)
ーション膜を、有機保護膜で被覆し、かつ、前記有機保
護膜の電極部以外の部位表面から突出する突起部を備え
たことを特徴とする半導体装置。1. An electrode portion and a passivation film formed on a wafer are covered with an organic protective film, and a projection portion protruding from a surface other than the electrode portion of the organic protective film is provided. Semiconductor device.
デイングする方法において、前記電極部及びパッシベー
ション膜を有機保護膜で被覆し、前記電極部に有機保護
膜を介してボンデイングツールを押当て加圧することに
より、有機保護膜の前記電極部に対応する部位を破壊し
て、そのまま同一のボンデイングツールにてワイヤボン
デイングすることを特徴とするボンデイング方法。2. A method of wire bonding to an electrode part formed on a wafer, wherein the electrode part and the passivation film are covered with an organic protective film, and a bonding tool is pressed against the electrode part through the organic protective film. A bonding method characterized by destroying a portion of the organic protective film corresponding to the electrode portion by pressing and wire-bonding as it is with the same bonding tool.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2285020A JP2529459B2 (en) | 1990-10-22 | 1990-10-22 | Semiconductor device and bonding method therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2285020A JP2529459B2 (en) | 1990-10-22 | 1990-10-22 | Semiconductor device and bonding method therefor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04158539A JPH04158539A (en) | 1992-06-01 |
| JP2529459B2 true JP2529459B2 (en) | 1996-08-28 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2285020A Expired - Fee Related JP2529459B2 (en) | 1990-10-22 | 1990-10-22 | Semiconductor device and bonding method therefor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2529459B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2505314B2 (en) * | 1991-01-22 | 1996-06-05 | 松下電器産業株式会社 | Method for forming metal bump on electronic chip component |
| JP4861072B2 (en) * | 2006-06-20 | 2012-01-25 | オンセミコンダクター・トレーディング・リミテッド | Semiconductor device and manufacturing method thereof |
| CA2957997C (en) * | 2008-08-18 | 2019-10-22 | Semblant Limited | Halo-hydrocarbon polymer coating |
-
1990
- 1990-10-22 JP JP2285020A patent/JP2529459B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04158539A (en) | 1992-06-01 |
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| Date | Code | Title | Description |
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| LAPS | Cancellation because of no payment of annual fees |