JPH04157720A - Sputtering method - Google Patents

Sputtering method

Info

Publication number
JPH04157720A
JPH04157720A JP28318390A JP28318390A JPH04157720A JP H04157720 A JPH04157720 A JP H04157720A JP 28318390 A JP28318390 A JP 28318390A JP 28318390 A JP28318390 A JP 28318390A JP H04157720 A JPH04157720 A JP H04157720A
Authority
JP
Japan
Prior art keywords
sputtering
substrate
resistance value
thin film
processed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28318390A
Other languages
Japanese (ja)
Inventor
Hideo Niwa
丹羽 秀夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP28318390A priority Critical patent/JPH04157720A/en
Publication of JPH04157720A publication Critical patent/JPH04157720A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a sputtering method which can control the thickness of a sputtered film automatically and with high accuracy by a method wherein a growth operation is stopped at the point of time when the resistance value of a conductive thin film formed by a sputtering operation has reached the resistance value at a prescribed film thickness of a conductive film which is sputtered and grown on a dummy substrate or on an insulating film. CONSTITUTION:A prescribed DC voltage is applied across a lid plate 6, substrate holders 7A to 7D which are conductive to the lid plate 6 and substrates 15, to be treated, which are loaded on them. A shutter 8 is opened; an Al target 10 on a target electrode (cathode 3) is sputtered; Al thin films are grown on the substrates 15 to be treated. At this time, the target is sputtered while the resistance value of an Al thin film grown on an insulating substrate 9 for measuring use is being measured simultaneously on the substrates 15 to be treated. The point of time when the resistance value has reached the resistance value of an Al thin film having a prescribed film thickness is detected by using a comparison circuit or the like. The shutter 8 is closed automatically by using a driving gear; a sputtering power supply is cut off; the sputtering operation is stopped. Thereby, the thickness of the Al thin films grown on the substrates 15 to be treated can be formed in a desired thickness with good accuracy.

Description

【発明の詳細な説明】 〔概 要〕 スパッタリング方法、特に導電性薄膜のスパッタリング
方法に関し、 時間や人手をかけずに、自動的に且つ高精度にスパッタ
膜厚を制御することが可能なスパッタリング方法を提供
することを目的とし、 被処理基板上に所定膜厚を有する導電性薄膜をスパッタ
リング法により形成するに際して、該被処理基板の近傍
に配置した絶縁物表面を有するダミー基体上若しくは該
被処理基板の絶縁膜上にスパッタ成長された導電性薄膜
の抵抗値を測定しながらスパッタリングを行い、該導電
性薄膜の抵抗値が該導電性薄膜の所定膜厚時の抵抗値に
達した時点で成長を停止する構成、若しくは、枚葉式ス
パッタリング装置を用い複数の被処理基板上に所定膜厚
を有する導電性薄膜を連続して成長せしめるに際して、
被処理基板の近傍に、絶縁物表面を有するダミー基体を
該被処理基板1枚毎に順次送り出し、該被処理基板上と
同時に該ダミー基体上に成長する該導電性薄膜の抵抗値
を測定しながらスパッタリングを行い、該導電性薄膜の
抵抗値が該導電性薄膜の所定膜厚時の抵抗値に達した時
点で成長を停止する構成、若しくは、上記方法において
、更に、前記導電性薄膜の抵抗値が該導電性薄膜の所定
膜厚時の抵抗値に達する時間を測定し、次の被処理基板
へのスパッタリングが所定時間内に完了するようスパッ
タ電流及びスパッタ電圧を制御する構成を有する。
[Detailed Description of the Invention] [Summary] A sputtering method, in particular a sputtering method for a conductive thin film, that allows sputtering film thickness to be controlled automatically and with high precision without requiring time or manpower. When forming a conductive thin film having a predetermined thickness on a substrate to be processed by a sputtering method, the process may be performed on a dummy substrate having an insulating material surface placed near the substrate to be processed or Sputtering is performed while measuring the resistance value of the conductive thin film sputter-grown on the insulating film of the substrate, and when the resistance value of the conductive thin film reaches the resistance value at a predetermined thickness of the conductive thin film, the growth is completed. When continuously growing conductive thin films having a predetermined thickness on multiple substrates to be processed using a configuration that stops the process or a single-wafer sputtering device,
A dummy substrate having an insulating surface is sent to the vicinity of the substrate to be processed one by one, and the resistance value of the conductive thin film grown on the dummy substrate at the same time as the substrate to be processed is measured. Sputtering is performed while the conductive thin film is sputtered, and the growth is stopped when the resistance value of the conductive thin film reaches a resistance value at a predetermined thickness of the conductive thin film, or in the above method, further, the resistance of the conductive thin film is sputtered. It has a configuration in which the time required for the resistance value of the conductive thin film to reach a predetermined thickness is measured, and the sputtering current and sputtering voltage are controlled so that sputtering to the next substrate to be processed is completed within a predetermined time.

〔産業上の利用分野〕[Industrial application field]

本発明はスパッタリング方法、特に導電性薄膜のスパッ
タリング方法に関する。
The present invention relates to a sputtering method, and in particular to a method for sputtering conductive thin films.

導電性薄膜例えば金属薄膜をスパッタ装置によって成長
する際に、ターゲットの使用時間が経過するに従ってス
パッタ速度が変化し、スパッタ膜厚も変化して行く。
When growing a conductive thin film, such as a metal thin film, using a sputtering device, the sputtering speed changes and the sputtered film thickness changes as the usage time of the target passes.

一方、半導体装置においては高集積化の進行に伴ってス
パッタ形成されるアルミニウム薄膜等ヲ用いる金属配線
の幅も大幅に縮小されてきいる。
On the other hand, as semiconductor devices become more highly integrated, the width of metal interconnections using sputter-formed aluminum thin films or the like has also been significantly reduced.

このような状況下において1、配線の品質を高めて半導
体装置の信頼性を確保するために、半導体基板毎のスパ
ッタ膜厚が一定に保てるようなスパッタリング方法が望
まれている。
Under these circumstances, 1. In order to improve the quality of wiring and ensure the reliability of semiconductor devices, a sputtering method that can maintain a constant sputtered film thickness for each semiconductor substrate is desired.

〔従来の技術〕[Conventional technology]

ターゲットの使用時間の経過と共にスパッタ速度が変化
して行(という性質を持ったスパッタ装置を用いて、被
処理基板毎にばらつきのないほぼ一定のスパッタ膜厚を
得るための方法として、従来、次の2方法が主として用
いられていた。
Conventionally, the following method has been used to obtain a nearly constant sputtered film thickness with no variation from substrate to substrate using a sputtering device whose sputtering speed changes as the target is used. Two methods were mainly used.

第1の方法は、所定のスパッタ装置で一回ターゲットを
使いきって、ターゲットの使用時間と一定時間内におけ
るスパッタ膜厚との関係のデータをとっておき、このデ
ータを基にして、一定のスパッタ膜厚を得るためのター
ゲットの使用時間に対するスパッタ電流やスパッタ電圧
の補正曲線を求めて、ターゲットを使って行(毎に前記
電流や電圧の補正をする方法である。
The first method is to use up the target once in a given sputtering device, record data on the relationship between the usage time of the target and the sputtered film thickness within a certain period of time, and then use this data to maintain a certain sputtered film thickness. This is a method in which a correction curve of sputtering current and sputtering voltage with respect to the usage time of the target is obtained to obtain the thickness, and the current and voltage are corrected every time the target is used.

また、第2の方法は、1基板上へのスパッタリングが完
了する毎に、その膜厚を測定し、次の基板に対するスパ
ッタ電流やスパッタ電圧を補正して行(方法である。
The second method is a method in which each time sputtering on one substrate is completed, the film thickness is measured and the sputtering current and sputtering voltage for the next substrate are corrected.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし上記第1の方法は、別のターゲットで作成した補
正曲線に基づいて間接的にスパッタ電流やスパッタ電圧
の補正がなされるので、膜厚精度の信頼度が低(、また
第2の方法には時間や人手が大幅に増大するという問題
があった。
However, in the first method, the sputtering current and sputtering voltage are indirectly corrected based on a correction curve created with another target, so the reliability of the film thickness accuracy is low (and the second method The problem was that it required a significant increase in time and manpower.

そこで本発明は、時間や人手をかけずに、自動的に且つ
高精度にスパッタ膜厚を制御することが可能なスパッタ
リング方法を提供することを目的とする。
Therefore, an object of the present invention is to provide a sputtering method that can automatically and highly accurately control the sputtered film thickness without requiring much time or manpower.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題は、被処理基板上に所定膜厚を有する導電性薄
膜をスパッタリング法により形成するに際して、該被処
理基板の近傍に配置した絶縁物表面を有するダミー基体
上若しくは該被処理基板の絶縁膜上にスパッタ成長され
た導電性薄膜の抵抗値を測定しながらスパッタリングを
行い、該導電性薄膜の抵抗値が該導電性薄膜の所定膜厚
時の抵抗値に達した時点で成長を停止する本発明による
スパッタリング方法、若しくは、 枚葉式スパッタリング装置を用い複数の被処理基板上に
所定膜厚を有する導電性薄膜を連続して成長せしめるに
際して、被処理基板の近傍に、絶縁物表面を有するダミ
ー基体を該被処理基板1枚毎に順次送り出し、該被処理
基板上と同時に該ダミー基体上に成長する該導電性薄膜
の抵抗値を測定しながらスパッタリングを行い、該導電
性薄膜の抵抗値が該導電性薄膜の所定膜厚時の抵抗値に
達した時点で成長を停止する本発明によるスパッタリン
グ方法、若しくは、 上記方法において、更に、前記導電性薄膜の抵抗値が該
導電性薄膜の所定膜厚時の抵抗値に達する時間を測定し
、次の被処理基板へのスパッタリングが所定時間内に完
了するようスパッタ電流及びスパッタ電圧を制御する本
発明によるスパッタリング方法によって解決される。
The above problem arises when forming a conductive thin film having a predetermined thickness on a substrate to be processed by sputtering, and when forming an insulating film on a dummy substrate having an insulating material surface placed near the substrate to be processed or an insulating film on the substrate to be processed. Sputtering is performed while measuring the resistance value of a conductive thin film sputter-grown on the conductive thin film, and the growth is stopped when the resistance value of the conductive thin film reaches the resistance value at a predetermined thickness of the conductive thin film. When a conductive thin film having a predetermined thickness is continuously grown on a plurality of substrates to be processed using the sputtering method according to the invention or a single-wafer sputtering device, a dummy having an insulating material surface is placed near the substrates to be processed. The substrates are sequentially sent out one by one to be processed, and sputtering is performed while measuring the resistance value of the conductive thin film grown on the dummy substrate at the same time as the substrate to be processed, so that the resistance value of the conductive thin film is A sputtering method according to the present invention in which the growth is stopped when the resistance value of the conductive thin film reaches a predetermined thickness, or in the above method, further, the resistance value of the conductive thin film is This problem is solved by the sputtering method according to the present invention, which measures the time required to reach the resistance value when thick and controls the sputtering current and sputtering voltage so that sputtering to the next substrate to be processed is completed within a predetermined time.

〔作 用〕[For production]

即ち本発明の方法においては、成長する導電性スパッタ
膜の抵抗値を、被処理基板上若しくはその近傍に配置し
たダミー基体上で直に測定しながらスパッタリングを継
続し、その抵抗値が所定膜厚の抵抗値に達した時点で、
シャッタを閉じる等によりスパッタを停止させるので、
スパッタ膜厚の制御を高精度に行うことができる。
That is, in the method of the present invention, sputtering is continued while the resistance value of the growing conductive sputtered film is directly measured on a dummy substrate placed on or near the substrate to be processed, and the resistance value is determined when the resistance value reaches a predetermined film thickness. When the resistance value of
Spatter is stopped by closing the shutter, etc.
The sputtered film thickness can be controlled with high precision.

特に枚葉式のスパッタリング方法においては、被処理基
板の近傍位置に、被処理基板毎に順次絶縁体表面を有す
る新しいダミー基体面を送り出し、その面に成長するス
パッタ膜の抵抗値を常時測定することにより所定のスパ
ッタ膜厚を検出し、自動的にスパッタの停止を行うこと
により、時間及び人手を使わずにスパッタ膜厚を高精度
に制御することを可能にする。
In particular, in the single-wafer sputtering method, a new dummy substrate surface having an insulator surface is sequentially delivered to a position near the substrate to be processed for each substrate to be processed, and the resistance value of the sputtered film grown on that surface is constantly measured. By detecting a predetermined sputtered film thickness and automatically stopping sputtering, it is possible to control the sputtered film thickness with high precision without using time or manpower.

そして更には、所定膜厚を得るための時間の変化を検知
して、後続基板へのスパッタリングに際してのスパッタ
電流やスパッタ電圧の制御を行い、所定膜厚が得られる
スパッタ時間の均一化を図って製造工程の自動化を有利
にする。
Furthermore, by detecting changes in the time required to obtain a predetermined film thickness, the sputtering current and sputtering voltage are controlled during sputtering to subsequent substrates, and the sputtering time required to obtain a predetermined film thickness is made uniform. Advantageous automation of manufacturing processes.

〔実施例〕〔Example〕

以下本発明を、図示実施例により具体的に説明する。 The present invention will be specifically explained below with reference to illustrated embodiments.

第1IIは本発明の第1の実施例に係るバッチ式スパッ
タ装置の模式図で、(a)は装置の側断面図、(b)は
基板ホルダの平面図、(C)は抵抗測定用絶縁基体の平
面図、第2図は本発明の第2の実施例に係る枚葉式スパ
ッタ装置の模式図で、(a)は装置要部の平面図、(b
)同装置要部のA−A矢視断面図、第3図は第2の実施
例に係る抵抗測定用絶縁テープの配置模式図で、(a)
は平面外−1(b)はM−M矢視断面図、第4図は第2
の実施例に係る抵抗測定用絶縁テープの模式図で、(a
)は平面図、(b)はX−X矢視断面図である。
1II is a schematic diagram of a batch type sputtering apparatus according to the first embodiment of the present invention, in which (a) is a side sectional view of the apparatus, (b) is a plan view of a substrate holder, and (C) is an insulator for resistance measurement. FIG. 2 is a schematic diagram of a single-wafer sputtering apparatus according to a second embodiment of the present invention, in which (a) is a plan view of the main part of the apparatus, and (b) is a plan view of the base.
) A sectional view taken along the line A-A of the main part of the device, and FIG. 3 is a schematic diagram of the arrangement of the insulating tape for resistance measurement according to the second embodiment, (a)
is out-of-plane - 1 (b) is a sectional view taken along the line M-M, and Fig. 4 is a 2nd
A schematic diagram of an insulating tape for resistance measurement according to an example of (a
) is a plan view, and (b) is a sectional view taken along the line X-X.

企図を通じ同一対象物は同一符号で示す。Identical objects are designated by the same reference numerals throughout the design.

バッチ式のスパッタ処理に本発明を適用するに際しては
、例えば第1図(a)に示すように、基台l上に摺動用
のローラー2を介して載置され、固定されたターゲット
電極3の支柱を軸にして回動(公転)する底板4と、こ
の底板4上に真空パツキン5を介してドーム状の蓋部6
が被せられ、この蓋部6にそれぞれの支軸を中心にして
自転する基板ホルダ7A〜7D等が配設され、且つ前記
底板4に回動してターゲット電極3上を覆うシャッタ8
が配設されてなる従来同様のバッチ式スパッタ装置にお
ける、被スパツタ領域の空きスペース例えばドーム状蓋
部6の天井中心部に、例えば第1図(C)に示すように
長方形のセラミック板17の両端部にAI等の金属蒸着
膜からなる電極端子18A 、 18Bが形成されてな
る抵抗測定用のダミー基体即ち抵抗測定用絶縁基体9を
配置する。なお図中、10は例えばアルミニウム(A1
)ターゲット、11は気密・絶縁用パツキン、12は回
動用のベアリング、15は被処理基板を示す。
When applying the present invention to batch-type sputtering, for example, as shown in FIG. 1(a), a fixed target electrode 3 placed on a base l via a sliding roller 2 is A bottom plate 4 that rotates (revolutions) around the pillar, and a dome-shaped lid 6 placed on the bottom plate 4 via a vacuum packing 5.
Substrate holders 7A to 7D, etc., which rotate about their respective spindles are disposed on the lid portion 6, and a shutter 8 that rotates on the bottom plate 4 and covers the target electrode 3 is provided.
In a batch type sputtering apparatus similar to the conventional one, a rectangular ceramic plate 17 is placed in the empty space of the sputtering area, for example, in the center of the ceiling of the dome-shaped lid part 6, as shown in FIG. 1(C). A dummy base for resistance measurement, ie, an insulating base for resistance measurement 9, which has electrode terminals 18A and 18B made of a metal vapor deposited film such as AI formed on both ends thereof, is arranged. In the figure, 10 is, for example, aluminum (A1
) Target, 11 is an airtight/insulating gasket, 12 is a rotating bearing, and 15 is a substrate to be processed.

また、前記基板ホルダ7A〜7D等は、例えば第1図(
b)に示すように、金属円盤13に複数個の基板搭載用
溝14を有し、この基板搭載溝14の周囲に搭載された
被処理基板15を固定する基板固定爪16が配設された
従来同様の構造を有する。
Further, the substrate holders 7A to 7D, etc. are, for example, shown in FIG.
As shown in b), the metal disk 13 has a plurality of substrate mounting grooves 14, and substrate fixing claws 16 for fixing the mounted substrate 15 to be processed are arranged around the substrate mounting grooves 14. It has the same structure as the conventional one.

そして、スパッタに際しては、図示しない駆動装置によ
り底板lを介してターゲット電極3を軸にして公転して
おり、且つ蓋部6に配設されている被処理基板15の搭
載された基板ホルダ7A〜7D等が、図示しない駆動装
置によって自転せしめられているスパッタ装置内を、例
えば10−”Torr程度の〜 所定圧力のアルゴン(Ar)雰囲気に保持した後、ター
ゲット電極3と蓋板6との間、即ち蓋板6及び蓋板6と
導通している基板ホルダ7A〜7D等及びそれに直に搭
載されている被処理基板15との間に所定の直流電圧を
印加し、シャッタ8を開いてターゲット電極(陰極)3
上のAfツタ−ット10をスパッタさせて、被処理基板
15上にAl薄膜を成長させる。この際上記装置を用い
る本発明の方法においては、上記被処理基板15上と同
時に抵抗測定用絶縁基体9上に成長するAl薄膜の抵抗
値を測定しながらスパッタを行い、その抵抗値が所定の
厚さのAl薄膜の抵抗値に達した時点を比較回路等によ
り検知し、図示しない駆動装置で自動的にシャッタ8を
閉じ、且つスパッタ電源を遮断してスパッタを停止させ
る。
During sputtering, the substrate holders 7A to 7A on which the substrate to be processed 15, which is disposed in the lid part 6 and which is mounted on the substrate 15 to be processed, are revolved around the target electrode 3 via the bottom plate 1 by a drive device (not shown). After maintaining the inside of the sputtering apparatus, in which the sputtering apparatus 7D and the like are rotated by a drive device (not shown), in an argon (Ar) atmosphere at a predetermined pressure of, for example, about 10-'' Torr, a That is, a predetermined DC voltage is applied between the cover plate 6, the substrate holders 7A to 7D, etc. which are electrically connected to the cover plate 6, and the target substrate 15 mounted directly thereon, and the shutter 8 is opened to expose the target. Electrode (cathode) 3
The upper Af target 10 is sputtered to grow an Al thin film on the substrate 15 to be processed. At this time, in the method of the present invention using the above-described apparatus, sputtering is performed while measuring the resistance value of the Al thin film grown on the insulating substrate 9 for resistance measurement at the same time as on the substrate 15 to be processed, and the resistance value is determined to be a predetermined value. A comparator circuit or the like detects the point in time when the resistance value of the Al thin film is reached, and a drive device (not shown) automatically closes the shutter 8 and cuts off the sputtering power supply to stop sputtering.

このようにすると、被処理基板15上には抵抗測定用絶
縁基体9上に成長するAl薄膜とほぼ等しい厚さのA[
薄膜が成長するので、抵抗測定用絶縁基体9上に成長す
るA[薄膜の厚さをその抵抗値から経時的に測定し、そ
の抵抗値が予め測定された所望厚さの抵抗値に合致した
時点でスパッタを停止することにより、被処理基板15
上に成長せしめられるAl薄膜の厚さを所望の厚さに精
度良く形成することができる。
In this way, on the substrate 15 to be processed, the thickness of A[
As the thin film grows, the thickness of the thin film grown on the insulating substrate 9 for resistance measurement is measured over time from its resistance value, and the resistance value matches the resistance value of the desired thickness measured in advance. By stopping sputtering at this point, the substrate to be processed 15
The thickness of the Al thin film grown thereon can be precisely formed to a desired thickness.

また、枚葉式のスパッタ処理に用いられる本発明の方法
においては、例えば第2図(a)に示すように、ターン
テーブルとなる円板状の基板ホルダ19に放射状に複数
個形成された基板搭載溝14内に搭載され、基板固定爪
16によって例えば基板ホルダ19の回転軸19S側に
ファセット面をそれぞれ正対させて固定された被処理基
板15を、上記基板ホルダ19の回転によってターゲッ
ト電極3上の例えばAI2ターゲット10に正対する位
置まで順次移動し上行(ターンテーブル方式の従来同様
の枚葉式スパッタ装置が用いられる。なお、20は基板
搭載溝14内の被処理基板15のファセット部に対応す
る空きスペースに形成されたスパッタ膜厚検出用開孔を
示す。
In addition, in the method of the present invention used for single-wafer sputtering, a plurality of substrates are formed radially on a disc-shaped substrate holder 19 serving as a turntable, as shown in FIG. 2(a), for example. By rotating the substrate holder 19, the substrate 15 to be processed is mounted in the mounting groove 14 and fixed by the substrate fixing claws 16 with the facets facing the rotating shaft 19S side of the substrate holder 19, for example, to the target electrode 3. For example, the AI2 target 10 is moved sequentially to a position directly facing the target 10 (a turntable type single-wafer sputtering apparatus similar to the conventional one is used). A hole for sputtered film thickness detection formed in a corresponding empty space is shown.

第2図(b)は、第2図(a)のA−A矢視断面を示し
た図で、この図のように、上記枚葉式スパッタ装置にお
いては、通常通り、基板ホルダ19に搭載されlターゲ
ット電極の正面に移動された被処理基板15と上記Al
ターゲットIOとの間には例えば回動式のシャッタ8が
設けられる。また、上記位置における基板搭載溝14に
形成された前記スパッタ膜厚検出用開孔20の後部には
、この開孔20を介し被処理基板15上と同時に膜厚検
出用のスパッタ膜が被着される抵抗測定用のダミー基体
である抵抗測定用絶縁テープ21が配置される。
FIG. 2(b) is a cross-sectional view taken along the line A-A in FIG. 2(a), and as shown in this figure, in the single-wafer type sputtering apparatus, as usual, The substrate 15 to be processed and the above Al
For example, a rotating shutter 8 is provided between the target IO and the target IO. Furthermore, at the rear of the sputtered film thickness detection aperture 20 formed in the substrate mounting groove 14 at the above position, a sputtered film for film thickness detection is simultaneously deposited on the substrate 15 to be processed through this aperture 20. An insulating tape 21 for resistance measurement, which is a dummy base for resistance measurement, is arranged.

第3図は上記スパッタ膜の抵抗測定用絶縁テープ2Iの
配置を模式的に示す平面図(a)及びM−M矢視断面図
である。
FIG. 3 is a plan view (a) and a sectional view taken along the line M-M, schematically showing the arrangement of the insulating tape 2I for measuring the resistance of the sputtered film.

また第4図は上記抵抗測定用絶縁テープ21の一例を模
式的に示す平面図(a)及びそのX−X矢視断面図であ
る。
Moreover, FIG. 4 is a plan view (a) schematically showing an example of the above-mentioned insulating tape 21 for resistance measurement, and a cross-sectional view taken along the line X--X.

第4図に示す抵抗測定用絶縁テープ21は例えばポリイ
ミド等の耐熱性を有する厚さ0.5−程度のシートによ
り形成され、その表裏面の両側の縁部から側面にかけて
、蒸着法等により形成された厚さ2〜3μm程度のAl
膜等からなる対の電極端子(22A+、 22At)、
(22Bl、  2282)等が所定の間隔dを隔てて
形成されおり、両端部かロール状に巻かれてなっている
The insulating tape 21 for resistance measurement shown in FIG. 4 is formed of a heat-resistant sheet of polyimide or the like with a thickness of about 0.5 mm, and is formed by a vapor deposition method or the like from the edges on both sides of the front and back surfaces. Al with a thickness of about 2 to 3 μm
A pair of electrode terminals (22A+, 22At) consisting of a membrane, etc.
(22Bl, 2282), etc. are formed at a predetermined distance d, and both ends are wound into a roll.

なお前記電極の間隔dは、スパッタ後に隣接する電極同
士が短絡するのを避けるために、前記膜厚検出用開孔2
0の幅Wより充分に広(形成しておく必要がある。
Note that the distance d between the electrodes is determined by the distance d between the film thickness detection openings 2 to avoid short-circuiting between adjacent electrodes after sputtering.
It is sufficiently wider than the width W of 0 (needs to be formed in advance).

この抵抗測定用絶縁テープ21は第3図に示すように、
ターンテーブル機能を有する基板ホルダ19でターゲッ
トの正面に送られ停止した状態において、基板ホルダ1
9の基板搭載溝14に形成された前記スパッタ膜厚検出
用開孔20の後部の基板ホルダ19の裏面に可能な限り
接近し、且つテープ2I表面両縁部の電極端子例えば2
2A1.22A2 (第4図)が共に前記スパッタ膜厚
検出用開孔20内に表出する固定位置に配置される。こ
の抵抗測定用絶縁テープ21は、基板ホルダ19のター
ンによって次の被処理基板が次々とターゲットの正面に
送られる毎に、これに同期して次の列の電極端子例えば
22B1.22Bt (第4図)がスパッタ膜厚検出用
開孔20内に表出するように移動する。
This insulating tape 21 for resistance measurement is as shown in FIG.
When the substrate holder 19 having a turntable function is sent to the front of the target and stopped, the substrate holder 1
9 as close as possible to the back surface of the substrate holder 19 at the rear of the sputtered film thickness detection opening 20 formed in the substrate mounting groove 14 of No.
2A1 and 22A2 (FIG. 4) are both arranged at fixed positions exposed within the sputtered film thickness detection opening 20. This insulating tape 21 for resistance measurement is connected to the electrode terminals of the next row, for example, 22B1.22Bt (4th ) is moved so that it is exposed in the sputtered film thickness detection aperture 20.

そしてスパッタに際しては、前記シャッタ8(第2b図
)が開かれ、テープ21の両側からテープ21を挟むよ
うに移動してくる抵抗測定端子z3A、23Bによって
テープ21側面の電極端子例えば22A1.22A! 
(第4図)を挟持してテープ21上に成長するスパッタ
膜の抵抗が常時測定され(テープの裏面で測定してもよ
い)、その抵抗値が所定膜厚の抵抗値に達した時点で、
前記シャッタ8(第2b図)を閉じ、スパッタ膜の成長
が停止され、次いで基板ホルダ19(第2a図)のター
ンにより次の被処理基板15がターゲット10 (第2
b図)の正面に送られて、上記同様の操作により次の被
処理基板上へのスパッタ膜の成長が行われる。
When sputtering occurs, the shutter 8 (FIG. 2b) is opened, and the resistance measuring terminals z3A and 23B move from both sides of the tape 21 so as to sandwich the tape 21, and the electrode terminals on the side surface of the tape 21, for example, 22A1.22A!
The resistance of the sputtered film grown on the tape 21 while holding the tape (Fig. 4) is constantly measured (it may be measured on the back side of the tape), and when the resistance value reaches the resistance value of the predetermined film thickness, ,
The shutter 8 (FIG. 2b) is closed to stop the growth of the sputtered film, and then the substrate holder 19 (FIG. 2a) is turned so that the next substrate 15 to be processed is moved to the target 10 (second
A sputtered film is grown on the next substrate to be processed by the same operation as described above.

以上実施例に示したような本発明の方法によれば、枚葉
式のスパッタ装置を用い、特に人手を余分に要すること
なく、複数の基板に対して膜厚精度の高い一定の膜厚を
有するAI!等の導電性スパッタ膜を形成することがで
きる。
According to the method of the present invention as shown in the examples above, it is possible to form a uniform film thickness with high film thickness accuracy on a plurality of substrates using a single-wafer type sputtering apparatus without requiring any extra manpower. AI! It is possible to form a conductive sputtered film such as the following.

また、上記スパッタ成長に際し、導電性スパッタ膜が所
定膜厚に達する時間を自動的に測定してその変動を検知
し、予め実験したデータに基づいて次の被処理基板に対
するスパッタ電流及びスパッタ電圧を調整し、各被処理
基板に対して所定膜厚のスパッタ膜の成長がほぼ一定の
時間で完了するようにすれば、タクト方式で送られる製
造工程の自動化に対して一層有利になる。
In addition, during the sputter growth described above, the time required for the conductive sputtered film to reach a predetermined thickness is automatically measured and its fluctuations are detected, and the sputtering current and sputtering voltage for the next substrate to be processed are determined based on pre-experimented data. If adjustment is made so that the growth of a sputtered film of a predetermined thickness on each substrate to be processed is completed in a substantially constant time, it will be more advantageous for automation of the manufacturing process that is sent by the tact method.

以上実施例においては、スパッタ膜の抵抗値を被処理基
板の近傍に配置した抵抗測定用基体(基板若しくはテー
プ)を用いて測定したが、このスパッタ膜の抵抗値は、
上記抵抗測定用基体を用いずに、被処理基板上の性能に
支障を生じない所定の場所に、直に抵抗測定用の電極を
接触させた状態でスパッタを行うことによって測定して
も差支えない。
In the above examples, the resistance value of the sputtered film was measured using a resistance measurement substrate (substrate or tape) placed near the substrate to be processed.
Without using the above-mentioned resistance measurement substrate, it is also possible to measure by performing sputtering with the resistance measurement electrode in direct contact with a predetermined location on the substrate to be processed that does not affect performance. .

〔発明の効果〕〔Effect of the invention〕

以上説明のように本発明によれば、バッチ式及び枚葉式
のスパッタ装置を用いるスパッタリング方法において、
時間や人手をかけずに、自動的に且つ高精度にスパッタ
膜厚を制御することが可能になり、且つ、特に枚葉式の
スパッタリング方法において所定膜厚を得るスパッタ時
間の均一化も可能になる。
As explained above, according to the present invention, in a sputtering method using a batch type and single wafer type sputtering apparatus,
It is now possible to control the sputtered film thickness automatically and with high precision without requiring time or manpower, and it is also possible to uniformize the sputtering time to obtain a desired film thickness, especially in single-wafer sputtering methods. Become.

従って本発明は半導体装置の製造歩留りや信頼性の向上
及び製造工程の自動化に効果を生ずる。
Therefore, the present invention is effective in improving the manufacturing yield and reliability of semiconductor devices and automating the manufacturing process.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の実施例に係るバッチ式スパッタ
装置の模式図で、(a)は装置の側断面図、(blは基
板ホルダの平面図、(C)は抵抗測定用絶縁物基体の平
面図、 第2図は本発明の第2の実施例に係る枚葉式スパッタ装
置の模式図で、(a)は装置要部の平面図、(b)は同
装置要部のA−A矢視断面図、第3図は第2の実施例に
おける抵抗測定用絶縁テープの配置模式図で、(alは
平面図(a)、(b)はM−M矢視断面図、 第4図は第2の実施例における抵抗測定用絶縁テープの
模式図で、(a)は平面図、(b)はX−x矢視断面図
である。 図において、 lは基台、 2は摺動用ローラ、 3はターゲット電極 4は底板、 5は真空パツキン、 6は蓋部、 7八〜7Dは基板ホルダ、 8はシャッタ、 9は抵抗測定用絶縁基体、 lOはAI!ターゲット、 11は気密・絶縁用パツキン、 12は回動用ベアリング、 13は金属円板、 14は基板搭載溝、 15は被処理基板、 16は基板固定爪、 17はセラミック板、 18A 518Bは電極端子 を示す。 (α) 1鰐j1!/)イ賢]四ず1面[コ(b)  
幕末ホルq″/′)sf−面[!l     (0急杭
1費し田神41初1体の平面口本尤明/)め1/)突先
勿11て係二パンl或スノで、1フ坂yハ隷式凹(α)
kII零靜O,JP面口
FIG. 1 is a schematic diagram of a batch sputtering apparatus according to a first embodiment of the present invention, in which (a) is a side sectional view of the apparatus, (bl is a plan view of a substrate holder, and (C) is an insulator for resistance measurement. FIG. 2 is a schematic diagram of a single-wafer sputtering apparatus according to a second embodiment of the present invention, in which (a) is a plan view of the main part of the apparatus, and (b) is a schematic diagram of the main part of the apparatus. 3 is a schematic diagram of the arrangement of the insulating tape for resistance measurement in the second embodiment, (al is a plan view (a), (b) is a sectional view taken along M-M, FIG. 4 is a schematic diagram of an insulating tape for resistance measurement in the second embodiment, where (a) is a plan view and (b) is a cross-sectional view taken along the line X-x. In the figure, l is a base; 2 3 is a sliding roller, 3 is a target electrode 4 is a bottom plate, 5 is a vacuum packing, 6 is a lid, 78 to 7D are substrate holders, 8 is a shutter, 9 is an insulating base for resistance measurement, 1O is an AI! target, 11 12 is an airtight/insulating gasket, 12 is a rotating bearing, 13 is a metal disk, 14 is a substrate mounting groove, 15 is a substrate to be processed, 16 is a substrate fixing claw, 17 is a ceramic plate, and 18A and 518B are electrode terminals. (α) 1 crocodile j1!/) Iken] 4 1 page [ko (b)
Bakumatsu Hole q''/') SF-side [!l (0 sudden stake 1 cost Tagami 41 first 1 plane Kuchimoto Yumei/)me 1/) Tip 11 and 2 buns l or snow, 1st slope y ha reishiki concave (α)
kII Reisei O, JP Menguchi

Claims (3)

【特許請求の範囲】[Claims] 1.被処理基板上に所定膜厚を有する導電性薄膜をスパ
ッタリング法により形成するに際して、該被処理基板の
近傍に配置した絶縁物表面を有するダミー基体上若しく
は該被処理基板の絶縁膜上にスパッタ成長された導電体
性膜の抵抗値を測定しながらスパッタリングを行い、該
導電性薄膜の抵抗値が該導電性薄膜の所定膜厚時の抵抗
値に達した時点で成長を停止することを特徴とするスパ
ッタリング方法。
1. When forming a conductive thin film having a predetermined thickness on a substrate to be processed by sputtering, sputter growth is performed on a dummy substrate having an insulating material surface placed near the substrate to be processed or on an insulating film of the substrate to be processed. Sputtering is performed while measuring the resistance value of the conductive thin film, and the growth is stopped when the resistance value of the conductive thin film reaches the resistance value at a predetermined thickness of the conductive thin film. sputtering method.
2.枚葉式スパッタリング装置を用い複数の被処理基板
上に所定膜厚を有する導電性薄膜を連続して成長せしめ
るに際して、 被処理基板の近傍に、絶縁物表面を有するダミー基体を
該被処理基板1枚毎に順次送り出し、該被処理基板上と
同時に該ダミー基体上に成長する該導電性薄膜の抵抗値
を測定しながらスパッタリングを行い、該導電性薄膜の
抵抗値が該導電性薄膜の所定膜厚時の抵抗値に達した時
点で成長を停止することを特徴とするスパッタリング方
法。
2. When continuously growing conductive thin films having a predetermined thickness on a plurality of substrates to be processed using a single-wafer sputtering device, a dummy substrate having an insulating surface is placed near the substrates to be processed. Sputtering is performed while measuring the resistance value of the conductive thin film grown on the substrate to be processed and simultaneously on the dummy substrate. A sputtering method characterized by stopping growth when the resistance value at the time of thickness is reached.
3.請求項2の方法において、更に、前記導電性薄膜の
抵抗値が該導電性薄膜の所定膜厚時の抵抗値に達する時
間を測定し、次の被処理基板へのスパッタリングが所定
時間内に完了するようスパッタ電流及びスパッタ電圧を
制御することを特徴とするスパッタリング方法。
3. 3. The method according to claim 2, further comprising: measuring a time for the resistance value of the conductive thin film to reach a resistance value at a predetermined film thickness of the conductive thin film, and completing sputtering to the next substrate to be processed within the predetermined time. A sputtering method characterized by controlling sputtering current and sputtering voltage so as to
JP28318390A 1990-10-20 1990-10-20 Sputtering method Pending JPH04157720A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28318390A JPH04157720A (en) 1990-10-20 1990-10-20 Sputtering method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28318390A JPH04157720A (en) 1990-10-20 1990-10-20 Sputtering method

Publications (1)

Publication Number Publication Date
JPH04157720A true JPH04157720A (en) 1992-05-29

Family

ID=17662212

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28318390A Pending JPH04157720A (en) 1990-10-20 1990-10-20 Sputtering method

Country Status (1)

Country Link
JP (1) JPH04157720A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008258167A (en) * 2007-03-30 2008-10-23 E2V Technologies (Uk) Ltd Magnetron
CN103774106A (en) * 2014-01-23 2014-05-07 江苏奥蓝工程玻璃有限公司 Baffle mechanism capable of being adjusted immediately according to film layer uniformity curve changes and adjustment method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008258167A (en) * 2007-03-30 2008-10-23 E2V Technologies (Uk) Ltd Magnetron
CN103774106A (en) * 2014-01-23 2014-05-07 江苏奥蓝工程玻璃有限公司 Baffle mechanism capable of being adjusted immediately according to film layer uniformity curve changes and adjustment method thereof

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