JPH04154164A - Packing structure of semiconductor memory element - Google Patents

Abstract

PURPOSE:To enable a common wiring for address/data to be minimized and high-density packing to be achieved by connecting a terminal group or a socket group of a memory package which is placed at an edge of a memory block to an address and a data bus on a substrate. CONSTITUTION:A plurality of memory packages 3 are interlocked by performing plug-in connection of a terminal group 1 of an overhang part 7 to a socket group 2 which is provided at a part corresponding to a substrate 8 of another package 3, thus forming a large-scale memory block 4. The package 3 and a substrate 5 which are placed at both edge parts are connected by a dummy package 15. The package 15 interpolates a gap of the block 4, thus forming a block as a whole. The terminal group 1 corresponding to the socket group 2 of the adjacent package 3 and the terminal group 1 consisting of an address terminal and a data terminal corresponding to the substrate 5 are provided at the package 15 and are connected to a bus on the substrate 5. Thus, wiring for address and that for data can be minimized and a high-density packaging can be achieved.

Description

[Detailed description of the invention] 【overview】

Regarding the mounting structure of semiconductor memory devices, the purpose is to provide a mounting structure of semiconductor memory devices that minimizes common wiring for address and data and enables high-density mounting. A memory block is formed by connecting a plurality of memory packages each having a socket group that can be plug-in connected to the terminal group, and the terminal group or the socket group of the memory package arranged at the end is connected to the address on the board and the socket group. Connect and configure the data bus.

[Industrial application field]

The present invention relates to a mounting structure for semiconductor memory elements. 2. Description of the Related Art With the recent demand for downsizing of computer systems, there is a demand for integrated circuits to be mounted on printed circuit boards at a high density, and there is also an increasing demand for an improvement in the mounting density of semiconductor memories.

[Prior Art 1] Conventionally, a semiconductor memory has been formed with a large number of address terminals, data terminals, and control terminals, and each semiconductor memory package has been mounted on a substrate. [Problems to be Solved by the Invention] However, in the conventional example described above, it is necessary to wire a large number of address lines, data lines, and control lines common to each semiconductor memory pancage on the substrate. To,
When mounting a large number of semiconductor memories, address lines and the like occupy a large area on the substrate. SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned drawbacks, and it is an object of the present invention to provide a mounting structure for semiconductor memory elements that minimizes common wiring for addresses and data and enables high-density mounting. shall be.

[Means for Solving the Problems] According to the present invention, the above object is to provide a terminal group 1 consisting of address and data terminals, and a terminal group 1 consisting of address and data terminals, as shown in FIGS. A memory block 4 is formed by connecting a plurality of memory packages 3 each having a socket group 2 that can be plug-in connected to a board 5. This is accomplished by providing a mounting structure for semiconductor memory devices that connects to address and data buses. [Operation] Based on the above configuration, an address bus and a data bus are formed within the memory block 4 in the present invention. As a result, there is no need to wire lotus lines over a wide area on the substrate 5, and the surface of the substrate 5 can be effectively used as an element mounting surface.

【Example】

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of the present invention, in which 5 is a printed circuit board and 4 is a memory block constructed by connecting a plurality of memory packages 3. In FIG. As shown in FIG. 3, the memory pan cage 3 in this embodiment is formed by protruding laterally from the upper and lower ends of the support column 6 in opposite directions, respectively, with an eaves section 7 and a board corresponding section 8. A memory chip (not shown) housed inside the memory package 3 is provided on the bottom surface of the board corresponding part 8.
In addition to the Vcc terminal 9 and the ground terminal 10 connected to predetermined terminals of the
, a write enable terminal 13, an output enable terminal 14, and other terminals for memory control signals are provided and are connected to pads on the substrate 5. Further, an address terminal and a data terminal are provided on the bottom surface of the eaves section 7 of the memory package 3, and a terminal insertion socket is formed on the ceiling surface of the board corresponding section 8. 2b, connected by wiring not shown in the memory package 3, and
These wirings are connected to address terminals and data terminals of the memory chip. The plurality of memory packages 3 formed as described above are
A large-scale memory block 4 is formed by connecting the terminal group 1 of the eaves part 7 to the socket group 2 provided in the board corresponding part 8 of another memory package 3 while connecting it by plug-in. Memory package 3 to be placed
In order to connect with the board 5, a dummy package I5 is installed.
is connected. These dummy packages I5 and the memory block 4
The dummy package 15 is shaped so that the gap is complemented to form a block as a whole, and the terminal group of the adjacent memory package 3 is arranged on the ceiling surface of the dummy package 15, which has a substantially cubic shape and is arranged at the left end. A socket group 2 corresponding to the memory package 1 is provided, and a terminal group 1 is provided corresponding to the socket group 2 of the adjacent memory package 3 on the dummy package 15, which has a cross-shaped shape when viewed from the side and is arranged at the right end. There is. Further, on the surface corresponding to the board 5 of each dummy package 150, a terminal group 1 consisting of address terminals and data terminals connected to the socket group 2 or the terminal group 1 by internal wiring (not shown) is provided. It is connected to the lotus above 5. In the above description, a case has been shown in which three memory packages 3 are connected to form the memory block 4, but the number to be connected can be selected as appropriate depending on the memory scale to be used. Furthermore, although the dummy package 15 is installed at the end of the memory block 4, it is also possible to form a special memory package 3 to be placed at the end.

【Effect of the invention】

As is clear from the above description, the semiconductor memory mounting structure according to the present invention does not require multiple address and data wirings on the board for mounting multiple memories. Efficiency can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a dummy block, (a) is a plan view, (b) is a side view, and FIG. 3 is a diagram showing a memory package. , (a) is a plan view, (b) is a side view, and FIG. 4 is a diagram showing a dummy block, (a) is a plan view, and (b) is a side view. In the figure, ■...terminal group, 2...socket group, 3...memory package, 4...memory block, 5...board.

Claims (1)

[Claims] A terminal group (1) consisting of address and data terminals, and a socket group (2) that can be plugged into the terminal group (1).
A memory block (4) is formed by connecting a plurality of memory packages (3) having
) to an address and data bus on a substrate (5).