JPH0414224A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the amount of water content to ooze out in a via contact hole and to make possible a reduction in the failure of the connection between lower and upper wirings by a method wherein the surface of an insulating film is exposed to oxygen gas, nitrogen gas, hellium gas or argon gas brought into a plasma state as a pretreatment for forming a flattened film on the insulating film and the amount of water content on the surface is reduced by the action of the gas. CONSTITUTION:A lower wiring 12 is formed on an SiO2 film 11 on an Si substrate 10 and is covered with an SiO2 film 13. Then, a heating treatment is performed to put the substrate in a reduced treating chamber, argon gas is brought into a plasma state, the surface of the film 13 is exposed to this gas and the moisture amount on the surface is reduced. Then, a SOG(Spin On Glass) material is applied and thereafter, is heated, dried and hardened, a SOG film (a flattened film) 14 for flattening is formed and an SiO2 film 15 is formed thereon to constitute a second insulating film. Subsequently, after a photoresist film 16 is formed, an opening part 16a is formed over the wiring 12 and a via contact hole 17 is formed via this opening part 16a by performing an etching and a removal in order. After that, an Al film is formed on the whole surface, is patterned to form an upper wiring 18 and the wiring 18 is connected with the wiring 12 to complete a semiconductor device.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method for manufacturing a semiconductor device, more specifically, a method for manufacturing a semiconductor device including a pretreatment for forming a planarization film on an insulating film, which reduces moisture on the surface of an insulating film. This further speeds up the drying of the planarization film, reduces moisture seeping into via contact holes formed in the interlayer insulating film including the planarization film, and reduces connection failures between the lower wiring and the upper wiring. The purpose of the present invention is to provide a method for manufacturing a semiconductor device capable of forming a flattening film on an insulating film, in which the surface of the insulating film is exposed to a plasma gas as a pretreatment for forming a planarizing film on the insulating film, and the insulating film is flattened by the action of the gas. The method includes reducing moisture on the surface of the membrane.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device including a pretreatment for forming a planarization film on an insulating film.

[Conventional technology]

Conventionally, to improve step coverage of upper wiring,
SOG (SpinO
The glabellar insulating film is flattened by applying SOG, etc., but since SOG is a liquid, conventionally it is heated and hardened. However, if this curing is not complete, moisture and the like will seep out from the SOG film exposed in the via contact hole, causing negative effects such as poor wiring connections, so it is desired to reduce this moisture.

FIGS. 2(a) to (g) illustrate the case where the conventional method of forming an interlayer insulating film including a planarizing film on the lower wiring is applied to the process of connecting the lower wiring and the upper wiring. FIG.

First, the lower wiring 3 is formed by patterning the Si film on the Si substrate 1 and the AI film on the film 2 (FIG. 2(a)).

Next, the lower wiring 3 is covered with a Sing film 4 to prevent hillocks on the lower wiring 3 (FIG. 4(b)).

Next, in order to flatten the surface of the Si substrate 1, a Sing film 4 is formed.
After applying SOG on top, it is heated and cured to form a flattening film 5.
((C) in the same figure).

Next, Si is deposited on the flattening film 5 to protect the flattening film 5 and the like.
An NG film 6 is formed (FIG. 4(d)). Next, Sing
After forming a photoresist film 7 on the film 6, an opening 7a is formed in the photoresist film 7 above the lower wiring 3 by an exposure method (FIG. 6(e)).

Next, the SiO□ film 6. The planarization film 5 and the SiO□ film 4 are sequentially etched and removed, and the lower wiring 3
A via contact hole 8 is formed on the top ((f) of the same figure)
.

After that, after forming the film A] on the entire surface by the spunter method,
The upper wiring 9 is formed by patterning the AI film, and is connected to the lower wiring 3 via the via contact hole 9 (FIG. 3(g)).

[Problem to be solved by the invention]

Incidentally, semiconductor devices manufactured by conventional manufacturing methods often cause poor connection between the upper wiring 9 and the lower wiring 3, which poses a problem.

As a result of the investigation, the main reason for this is that when moisture remains on the 5i02 film 4, the SOG film as the flattening film 5 becomes difficult to dry, and as a result, the process of sprocketing the AI film as shown in FIG. 2(g), etc. , during the process of heating the Si substrate I, or after completion of the semiconductor device.

Water containing ions in the G film flattens the film 5 and the 5i02 film 4.
It has been found that this is because the particles seep into the via contact hole 9 from the interface of the planarization film 5 and prevent contact between the upper wiring 9 and the lower wiring 3.

For this reason, after the formation of SiO II Drying has a problem in that water cannot be removed sufficiently.

The present invention has been made in view of such conventional problems, and by reducing moisture on the surface of the insulating film, the drying of the planarization film is further accelerated. Reduces moisture seeping into contact holes,
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can reduce connection failures between lower wiring and upper wiring.

The problem is solved by a method for manufacturing a semiconductor device, and secondly, the problem is solved by a method for manufacturing a semiconductor device according to the first invention, characterized in that the gas according to the first invention is oxygen, nitrogen helium, or argon. .

[Function] Table] shows the results of experiments conducted before the invention of the present invention, showing the effects of the present invention.

That is, it shows the variation in the amount of water on the surface of the 5iOz film as an insulating film before and after treatment with plasma argon gas.

[Means to solve the problem]

The above-mentioned problem is firstly to expose the surface of the insulating film to plasma gas as a pre-treatment for forming a flattening film on the insulating film, and to reduce moisture on the surface of the insulating film by the action of the gas. The semiconductor experiment, which is characterized by
The test was carried out by converting argon gas into plasma under the following conditions and exposing the sample to this plasma gas for 10 minutes. As a sample, a Si substrate on which a SiO□ film was formed was heat-treated at a temperature of 200° C. for about 10 minutes before plasma treatment, and the moisture content was measured by mass spectrometry.

The experimental results are as shown in Table 1.
The water content on the surface of the iOz film decreased by one order of magnitude.

This is thought to be because the water on the surface of the SiO□ film was physically scattered by the plasma gas, or because it was chemically altered and decomposed, but the clear reason has not yet been determined. Note that, in addition to argon, oxygen, nitrogen, helium, or the like may be used as the gas to be turned into plasma.

Thereby, the flattening film formed on the insulating film can be dried faster and more reliably than in the conventional case.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings.

FIGS. 1(a) to (h) show a pretreatment method for an insulating film underlying a planarizing film according to an embodiment of the present invention, in which an interlayer insulating film including a planarizing film is formed on a lower wiring, and FIG. 7 is a cross-sectional view illustrating a case where it is applicable to the process of connecting to the upper wiring.

First, the 1A1 film on the SrO2 film 11 on the Si substrate 10 is patterned to form the lower wiring 12 (FIG. 1(a)).
). Note that the Si substrate 10 and the 5iOz film 11 constitute a substrate.

Next, in order to prevent hillocks in the lower part, *12, etc.
The lower wiring 12 is covered with a SiO□ film (insulating film) 13 having a thickness of approximately 2000 yen (FIG. 2(b)).

Next, the Si substrate 0 is heat treated at a temperature of about 200° C. for about 10 minutes. Next, the Si substrate 10 is placed in a reduced pressure processing chamber, and argon gas is turned into plasma under the conditions of a power of 120 W and a pressure of 0.5 Torr in the reduced pressure processing chamber. Expose for about a minute ((c) in the same figure). As a result, it is estimated from experimental results that the amount of water on the surface is thought to be reduced by about one order of magnitude compared to the conventional method.

Next, in order to flatten the surface of the 51 substrate 10, a 5in2 film 1
After applying SOG (Spin On Glass) material on 3, it is heated to dry and harden, and then SOG is applied for flattening.
An OG film I4 is formed (FIG. 4(d)). At this time, 5i
Since the moisture on the 02 film 13 is reduced, the SOG film 1
4 dries faster than the conventional method.

Next, an iO□ film 15 is formed on the SOG film 1 4 so that the moisture remaining in the SOG film 14 does not reach the upper wiring to be formed later (FIG. 4(e)).

Note that the SOG film 14 and the 5iOz film 15 constitute a second insulating film.

Subsequently, after forming a photoresist film 16 on the 5iOz film 15, an opening 16a is formed in the photoresist film 16 above the lower wiring 12 (1ffl(f)).

Next, the 5i02 film 15. The SOG film 14 and the 5in2 film 13 are sequentially processed, etched, and removed to form a via contact hole 17 on the lower wiring 12 (see FIG.
g)).

After that, after forming an AI film on the entire surface by sputtering method,
The upper wiring 18 is formed by patterning the AI film, and is connected to the lower wiring 12 through the via contact hole 18, thereby completing the semiconductor device (FIG. 2(h)).

As described above, according to the embodiment of the present invention, FIG.
By performing the plasma treatment shown in Fig. 3, the surface of the SiO□ film 13 film surface 3, which is difficult to remove with conventional heat treatment, is removed, so the drying of the SOG film 14 can be accelerated compared to the conventional method. .

Therefore, while using the completed semiconductor device, the SOG film ■4
The amount of moisture seeping into the via contact hole can be further reduced. This makes it possible to prevent corrosion of the lower wiring 12 and the upper wiring 18, thereby reducing wiring connection defects in the semiconductor device.

Furthermore, after the step shown in Fig. 1(d), the moisture on the top and bottom surfaces of the SOG can be removed by performing the same plasma treatment (same conditions, etc.) as shown in Fig. 1(c) once again. , is more effective.

Further, in the above embodiment, argon gas is used as the gas to be turned into plasma, but it is also possible to use a gas containing oxygen, nitrogen, or helium.

[Effects of the Invention] As described above, according to the semiconductor device manufacturing method of the present invention, the insulating film under the planarization film is plasma-treated to remove moisture that is difficult to remove with conventional heat treatment. Therefore, compared to the conventional method, the flattening film can be dried more quickly and the layer can be reliably dried. Therefore, it is possible to further reduce the amount of moisture that seeps from the planarization film into the via contact hole during use of the completed semiconductor device.

Thereby, wiring connection defects in the semiconductor device can be reduced.

[Brief explanation of drawings]

FIG. 1 is a sectional view illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view illustrating a method of manufacturing a conventional semiconductor device. [Explanation of symbols] 1.10...Si substrate, 2.4.6.11.15...Sin, film, 3.12.
...Lower wiring, 5.. Flattening film, 7.. Photoresist film, 7a, 16a.. Openings, 8.17.. Via contact holes, 9.18..
Upper wiring, 13... SrO2 film (insulating film), 14... SOG film (planarization M), 16... photoresist film.

Claims (2)

[Claims] (1) A semiconductor characterized in that the surface of the insulating film is exposed to plasma gas as a pretreatment for forming a flattening film on the insulating film, and moisture on the surface of the insulating film is reduced by the action of the gas. Method of manufacturing the device. (2) The method for manufacturing a semiconductor device according to claim 1, wherein the gas according to claim 1 is oxygen, nitrogen, helium, or argon.