JPH04134885A - Superconducting device and manufacture thereof - Google Patents

Superconducting device and manufacture thereof

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Publication number
JPH04134885A
JPH04134885A JP2257855A JP25785590A JPH04134885A JP H04134885 A JPH04134885 A JP H04134885A JP 2257855 A JP2257855 A JP 2257855A JP 25785590 A JP25785590 A JP 25785590A JP H04134885 A JPH04134885 A JP H04134885A
Authority
JP
Japan
Prior art keywords
superconducting
channel
oxide
layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2257855A
Other languages
Japanese (ja)
Other versions
JP2641971B2 (en
Inventor
Takao Nakamura
孝夫 中村
Hiroshi Inada
博史 稲田
Michitomo Iiyama
飯山 道朝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP2257855A priority Critical patent/JP2641971B2/en
Priority to EP91402594A priority patent/EP0478464B1/en
Priority to DE69127418T priority patent/DE69127418T2/en
Priority to CA002052380A priority patent/CA2052380C/en
Publication of JPH04134885A publication Critical patent/JPH04134885A/en
Priority to US08/652,846 priority patent/US5717222A/en
Application granted granted Critical
Publication of JP2641971B2 publication Critical patent/JP2641971B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To make it possible to eliminate the need for a fine processing technology and prepare a high performance device which uses an oxide superconductor by controlling a superconducting current flowing in a superconducting circuit with gate voltage. CONSTITUTION:A gate electrode 4 is installed to a superconducting device in order to control a superconducting channel 10 by an oxide superconductor, a source electrode 2 which passes electric current thereto, a drain electrode 3, and electric current flowing in the superconducting channel. The main current flows in the superconductor. The channel 10 is turned on and off with voltage applied to the gate electrode 4, which forms the extremely thin superconducting channel 10. However, its thickness is not sufficient for a source region and a drain region. To comply with this, ions are implanted with the electrode 4 as a mask formed on the superconducting channel, thereby forming an oxide superconductor layer, which is used as a superconducting source and a superconducting drain region.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、超電導素子およびその作製方法に関する。よ
り詳細には、新規な構成の超電導素子およびその作製方
法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a superconducting element and a method for manufacturing the same. More specifically, the present invention relates to a superconducting element with a novel configuration and a method for manufacturing the same.

従来の技術 超電導を使用した代表的な素子に、ジョセフソン素子が
ある。ジョセフソン素子は、一対の超電導体をトンネル
障壁を介して結合した構成であり、高速スイッチング動
作が可能である。しかしながら、ジョセフソン素子は2
端子の素子であり、論理回路を実現するためには複雑な
回路構成になってしまう。
A Josephson device is a typical device using conventional technology superconductivity. A Josephson device has a configuration in which a pair of superconductors are coupled via a tunnel barrier, and is capable of high-speed switching operation. However, the Josephson element is 2
It is a terminal element and requires a complicated circuit configuration to realize a logic circuit.

一方、超電導を利用した3端子素子としては、超電導ベ
ーストランジスタ、超電導FET等がある。第3図に、
超電導ベーストランジスタの概念図を示す。第3図の超
電導ベーストランジスタは、超電導体または常電導体で
構成されたエミッタ21、絶縁体で構成されたトンネル
障壁22、超電導体で構成されたベース23、半導体ア
イソレータ24および常電導体で構成されたコレクタ2
5を積層した構成になっている。この超電導ベーストラ
ンジスタは、トンネル障壁22を通過した高速電子を利
用した低電力消費、高速動作の素子である。
On the other hand, three-terminal elements using superconductivity include superconducting base transistors, superconducting FETs, and the like. In Figure 3,
A conceptual diagram of a superconducting base transistor is shown. The superconducting base transistor shown in FIG. 3 is composed of an emitter 21 made of a superconductor or a normal conductor, a tunnel barrier 22 made of an insulator, a base 23 made of a superconductor, a semiconductor isolator 24, and a normal conductor. collector 2
It has a structure in which 5 layers are stacked. This superconducting base transistor is a low-power consumption, high-speed operation element that utilizes high-speed electrons that have passed through the tunnel barrier 22.

第4図に、超電導FETの概念図を示す。第4図の超電
導FETは、超電導体で構成されている超電導ソース電
極41および超電導ドレイン電極42が、半導体層43
上に互いに近接して配置されている。超電導ソース電極
41および超電導ドレイン電極42の間の部分の半導体
層43は、下側が大きく削られ厚さが薄くなっている。
FIG. 4 shows a conceptual diagram of a superconducting FET. In the superconducting FET of FIG. 4, a superconducting source electrode 41 and a superconducting drain electrode 42 made of a superconductor are connected to a semiconductor layer 43
are placed close to each other on top. The semiconductor layer 43 in the portion between the superconducting source electrode 41 and the superconducting drain electrode 42 has its lower side largely shaved and has a reduced thickness.

また、半導体層43の下側表面にはゲート絶縁膜46が
形成され、ゲート絶縁膜46上にゲート電極44が設け
られている。
Further, a gate insulating film 46 is formed on the lower surface of the semiconductor layer 43, and a gate electrode 44 is provided on the gate insulating film 46.

超電導FETは、超電導近接効果で超電導ソース電極4
1および超電導ドレイン電極42間の半導体層43を流
れる超電導電流を、ゲート電圧で制御する低電力消費、
高速動作の素子である。
A superconducting FET has a superconducting source electrode 4 due to the superconducting proximity effect.
1 and the superconducting current flowing through the semiconductor layer 43 between the superconducting drain electrode 42 by controlling the superconducting current with a gate voltage;
It is a high-speed operating element.

さらに、ソース電極、ドレイン電極間に超電導体でチャ
ネルを形成し、この超電導チャネルを流れる電流をゲー
ト電極に印加する電圧で制御する3端子の超電導素子も
発表されている。
Furthermore, a three-terminal superconducting element has been announced in which a channel is formed between a source electrode and a drain electrode using a superconductor, and the current flowing through this superconducting channel is controlled by a voltage applied to a gate electrode.

発明が解決しようとする課題 上記の超電導ベーストランジスタおよび超電導FETは
、いずれも半導体層と超電導体層とが積層された部分を
有する。ところが、近年研究が進んでいる酸化物超電導
体を使用して、半導体層と超電導体層との積層構造を作
製することは困難である。また、この構造が作製できて
も半導体層と超電導体層の間の界面の制御が難しく、素
子として満足な動作をしなかった。
Problems to be Solved by the Invention The above-described superconducting base transistor and superconducting FET both have a portion in which a semiconductor layer and a superconductor layer are laminated. However, it is difficult to fabricate a stacked structure of a semiconductor layer and a superconductor layer using oxide superconductors, which have been studied in recent years. Moreover, even if this structure could be fabricated, it was difficult to control the interface between the semiconductor layer and the superconductor layer, and the device did not operate satisfactorily.

また、超電導FETは、超電導近接効果を利用するため
、超電導ソース電極41および超電導ドレイン電極42
を、それぞれを構成する超電導体のコヒーレンス長の数
倍程度以内に近接させて作製しなければならない。特に
酸化物超電導体は、コヒーレンス長が短いので、酸化物
超電導体を使用した場合には、超電導ソース電極41お
よび超電導ドレイン電極42間の距離は、数IQnm以
下にしなければならない。このような微細加工は非常に
困難であり、従来は酸化物超電導体を使用した超電導F
ETを再現性よく作製できなかった。
Furthermore, in order to utilize the superconducting proximity effect, the superconducting FET has a superconducting source electrode 41 and a superconducting drain electrode 42.
must be made close to each other within several times the coherence length of the superconductor that constitutes each. In particular, an oxide superconductor has a short coherence length, so when an oxide superconductor is used, the distance between the superconducting source electrode 41 and the superconducting drain electrode 42 must be several IQ nm or less. Such microfabrication is extremely difficult, and conventionally superconducting F using oxide superconductors
ET could not be produced with good reproducibility.

さらに、従来の超電導チャネルを有する超電導素子は、
変調動作は確認されたが、キャリア密度が高いため、完
全なオン/オフ動作ができなかった。酸化物超電導体は
、キャリア密度が低いので、超電導チャネルに使用する
ことにより、完全なオン/オフ動作を行う上記の素子の
実現の可能性が期待されている。しかしながら、超電導
チャネルは5nm程度の厚さにしなければならず、その
ような構成の実現することは困難であった。
Furthermore, superconducting devices with conventional superconducting channels are
Although modulation operation was confirmed, complete on/off operation was not possible due to the high carrier density. Since oxide superconductors have a low carrier density, it is expected that by using them for superconducting channels, it will be possible to realize the above-mentioned devices that perform perfect on/off operation. However, the thickness of the superconducting channel must be approximately 5 nm, making it difficult to realize such a configuration.

そこで本発明の目的は、上記従来技術の問題点を解決し
た、新規な構成の超電導素子およびその作製方法を提供
することにある。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a superconducting element having a novel configuration and a method for manufacturing the same, which solves the problems of the prior art described above.

課題を解決するための手段 本発明に従うと、基板上に成膜された酸化物超電導薄膜
で形成された超電導チャネルと、該超電導チャネルの両
側に配置された超電導ソース領域および超電導ドレイン
領域と、前記超電導ソース領域および前記超電導ドレイ
ン領域上に配置され、超電導チャネルに電流を流すソー
ス電極およびドレイン電極と、前記超電導チャネル上に
絶縁層を介して配置されて該超電導チャネルに流れる電
流を制御するゲート電極を具備し、前記超電導ソース領
域および超電導ドレイン領域が前記基板中に形成されて
いることを特徴とする超電導素子が提供される。
Means for Solving the Problems According to the present invention, a superconducting channel formed of an oxide superconducting thin film formed on a substrate, a superconducting source region and a superconducting drain region arranged on both sides of the superconducting channel, A source electrode and a drain electrode that are arranged on the superconducting source region and the superconducting drain region and allow current to flow through the superconducting channel, and a gate electrode that is arranged on the superconducting channel via an insulating layer and controls the current flowing in the superconducting channel. There is provided a superconducting element comprising: the superconducting source region and the superconducting drain region being formed in the substrate.

また、本発明では、上記の超電導素子を作製する方法と
して、酸素イオン注入により酸化物超電導体となる化合
物の層を表面に存する絶縁体基板上または酸素イオン注
入により酸化物超電導体となる化合物の層を表面に有し
、その下の層に絶縁膜を有する半導体基板上に薄い酸化
物超電導薄膜を成膜し、該酸化物超電導薄膜の超電導チ
ャネルとなる部分上にゲート電極を形成した後、該ゲー
ト電極をマスクとしてイオンを注入し、前記酸化物層中
に前記超電導ソース領域および超電導ドレイン領域を形
成する工程を含むことを特徴とする超電導素子の作製方
法が提供される。
In addition, in the present invention, as a method for producing the above superconducting element, a layer of a compound that becomes an oxide superconductor is formed on the surface of an insulating substrate by implanting oxygen ions, or a layer of a compound that becomes an oxide superconductor is formed by implanting oxygen ions. After forming a thin oxide superconducting thin film on a semiconductor substrate having a superconducting layer on the surface and an insulating film as an underlying layer, and forming a gate electrode on a portion of the oxide superconducting thin film that will become a superconducting channel, A method for manufacturing a superconducting element is provided, which includes a step of implanting ions using the gate electrode as a mask to form the superconducting source region and the superconducting drain region in the oxide layer.

作用 本発明の超電導素子は、酸化物超電導体による超電導チ
ャネルと、超電導チャネルに電流を流すソース電極およ
びドレイン電極と、超電導チャネルを流れる電流を制御
するゲート電極とを具備する。本発明の超電導素子では
、各電極は必ずしも超電導電極である必要がない。
Function The superconducting element of the present invention includes a superconducting channel made of an oxide superconductor, a source electrode and a drain electrode that allow current to flow through the superconducting channel, and a gate electrode that controls the current flowing through the superconducting channel. In the superconducting element of the present invention, each electrode does not necessarily have to be a superconducting electrode.

また、従来の超電導FETが、超電導近接効果を利用し
て半導体中に超電導電流を流すのに対し、本発明の超電
導素子では、主電流はm電導体中を流れる。従って、従
来の超電導FETを作製するときに必要な微細加工技術
の制限が緩和される。
Further, while a conventional superconducting FET uses the superconducting proximity effect to cause a superconducting current to flow through the semiconductor, in the superconducting element of the present invention, the main current flows through the m conductor. Therefore, restrictions on microfabrication techniques required when manufacturing conventional superconducting FETs are relaxed.

超電導チャネルは、ゲート電極に印加された電圧で開閉
させるた約に、ゲート電極により発生される電界の方向
で、厚さが5nm程度でなければならない。本発明の主
眼は、このような極薄の超電導チャネルを実現すること
にある。
The superconducting channel must be approximately 5 nm thick in the direction of the electric field generated by the gate electrode in order to be opened and closed by the voltage applied to the gate electrode. The main focus of the present invention is to realize such an ultra-thin superconducting channel.

本発明の方法では、表面に酸素イオン注入により酸化物
超電導体となる化合物の層を備える基板を使用する。そ
して、上記の基板上に最初に約5nm程度の厚さの酸化
物超電導薄膜を成膜する。このような極薄の酸化物超電
導薄膜を成膜するには、薄膜の成長速度をおよび成膜時
間を厳密に制御する方法が一般的であり、スパッタリン
グ法等を使用する場合はこの方法が好ましい。しかしな
がら、酸化物超電導体結晶は、各構成元素がそれぞれ層
状に重なった結晶構造であるので、MBE (分子ビー
ムエピタキシ)法で酸化物超電導体の適当な数のユニッ
トセルを積み上げる方法も好ましい。
The method of the invention uses a substrate whose surface is provided with a layer of a compound that becomes an oxide superconductor by implantation of oxygen ions. Then, an oxide superconducting thin film having a thickness of about 5 nm is first formed on the above substrate. To form such ultra-thin oxide superconducting thin films, it is common to strictly control the growth rate and film formation time of the thin film, and this method is preferable when using sputtering method etc. . However, since the oxide superconductor crystal has a crystal structure in which each constituent element is stacked in layers, it is also preferable to stack up an appropriate number of unit cells of the oxide superconductor using the MBE (molecular beam epitaxy) method.

上記の極薄の酸化物超電導薄膜は、超電導チャネルとし
ては好ましい厚さであるが、ソース領域およびドレイン
領域のためには、厚さが不十分である。従って、ソース
領域およびドレイン領域の超電導層はさらに厚くしなけ
ればならない。超電導チャネル部分を、そのままの厚さ
に保ってソース領域およびドレイン領域の超電導層を厚
くするために、本発明の方法では、超電導チャネル上に
形成されたゲート電極をマスクとして、イオンを注入し
、基板中に酸化物超電導体層を形成し、超電導ソース領
域および超電導ドレイン領域とする。
Although the ultrathin oxide superconducting thin film described above has a preferred thickness for a superconducting channel, it is insufficiently thick for source and drain regions. Therefore, the superconducting layers in the source and drain regions must be made thicker. In order to thicken the superconducting layer in the source and drain regions while keeping the thickness of the superconducting channel portion as it is, the method of the present invention implants ions using the gate electrode formed on the superconducting channel as a mask. An oxide superconductor layer is formed in the substrate to serve as a superconducting source region and a superconducting drain region.

本発明の超電導素子において、基板には、表面に酸素イ
オン注入により酸化物超電導体となる化合物の層を備え
るMgO1SrTIO3等の酸化物単結晶基板が使用可
能である。これらの基板上には、配向性の高い結晶から
なる酸化物超電導薄膜を成長させることが可能であるの
で好ましい。また、上記の化合物の下層にMgAl2O
<およびBaTiO3の層を備えるSi基板を使用する
ことも好ましい。
In the superconducting element of the present invention, an oxide single crystal substrate such as MgO1SrTIO3, which has a layer of a compound that becomes an oxide superconductor by implanting oxygen ions on its surface, can be used as the substrate. These substrates are preferable because it is possible to grow an oxide superconducting thin film made of highly oriented crystals. In addition, MgAl2O is added to the lower layer of the above compound.
It is also preferred to use a Si substrate with a layer of < and BaTiO3.

本発明の超電導素子には、Y−Ba−Cu−0系酸化物
超電導体、Bi −5r −Ca−Cu−○系酸化物超
電導体、TI −Ba −Ca−Cu −0系酸化物超
電導体等任意の酸化物超電導体を使用することができる
The superconducting element of the present invention includes a Y-Ba-Cu-0 based oxide superconductor, a Bi-5r-Ca-Cu-○ based oxide superconductor, and a TI-Ba-Ca-Cu-0 based oxide superconductor. Any oxide superconductor can be used.

以下、本発明を実施例により、さらに詳しく説明するが
、以下の開示は本発明の単なる実施例に過ぎず、本発明
の技術的範囲をなんら制限するものではない。
EXAMPLES Hereinafter, the present invention will be explained in more detail with reference to Examples, but the following disclosure is merely an example of the present invention and does not limit the technical scope of the present invention in any way.

実施例 第1図に、本発明の超電導素子の断面図を示す。Example FIG. 1 shows a cross-sectional view of the superconducting element of the present invention.

第1図の超電導素子は、基板5上に成膜された厚さ約5
nmの極薄の酸化物超電導薄膜1を有する。
The superconducting element shown in FIG.
It has an ultra-thin oxide superconducting thin film 1 of nm thickness.

酸化物超電導薄膜1のほぼ中央部は、超電導チャネルl
Oとなっており、超電導チャネル10の上には、絶縁体
6を介してゲート電極4が形成されている。
Almost at the center of the oxide superconducting thin film 1 is a superconducting channel l.
A gate electrode 4 is formed on the superconducting channel 10 with an insulator 6 in between.

基板5中の超電導チャネル10の両側の部分には、酸化
物超電導薄膜1に連続して約200 nmの厚さの超電
導ソース領域12および超電導ドレイン領域13が形成
されている。超電導ソース領域12および超電導ドレイ
ン領域13の上には、それぞれソース電極2およびドレ
イン電極3が設けられている。
On both sides of the superconducting channel 10 in the substrate 5, a superconducting source region 12 and a superconducting drain region 13 having a thickness of about 200 nm are formed continuously from the oxide superconducting thin film 1. A source electrode 2 and a drain electrode 3 are provided on the superconducting source region 12 and the superconducting drain region 13, respectively.

第2図を参照して、本発明の超電導素子を本発明の方法
で作製する手順を説明する。まず、スパッタリング法等
で形成されたY+Ba2Cu307−y層50を表面に
有する第2図(a)に示すような基板5の表面に第2図
面に示すよう約5nm程度の極薄のY+BaaCu30
t〜8酸化物超電導薄膜1をオファクシススバッタリン
グ法、反応性蒸着法、MBE法、CVD法等の方法で形
成する。YJa2Cu+07−YはY 1Ba2Cu3
0 q−ウ酸化物超電導体と比較した場合に、構成元素
が同じで、y>xで結晶中の酸素数が少ない絶縁性を示
す酸化物であり、酸素イオン注入により容易にYIBa
2Cu+ Ch−x酸化物超電導体になる。基板5とし
ては、表面に上記の酸化物層50を有するMg0(10
0)基板、5rTtC1+  (100)基板等の絶縁
体基板、または表面の酸化物層50の下層に絶縁膜を有
する31等の半導体基板が好ましい。この81基板は、
CVD法で成膜されたMgA120nおよびスパッタリ
ング法で成膜されたBaTiO3の層を酸化物層50の
下層に有することが好ましい。
Referring to FIG. 2, the procedure for manufacturing the superconducting element of the present invention using the method of the present invention will be described. First, on the surface of a substrate 5 as shown in FIG. 2(a), which has a Y+Ba2Cu307-y layer 50 formed by sputtering or the like, an extremely thin Y+BaaCu30 layer 50 of about 5 nm is deposited on the surface of the substrate 5 as shown in FIG. 2(a).
The t~8 oxide superconducting thin film 1 is formed by a method such as an oxidative sputtering method, a reactive vapor deposition method, an MBE method, or a CVD method. YJa2Cu+07-Y is Y1Ba2Cu3
When compared with 0q-U oxide superconductor, it is an oxide that has the same constituent elements and exhibits insulating properties with a small number of oxygen in the crystal when y>x, and can be easily converted into YIBa by oxygen ion implantation.
2Cu+ Ch-x becomes an oxide superconductor. The substrate 5 is made of Mg0 (10
0) substrate, an insulating substrate such as a 5rTtC1+ (100) substrate, or a semiconductor substrate such as 31 having an insulating film under the oxide layer 50 on the surface is preferable. This 81 board is
It is preferable to have a layer of MgA120n formed by a CVD method and a BaTiO3 layer formed by a sputtering method as a layer below the oxide layer 50.

酸化物超電導体としては、Y−Ba−Cu−〇系酸化物
超電導体の他Bi −5r−Ca−Cu −0系酸化物
超電導体、TI −Ba−Ca−Cu −0系酸化物超
電導体が好ましく、C軸配向の薄膜とすることが好まし
い。
Examples of oxide superconductors include Y-Ba-Cu-○-based oxide superconductors, Bi-5r-Ca-Cu-0-based oxide superconductors, and TI-Ba-Ca-Cu-0-based oxide superconductors. is preferable, and a thin film with C-axis orientation is preferable.

これは、C軸配向の酸化物超電導薄膜は、基板と平行な
方向の臨界電流密度が大きいからである。
This is because the C-axis oriented oxide superconducting thin film has a large critical current density in the direction parallel to the substrate.

次に、第2図(C)に示すよう酸化物超電導薄膜1上に
絶縁膜16を積層する。絶縁膜16の厚さはlQnm以
上にする。絶縁膜16にはMgO等酸化物超電導薄膜と
の界面で大きな準位を作らない絶縁体を用いることが好
ましい。絶縁膜16上に第2図(社)に示すようゲート
電極用の金属層14を積層する。金属層14には^Uま
たはT1、W等の高融点金属、これらのシリサイドを用
いることが好ましい。
Next, as shown in FIG. 2(C), an insulating film 16 is laminated on the oxide superconducting thin film 1. The thickness of the insulating film 16 is set to 1Q nm or more. It is preferable to use an insulator such as MgO for the insulating film 16 that does not create a large level at the interface with the oxide superconducting thin film. A metal layer 14 for a gate electrode is laminated on the insulating film 16 as shown in FIG. For the metal layer 14, it is preferable to use a high melting point metal such as ^U, T1, or W, or a silicide thereof.

この金属膜14の不要な部分をエツチング等により除去
し、第2図(e)に示すよう、ゲート電極4に加工する
。絶縁膜16はそのままにして、上記のように形成され
たゲート電極4をマスクとして、酸素イオンを注入し、
酸化物層50の一部を超電導体化する。
Unnecessary portions of this metal film 14 are removed by etching or the like and processed into a gate electrode 4 as shown in FIG. 2(e). Leaving the insulating film 16 as it is, oxygen ions are implanted using the gate electrode 4 formed as described above as a mask.
A part of the oxide layer 50 is made into a superconductor.

注入エネルギ150keV以下で上記のイオン注入を行
った後、基板5を450℃まで加熱し、30分間その温
度を保持する熱処理を行った。この熱処理により、基板
5の酸化物層50のゲート電極4の下方以外の部分には
、第2図(f)に示すよう、酸化物超電導薄膜1と連続
した超電導ソース領域12および超電導ドレイン領域1
3が形成される。また、酸化物超電導薄膜1のゲート電
極4の下側の部分は超電導チャネル10となる。
After performing the above ion implantation at an implantation energy of 150 keV or less, a heat treatment was performed in which the substrate 5 was heated to 450° C. and held at that temperature for 30 minutes. As a result of this heat treatment, a superconducting source region 12 and a superconducting drain region 1 that are continuous with the oxide superconducting thin film 1 are formed in the oxide layer 50 of the substrate 5 other than below the gate electrode 4, as shown in FIG. 2(f).
3 is formed. Further, a portion of the oxide superconducting thin film 1 below the gate electrode 4 becomes a superconducting channel 10.

上記のイオン注入−熱処理の工程に代えて、集束イオン
ビーム照射して、超電導ソース領域12および超電導ド
レイン領域13を形成することも可能である。この場合
、集束イオンビームを照射する場合は、酸素イオンを照
射エネルギ150keV以下で照射することが好ましい
Instead of the ion implantation-heat treatment process described above, it is also possible to form the superconducting source region 12 and the superconducting drain region 13 by performing focused ion beam irradiation. In this case, when irradiating with a focused ion beam, it is preferable to irradiate oxygen ions with an irradiation energy of 150 keV or less.

超電導ソース領域12および超電導ドレイン領域13が
形成されたら、第2図(g’)に示すよう、絶縁体膜1
6の不要部分を除去し、絶縁層6を形成する。
After the superconducting source region 12 and superconducting drain region 13 are formed, as shown in FIG. 2(g'), the insulating film 1 is
Unnecessary portions of 6 are removed to form an insulating layer 6.

このとき、必要に応じサイドエッチを促進し、絶縁層6
の長さを短くする。最後に、ゲート電極4と同様にAu
または7iSW、これらのシリサイドを用いて、超電導
ソース領域12および超電導ドレイン領域13それぞれ
の上にソース電極2およびドレイン電極3を形成する。
At this time, side etching is promoted as necessary, and the insulating layer 6
shorten the length of Finally, similarly to the gate electrode 4, Au
Alternatively, using 7iSW and these silicides, the source electrode 2 and the drain electrode 3 are formed on the superconducting source region 12 and the superconducting drain region 13, respectively.

本発明の超電導素子を本発明の方法で作製すると、超電
導FETを作製する場合に要求される微細加工技術の制
限が緩和される。また、表面が平坦にできるので、後に
必要に応じ配線を形成することが容易になる。従って、
作製が容易であり、素子の性能も安定しており、再現性
もよい。
When the superconducting element of the present invention is manufactured by the method of the present invention, restrictions on microfabrication techniques required when manufacturing a superconducting FET are relaxed. Furthermore, since the surface can be made flat, it becomes easier to form wiring later as required. Therefore,
It is easy to manufacture, has stable device performance, and has good reproducibility.

発明の詳細 な説明したように、本発明の超電導素子は、超電導チャ
ネル中を流れる超電導電流をゲート電圧で制御する構成
となっている。従って、従来の超電導FETのように、
超電導近接効果を利用していないので微細加工技術が不
要である。また、超電導体と半導体を積層する必要もな
いので、酸化物超電導体を使用して高性能な素子が作製
できる。
As described in detail, the superconducting element of the present invention has a configuration in which the superconducting current flowing in the superconducting channel is controlled by the gate voltage. Therefore, like the conventional superconducting FET,
Since it does not utilize the superconducting proximity effect, microfabrication technology is not required. Furthermore, since there is no need to stack a superconductor and a semiconductor, high-performance devices can be manufactured using oxide superconductors.

本発明により、超電導技術の電子デバイスへの応用がさ
らに促進される。
The present invention further promotes the application of superconducting technology to electronic devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の超電導素子の概略図であり、第2図
は、本発明の方法により本発明の超電導素子を作製する
場合の工程を示す概略図であり、第3図は、超電導ベー
ストランジスタの概略図であり、 第4図は、超電導FETの概略図である。 〔主な参照番号〕 1・・・酸化物超電導薄膜、 2・・・ソース電極、 3・・・ドレイン電極、 4・・・ゲート電極、 5・・・基板
FIG. 1 is a schematic diagram of the superconducting device of the present invention, FIG. 2 is a schematic diagram showing the steps for producing the superconducting device of the present invention by the method of the present invention, and FIG. 3 is a schematic diagram of the superconducting device of the present invention. FIG. 4 is a schematic diagram of a base transistor; FIG. 4 is a schematic diagram of a superconducting FET. [Main reference numbers] 1... Oxide superconducting thin film, 2... Source electrode, 3... Drain electrode, 4... Gate electrode, 5... Substrate

Claims (2)

【特許請求の範囲】[Claims] (1)基板上に成膜された酸化物超電導薄膜で形成され
た超電導チャネルと、該超電導チャネルの両側に配置さ
れた超電導ソース領域および超電導ドレイン領域と、前
記超電導ソース領域および前記超電導ドレイン領域上に
配置され、超電導チャネルに電流を流すソース電極およ
びドレイン電極と、前記超電導チャネル上に絶縁層を介
して配置されて該超電導チャネルに流れる電流を制御す
るゲート電極を具備し、前記超電導ソース領域および超
電導ドレイン領域が前記基板中に形成されていることを
特徴とする超電導素子。
(1) A superconducting channel formed of an oxide superconducting thin film formed on a substrate, a superconducting source region and a superconducting drain region arranged on both sides of the superconducting channel, and above the superconducting source region and the superconducting drain region. a source electrode and a drain electrode arranged in the superconducting channel to flow a current through the superconducting channel, and a gate electrode arranged on the superconducting channel via an insulating layer to control the current flowing in the superconducting channel, the superconducting source region and A superconducting element, characterized in that a superconducting drain region is formed in the substrate.
(2)請求項1に記載の超電導素子を作製する方法にお
いて、酸素イオン注入により酸化物超電導体となる化合
物の層を表面に有する絶縁体基板上または酸素イオン注
入により酸化物超電導体となる化合物の層を表面に有し
、その下の層に絶縁膜を有する半導体基板上に薄い酸化
物超電導薄膜を成膜し、該酸化物超電導薄膜の超電導チ
ャネルとなる部分上にゲート電極を形成した後、該ゲー
ト電極をマスクとしてイオンを注入し、前記酸化物層中
に前記超電導ソース領域および超電導ドレイン領域を形
成する工程を含むことを特徴とする超電導素子の作製方
法。
(2) In the method for producing a superconducting element according to claim 1, a compound that becomes an oxide superconductor by implanting oxygen ions on an insulating substrate having a layer of a compound that becomes an oxide superconductor by implanting oxygen ions on its surface; After forming a thin oxide superconducting thin film on a semiconductor substrate having a layer of A method for manufacturing a superconducting element, comprising the steps of: implanting ions using the gate electrode as a mask to form the superconducting source region and the superconducting drain region in the oxide layer.
JP2257855A 1990-09-27 1990-09-27 Superconducting element and fabrication method Expired - Lifetime JP2641971B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2257855A JP2641971B2 (en) 1990-09-27 1990-09-27 Superconducting element and fabrication method
EP91402594A EP0478464B1 (en) 1990-09-27 1991-09-27 Method for manufacturing a superconducting device having an extremely thin superconducting channel formed of oxide superconductor material
DE69127418T DE69127418T2 (en) 1990-09-27 1991-09-27 Manufacturing process of a superconducting component with an extremely thin superconducting channel made of superconducting oxide material
CA002052380A CA2052380C (en) 1990-09-27 1991-09-27 Superconducting device having an extremely thin superconducting channel formed of oxide superconductor material and method for manufacturing the same
US08/652,846 US5717222A (en) 1990-09-27 1996-05-23 Superconducting device having an extremely thin superconducting channel formed of oxide superconductor material and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2257855A JP2641971B2 (en) 1990-09-27 1990-09-27 Superconducting element and fabrication method

Publications (2)

Publication Number Publication Date
JPH04134885A true JPH04134885A (en) 1992-05-08
JP2641971B2 JP2641971B2 (en) 1997-08-20

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Country Link
JP (1) JP2641971B2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63281481A (en) * 1987-05-13 1988-11-17 Hitachi Ltd Superconducting switching element
JPS6428876A (en) * 1987-07-23 1989-01-31 Matsushita Electric Ind Co Ltd Manufacture of superconducting 3-terminal element
JPH01170080A (en) * 1987-12-25 1989-07-05 Furukawa Electric Co Ltd:The Superconducting fet element
JPH0272685A (en) * 1988-09-07 1990-03-12 Fujitsu Ltd Method for forming weakly coupled superconductor part
JPH02234479A (en) * 1989-03-07 1990-09-17 Nec Corp Superconducting device and manufacture thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63281481A (en) * 1987-05-13 1988-11-17 Hitachi Ltd Superconducting switching element
JPS6428876A (en) * 1987-07-23 1989-01-31 Matsushita Electric Ind Co Ltd Manufacture of superconducting 3-terminal element
JPH01170080A (en) * 1987-12-25 1989-07-05 Furukawa Electric Co Ltd:The Superconducting fet element
JPH0272685A (en) * 1988-09-07 1990-03-12 Fujitsu Ltd Method for forming weakly coupled superconductor part
JPH02234479A (en) * 1989-03-07 1990-09-17 Nec Corp Superconducting device and manufacture thereof

Also Published As

Publication number Publication date
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