JPH01170080A - Superconducting fet element - Google Patents
Superconducting fet elementInfo
- Publication number
- JPH01170080A JPH01170080A JP62329052A JP32905287A JPH01170080A JP H01170080 A JPH01170080 A JP H01170080A JP 62329052 A JP62329052 A JP 62329052A JP 32905287 A JP32905287 A JP 32905287A JP H01170080 A JPH01170080 A JP H01170080A
- Authority
- JP
- Japan
- Prior art keywords
- superconductor
- layer
- superconducting
- electrode
- controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002887 superconductor Substances 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 239000004065 semiconductor Substances 0.000 claims abstract description 16
- 230000005684 electric field Effects 0.000 claims abstract description 9
- 229910002480 Cu-O Inorganic materials 0.000 claims 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims 1
- 229910052761 rare earth metal Inorganic materials 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 7
- 239000000969 carrier Substances 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract description 3
- 230000005668 Josephson effect Effects 0.000 abstract 1
- 230000001105 regulatory effect Effects 0.000 abstract 1
- 239000013078 crystal Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、情報処理や電力分野に適した高速でかつ大容
量の電流を低損失で制御できる電流スイッチング用素子
に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a current switching element that is suitable for information processing and power fields and is capable of controlling high-speed, large-capacity current with low loss.
(従来の技術)
従来、少数キャリアを制御することにより超電導体の超
電導特性を制御したスイッチング素子が提案されていた
。(Prior Art) Conventionally, switching elements have been proposed in which the superconducting characteristics of a superconductor are controlled by controlling minority carriers.
(本発明が解決しようとする問題点)
しかしながら、従来のスイッチング素子は、主としてジ
日セフソン素子(Josephson device)
やS Q U I D (Super conduct
ing Quantum Interference
Device)などのように、超電導近接効果を利用し
たものが殆どであり、高速化が可能であるものの、大電
流を制御するいわゆる大容量化が困難であった。(Problems to be Solved by the Present Invention) However, conventional switching elements are mainly Josephson devices.
and S Q U I D (Super conduct
ing Quantum Interference
Most of the devices utilize the superconducting proximity effect, such as 2017-2013 (Device), and although they are capable of increasing speed, it has been difficult to increase the so-called large capacity by controlling large currents.
(問題点を解決するための手段)
本発明はかかる点に鑑みなされたもので、半導体基板上
に超電導層が形成された表面あるいは裏面に誘電体層を
介して電極が形成され、超電導層と電極との間に加える
電界を制御することにより、超電導層を超電導体、非超
電導体に制御し、超電導層に流れる電流を制御すること
を特徴とする超電導FET素子である。(Means for Solving the Problems) The present invention has been made in view of the above points, and an electrode is formed via a dielectric layer on the front or back surface of a semiconductor substrate on which a superconducting layer is formed. This is a superconducting FET device characterized by controlling the superconducting layer to be a superconductor or a non-superconductor by controlling the electric field applied between the superconducting layer and the electrode, and controlling the current flowing through the superconducting layer.
(作用)
超電導層と電極との間に加える電界を制御することによ
り、電界効果により直接、超電導層の多数キャリア(I
O”cm−”台程度)を制御する。即ち、電界を印加
することにより、超電導層と誘電体層の界面に電荷をチ
ャージさせ、超電導層内の電子対を撲滅させ、これによ
り超電導層を非超電導体にして流れる電流を少なくする
。(Function) By controlling the electric field applied between the superconducting layer and the electrode, the majority carriers (I
(on the order of O"cm-"). That is, by applying an electric field, charges are charged at the interface between the superconducting layer and the dielectric layer, eliminating electron pairs within the superconducting layer, thereby making the superconducting layer a non-superconductor and reducing the amount of current flowing.
半導体基板はS 1SGaAss I nP等を用いる
のが良い。As the semiconductor substrate, it is preferable to use S1S GaAss InP or the like.
誘電体層はS r T i Os 、Mg Os Ta
xes等を用いるのが良い。The dielectric layer is SrTiOs, MgOsTa
It is better to use xes etc.
(実施例1)
以下、本発明の一実施例を図示した第1図によって説明
する0図において、+11はSi単結晶基板による半導
体基板、(2)は半導体基板+11の上に構成されたY
BaxCusOi、s等の超電導層、(3)は5rTi
Osによって構成された誘電体層、(4)はAuによっ
て構成された電極、(5)は電極(4)に接続したゲー
ト端子、(6)および(7)はそれぞれ電極(4)を挟
んで超電導層(2)と接続し構成されたソース端子およ
びドレイン端子である。(Example 1) Hereinafter, in Figure 0, which will be explained with reference to Figure 1, which illustrates one embodiment of the present invention, +11 is a semiconductor substrate made of a Si single crystal substrate, and (2) is a semiconductor substrate formed on the semiconductor substrate +11.
Superconducting layer such as BaxCusOi, s, (3) is 5rTi
A dielectric layer made of Os, (4) an electrode made of Au, (5) a gate terminal connected to the electrode (4), and (6) and (7) each sandwiching the electrode (4). These are a source terminal and a drain terminal connected to the superconducting layer (2).
超電導層(2)は約2000人の厚さに構成され、臨界
温度が約89″にで緻密なC軸配向を持つものである。The superconducting layer (2) has a thickness of about 2000 nm, has a critical temperature of about 89'', and has a dense C-axis orientation.
また誘電体層(3)を形成する個所の超電導層(2)を
、リソグラフィ技術によってパターニングを行い、ドラ
イエツチングによって(RrBE=Reactive
on beaa+ etching、 C1、ガスを使
用)溝部を形成した。これによってこの溝部の超N、導
層(3)の厚さは1200人に構成されている。誘電体
層(3)の厚さは800人に、また電極(4)は200
0人に構成されている。In addition, the superconducting layer (2) at the location where the dielectric layer (3) is to be formed is patterned using lithography technology, and dry etching is performed (RrBE=Reactive
(on beaa+ etching, C1, using gas) grooves were formed. As a result, the thickness of the ultra-N conductive layer (3) in this groove is 1200. The thickness of the dielectric layer (3) is 800 mm, and the thickness of the electrode (4) is 200 mm.
It is composed of 0 people.
このように構成された上記実施例の超電導FET素子を
、液体温度雰囲気下に冷却し、ゲート(5)とソース(
6)との間に500■の電圧を印加した所、ソース(6
)およびドレイン(7)との超電導状態が非超電導状態
に変化した。The superconducting FET device of the above example configured in this way is cooled in a liquid temperature atmosphere, and the gate (5) and source (
When a voltage of 500μ is applied between the source (6) and the
) and the drain (7) changed to a non-superconducting state.
(実施例2)
次に、本発明の他の実施例を図示した第2図によって説
明する0図において、Ol)はSi単結晶基板による半
導体基板、@は半導体基板(1)の裏面にMgOによっ
て構成された誘電体層、alは誘電体層(財)上にAI
によって構成された電極、Q4)(ロ)はそれぞれ半導
体基板αυの表面に形成された5iftの絶縁層、αり
は絶縁層(ロ)α旬を跨ぐ間に形成されたYBa、Cu
、Ohlの超電導層、αeは電極α簿と接続したゲート
端子、αり及びα−は絶縁層(ロ)(ロ)上の超電導層
αりと接続したソース端子およびゲート端子である。(Example 2) Next, in Figure 0, which will be explained with reference to Figure 2, which illustrates another example of the present invention, Ol) is a semiconductor substrate made of a Si single crystal substrate, @ is an MgO A dielectric layer composed of Al is on the dielectric layer (material).
Q4) (b) is an insulating layer of 5ft formed on the surface of the semiconductor substrate αυ, and (b) is an insulating layer (b) of YBa, Cu formed between αυ.
, Ohl are the superconducting layers, αe is the gate terminal connected to the electrode α, and α and α− are the source and gate terminals connected to the superconducting layer α on the insulating layers (B) and (B).
誘電体層(財)を形成する半導体基板αDの裏面はRI
BE法によって溝が構成され、その溝部分の半導体基板
αDの厚さが約1000人に構成され、その溝を跨ぐよ
うに誘電体層(2)および電極側が積層されている。絶
縁体041G旬はそれぞれ前記溝を跨ぐように1500
人の厚さで半導体基板αυの表面に構成され、また超電
導層a9は1200人の厚さで構成されている。The back surface of the semiconductor substrate αD forming the dielectric layer (goods) is RI.
A groove is formed by the BE method, the thickness of the semiconductor substrate αD at the groove portion is approximately 1000 mm, and the dielectric layer (2) and the electrode side are laminated so as to straddle the groove. The insulators 041G are each 1500mm thick so as to straddle the grooves.
The superconducting layer a9 is formed on the surface of the semiconductor substrate αυ with a thickness of 1200 nm thick.
このように構成された第二実施例の超電導FET素子を
、液体温度雰囲気下に冷却し、ゲー)019とソースQ
?+との間に550Vの電圧を印加した所、ソース0η
およびドレインOIとの超電導状態が非超電導状態に変
化した。The superconducting FET device of the second embodiment configured in this way was cooled in a liquid temperature atmosphere, and
? When a voltage of 550V is applied between + and source 0η
And the superconducting state with the drain OI changed to a non-superconducting state.
(発明の効果)
本発明は以上詳述したように、半導体基板上に超電導層
が形成された表面あるいは裏面に誘電体層を介して電極
が形成され、超電導層と電極との間に加える電界を制御
することにより、超電導層を超電導体、非超7!1導体
に制御し、超電導層に流れる電流を制御することを特徴
とする超電4FET素子である。このため超電導層と電
極との間に加える電界を制御することにより、多数キャ
リアを制御して超?it導層を超電導体、非超電導体に
制御するようにしたので、高速変調が可能であり、また
従来のようにジッセフソン効果、超電導近接効果と異な
り、直接超電導体内の導電電流を利用する為、臨界電流
密度まで電流を流すことが出来、大容量のスイッチング
を行うことができる優れた効果がある。(Effects of the Invention) As described in detail above, the present invention is characterized in that an electrode is formed on the front or back surface of a semiconductor substrate on which a superconducting layer is formed via a dielectric layer, and an electric field is applied between the superconducting layer and the electrode. This is a superconducting 4FET device characterized by controlling the superconducting layer to be a superconductor or a non-superconducting 7!1 conductor, and controlling the current flowing through the superconducting layer. Therefore, by controlling the electric field applied between the superconducting layer and the electrode, majority carriers can be controlled and Since the IT conductive layer is controlled to be a superconductor or a non-superconductor, high-speed modulation is possible.Also, unlike the conventional Gisefson effect and superconducting proximity effect, it directly utilizes the conduction current within the superconductor. It has the excellent effect of allowing current to flow up to a critical current density and performing large-capacity switching.
第1図は本発明の一実施例を図示した断面図、第2図は
本発明の他の実施例を示した断面図である。
(l)0υは半導体基板、(2)αつは超電導層、(3
)側は誘電体層、+41 G31は電極である。
特許出願人 古河電気工業株式会社
第1図
第2図FIG. 1 is a sectional view showing one embodiment of the present invention, and FIG. 2 is a sectional view showing another embodiment of the invention. (l) 0υ is the semiconductor substrate, (2) α is the superconducting layer, (3
) side is a dielectric layer, +41 G31 is an electrode. Patent applicant Furukawa Electric Co., Ltd. Figure 1 Figure 2
Claims (5)
は裏面に誘電体層を介して電極が形成され、超電導層と
電極との間に加える電界を制御することにより、超電導
層を超電導体、非超電導体に制御し、超電導層に流れる
電流を制御することを特徴とする超電導FET素子。(1) An electrode is formed via a dielectric layer on the front or back surface of a semiconductor substrate on which a superconducting layer is formed, and by controlling the electric field applied between the superconducting layer and the electrode, the superconducting layer can be transformed into a superconductor. A superconducting FET element characterized in that it is controlled to be a non-superconductor and that current flowing through a superconducting layer is controlled.
類)から構成されていることを特徴とする特許請求の範
囲第1項記載の超電導FET素子。(2) The superconducting FET element according to claim 1, wherein the superconducting layer is composed of an RE-Ba-Cu-O system (RE is a rare earth element).
を特徴とする特許請求の範囲第1項または第2項記載の
超電導FET素子。(3) The superconducting FET element according to claim 1 or 2, wherein the C-axis of the superconducting layer is perpendicular to the plane of the semiconductor substrate.
で構成されていることを特徴とする特許請求の範囲第1
〜3項のいずれか1つの項に記載の超電導FET素子。(4) Claim 1, characterized in that the semiconductor substrate is made of Si, GaAs, or InP.
The superconducting FET device according to any one of items 1 to 3.
_5SiO_2のいずれかで構成されてなることを特徴
とする特許請求の範囲第1〜4項のいずれか1つの項に
記載の超電導FET素子。(5) Dielectric layer is SrTiO_3, MgO, Ta_2O
The superconducting FET element according to any one of claims 1 to 4, characterized in that the superconducting FET element is made of any one of _5SiO_2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62329052A JPH01170080A (en) | 1987-12-25 | 1987-12-25 | Superconducting fet element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62329052A JPH01170080A (en) | 1987-12-25 | 1987-12-25 | Superconducting fet element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01170080A true JPH01170080A (en) | 1989-07-05 |
Family
ID=18217075
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62329052A Pending JPH01170080A (en) | 1987-12-25 | 1987-12-25 | Superconducting fet element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01170080A (en) |
Cited By (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04134881A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134887A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134882A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134885A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134888A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Manufacture of superconducting device |
JPH04134886A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04137681A (en) * | 1990-09-28 | 1992-05-12 | Sumitomo Electric Ind Ltd | Superconducting device and its manufacture |
JPH04165682A (en) * | 1990-10-30 | 1992-06-11 | Sumitomo Electric Ind Ltd | Superconducting element and manufacture thereof |
JPH04166331A (en) * | 1990-10-30 | 1992-06-12 | Chisso Corp | Foamed sheet and its manufacture |
JPH04168781A (en) * | 1990-11-01 | 1992-06-16 | Sumitomo Electric Ind Ltd | Superconducting element and manufacture thereof |
JPH04168782A (en) * | 1990-11-01 | 1992-06-16 | Sumitomo Electric Ind Ltd | Superconducting element and manufacture thereof |
JPH05152628A (en) * | 1991-11-30 | 1993-06-18 | Sumitomo Electric Ind Ltd | Superconducting field effect element and its manufacture |
JPH05160454A (en) * | 1991-12-10 | 1993-06-25 | Sumitomo Electric Ind Ltd | Superconducting field effect device and manufacture thereof |
JPH05291637A (en) * | 1992-04-09 | 1993-11-05 | Sumitomo Electric Ind Ltd | Superconductive field effect type element |
US5326988A (en) * | 1990-04-16 | 1994-07-05 | Nec Corporation | Superconducting switching device and method of manufacturing same |
US5407903A (en) * | 1990-09-28 | 1995-04-18 | Sumitomo Electric Industries, Ltd. | Superconducting device having a reduced thickness of oxide superconducting layer |
US5413982A (en) * | 1991-12-13 | 1995-05-09 | Sumitomo Electric Industries, Ltd. | Field effect transistor having c-axis channel layer |
US5416072A (en) * | 1990-11-01 | 1995-05-16 | Sumitomo Electric Industries, Ltd. | Superconducting device having an thin superconducting channel formed of oxide superconducting material |
US5446015A (en) * | 1990-09-19 | 1995-08-29 | Sumitomo Electric Industries, Ltd. | Superconducting device having a reduced thickness of oxide superconducting layer |
US5462919A (en) * | 1991-08-28 | 1995-10-31 | Sumitomo Electric Industries,Ltd. | Method for manufacturing superconducting thin film formed of oxide superconductor having non superconducting region and device utilizing the superconducting thin film |
US5506197A (en) * | 1991-12-13 | 1996-04-09 | Sumitomo Electric Industries, Ltd. | Superconducting device having an extremely thin superconducting channel formed of oxide superconductor material |
US6774463B1 (en) | 1990-02-01 | 2004-08-10 | International Business Machines Corporation | Superconductor gate semiconductor channel field effect transistor |
-
1987
- 1987-12-25 JP JP62329052A patent/JPH01170080A/en active Pending
Cited By (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6774463B1 (en) | 1990-02-01 | 2004-08-10 | International Business Machines Corporation | Superconductor gate semiconductor channel field effect transistor |
US5326988A (en) * | 1990-04-16 | 1994-07-05 | Nec Corporation | Superconducting switching device and method of manufacturing same |
US5446015A (en) * | 1990-09-19 | 1995-08-29 | Sumitomo Electric Industries, Ltd. | Superconducting device having a reduced thickness of oxide superconducting layer |
JPH04134887A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134882A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134885A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134888A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Manufacture of superconducting device |
JPH04134886A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
JPH04134881A (en) * | 1990-09-27 | 1992-05-08 | Sumitomo Electric Ind Ltd | Superconducting device and manufacture thereof |
US5434127A (en) * | 1990-09-28 | 1995-07-18 | Sumitomo Electric Industries, Ltd. | Method for manufacturing superconducting device having a reduced thickness of oxide superconducting layer |
US5407903A (en) * | 1990-09-28 | 1995-04-18 | Sumitomo Electric Industries, Ltd. | Superconducting device having a reduced thickness of oxide superconducting layer |
JPH04137681A (en) * | 1990-09-28 | 1992-05-12 | Sumitomo Electric Ind Ltd | Superconducting device and its manufacture |
JP2507168B2 (en) * | 1990-10-30 | 1996-06-12 | チッソ株式会社 | Foam sheet and method for producing the same |
JPH04166331A (en) * | 1990-10-30 | 1992-06-12 | Chisso Corp | Foamed sheet and its manufacture |
JPH04165682A (en) * | 1990-10-30 | 1992-06-11 | Sumitomo Electric Ind Ltd | Superconducting element and manufacture thereof |
JPH04168782A (en) * | 1990-11-01 | 1992-06-16 | Sumitomo Electric Ind Ltd | Superconducting element and manufacture thereof |
US5416072A (en) * | 1990-11-01 | 1995-05-16 | Sumitomo Electric Industries, Ltd. | Superconducting device having an thin superconducting channel formed of oxide superconducting material |
JPH04168781A (en) * | 1990-11-01 | 1992-06-16 | Sumitomo Electric Ind Ltd | Superconducting element and manufacture thereof |
US5462919A (en) * | 1991-08-28 | 1995-10-31 | Sumitomo Electric Industries,Ltd. | Method for manufacturing superconducting thin film formed of oxide superconductor having non superconducting region and device utilizing the superconducting thin film |
JPH05152628A (en) * | 1991-11-30 | 1993-06-18 | Sumitomo Electric Ind Ltd | Superconducting field effect element and its manufacture |
JPH05160454A (en) * | 1991-12-10 | 1993-06-25 | Sumitomo Electric Ind Ltd | Superconducting field effect device and manufacture thereof |
US5413982A (en) * | 1991-12-13 | 1995-05-09 | Sumitomo Electric Industries, Ltd. | Field effect transistor having c-axis channel layer |
US5506197A (en) * | 1991-12-13 | 1996-04-09 | Sumitomo Electric Industries, Ltd. | Superconducting device having an extremely thin superconducting channel formed of oxide superconductor material |
US5539215A (en) * | 1991-12-13 | 1996-07-23 | Sumitomo Electric Industries, Ltd. | Superconducting device having an extremely thin superconducting channel formed of oxide superconductor material |
US5789346A (en) * | 1991-12-13 | 1998-08-04 | Sumitomo Electric Industries, Ltd. | Method for manufacturing an oxide superconductor device |
JPH05291637A (en) * | 1992-04-09 | 1993-11-05 | Sumitomo Electric Ind Ltd | Superconductive field effect type element |
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