JP2614941B2 - Superconducting element and fabrication method - Google Patents
Superconducting element and fabrication methodInfo
- Publication number
- JP2614941B2 JP2614941B2 JP2294287A JP29428790A JP2614941B2 JP 2614941 B2 JP2614941 B2 JP 2614941B2 JP 2294287 A JP2294287 A JP 2294287A JP 29428790 A JP29428790 A JP 29428790A JP 2614941 B2 JP2614941 B2 JP 2614941B2
- Authority
- JP
- Japan
- Prior art keywords
- superconducting
- thin film
- oxide
- channel
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims description 18
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000010409 thin film Substances 0.000 claims description 50
- 239000000758 substrate Substances 0.000 claims description 31
- 239000010408 film Substances 0.000 claims description 30
- 230000001681 protective effect Effects 0.000 claims description 15
- 239000002887 superconductor Substances 0.000 description 29
- 239000004065 semiconductor Substances 0.000 description 11
- 239000004020 conductor Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 238000010884 ion-beam technique Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910015901 Bi-Sr-Ca-Cu-O Inorganic materials 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- 229910002480 Cu-O Inorganic materials 0.000 description 2
- 229910002367 SrTiO Inorganic materials 0.000 description 2
- 229910009203 Y-Ba-Cu-O Inorganic materials 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 229910020068 MgAl Inorganic materials 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 210000003754 fetus Anatomy 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、超電導素子およびその作製方法に関する。
より詳細には、新規な構成の超電導素子およびその作製
方法に関する。Description: TECHNICAL FIELD The present invention relates to a superconducting element and a method for manufacturing the same.
More specifically, the present invention relates to a superconducting element having a novel configuration and a method for manufacturing the same.
従来の技術 超電導を使用した代表的な素子に、ジョセフソン素子
がある。ジョセフソン素子は、一対の超電導体をトンネ
ル障壁を介して結合した構成であり、高速スイッチング
動作が可能である。しかしながら、ジョセフソン素子は
２端子の素子であり、論理回路を実現するためには複雑
な回路構成になってしまう。2. Description of the Related Art A typical element using superconductivity is a Josephson element. The Josephson element has a configuration in which a pair of superconductors are coupled via a tunnel barrier, and can perform high-speed switching operation. However, the Josephson element is a two-terminal element, and requires a complicated circuit configuration to realize a logic circuit.
一方、超電導を利用した３端子素子としては、超電導
ベーストランジスタ、超電導FET等がある。第３図に、
超電導ベーストランジスタの概念図を示す。第３図の超
電導ベーストランジスタは、超電導体または常電導体で
構成されたエミッタ21、絶縁体で構成されたトンネル障
壁22、超電導体で構成されたベース23、半導体アイソレ
ータ24および常電導体で構成されたコレクタ25を積層し
た構成になっている。この超電導ベーストランジスタ
は、トンネル障壁22を通過した高速電子を利用した低電
力消費、高速動作の素子である。On the other hand, examples of a three-terminal element utilizing superconductivity include a superconducting base transistor and a superconducting FET. In FIG.
1 shows a conceptual diagram of a superconducting base transistor. The superconducting base transistor shown in FIG. 3 comprises an emitter 21 composed of a superconductor or a normal conductor, a tunnel barrier 22 composed of an insulator, a base 23 composed of a superconductor, a semiconductor isolator 24, and a normal conductor. The collector 25 is stacked. This superconducting base transistor is an element of low power consumption and high speed operation utilizing high speed electrons passing through the tunnel barrier 22.
第４図に、超電導FETの概念図を示す。第４図の超電
導FETは、超電導体で構成されている超電導ソース電極4
1および超電導ドレイン電極42が、半導体層43上に互い
に近接して配置されている。超電導ソース電極41および
超電導ドレイン電極42の間の部分の半導体層43は、下側
が大きく削られ厚さが薄くなっている。また、半導体層
43の下側表面にはゲート絶縁膜46が形成され、ゲート絶
縁膜46上にゲート電極44が設けられている。FIG. 4 shows a conceptual diagram of a superconducting FET. The superconducting FET shown in FIG. 4 has a superconducting source electrode 4 composed of a superconductor.
1 and the superconducting drain electrode 42 are arranged on the semiconductor layer 43 close to each other. The lower portion of the semiconductor layer 43 between the superconducting source electrode 41 and the superconducting drain electrode 42 is largely shaved and thin. Also, the semiconductor layer
A gate insulating film 46 is formed on the lower surface of 43, and a gate electrode 44 is provided on the gate insulating film 46.
超電導FETは、超電導近接効果で超電導ソース電極41
および超電導ドレイン電極42間の半導体層43を流れる超
電導電流を、ゲート電圧で制御する低電力消費、高速動
作の素子である。The superconducting FET has a superconducting source electrode 41 due to the superconducting proximity effect.
Further, the superconducting current flowing in the semiconductor layer 43 between the superconducting drain electrodes 42 is controlled by a gate voltage, and is a low power consumption and high speed operation element.
さらに、ソース電極、ドレイン電極間に超電導体でチ
ャネルを形成し、この超電導チャネルを流れる電流をゲ
ート電極に印加する電圧で制御する３端子の超電導素子
も発表されている。Further, a three-terminal superconducting element in which a channel is formed by a superconductor between a source electrode and a drain electrode and a current flowing through the superconducting channel is controlled by a voltage applied to a gate electrode has been disclosed.
発明が解決しようとする課題 上記の超電導ベーストランジスタおよび超電導FET
は、いずれも半導体層と超電導体層とが積層された部分
を有する。ところが、近年研究が進んでいる酸化物超電
導体を使用して、半導体層と超電導体層との積層構造を
作製することは困難である。また、この構造が作製でき
ても半導体層と超電導体層の間の界面の制御が難しく、
素子として満足な動作をしなかった。PROBLEM TO BE SOLVED BY THE INVENTION Superconducting base transistor and superconducting FET described above
Have a portion where a semiconductor layer and a superconductor layer are laminated. However, it is difficult to produce a stacked structure of a semiconductor layer and a superconductor layer using an oxide superconductor that has been studied in recent years. In addition, even if this structure can be manufactured, it is difficult to control the interface between the semiconductor layer and the superconductor layer,
The device did not operate satisfactorily.
また、超電導FETは、超電導近接効果を利用するた
め、超電導ソース電極41および超電導ドレイン電極42
を、それぞれを構成する超電導体のコヒーレンス長の数
倍程度以内に近接させて作製しなければならない。特に
酸化物超電導体は、コヒーレンス長が短いので、酸化物
超電導体を使用した場合には、超電導ソース電極41およ
び超電導ドレイン電極42間の距離は、数10nm以下にしな
ければならない。このような微細加工は非常に困難であ
り、従来は酸化物超電導体を使用した超電導FETを再現
性よく作製できなかった。In addition, the superconducting FET uses the superconducting proximity effect, so that the superconducting source electrode 41 and the superconducting drain electrode 42
Must be made close to each other within about several times the coherence length of the superconductor constituting each. In particular, since the oxide superconductor has a short coherence length, when an oxide superconductor is used, the distance between the superconducting source electrode 41 and the superconducting drain electrode 42 must be several tens nm or less. Such microfabrication is very difficult, and conventionally, a superconducting FET using an oxide superconductor could not be produced with good reproducibility.
さらに、従来の超電導チャネルを有する超電導素子
は、変調動作は確認されたが、キャリア密度が高いた
め、完全なオン／オフ動作ができなかった。酸化物超電
導体は、キャリア密度が低いので、超電導チャネルに使
用することにより、完全なオン／オフ動作を行う上記の
素子の実現の可能性が期待されている。しかしながら、
超電導チャネルを5nm程度の厚さにしなければならず、
そのような構成を実現することは困難であった。Further, in the conventional superconducting element having a superconducting channel, a modulation operation was confirmed, but complete on / off operation could not be performed due to a high carrier density. Since the oxide superconductor has a low carrier density, the possibility of realizing the above-mentioned element which performs a complete on / off operation by using it for a superconducting channel is expected. However,
The superconducting channel must be about 5 nm thick,
It has been difficult to realize such a configuration.
一方、上記超電導素子の高速なオン／オフ動作を実現
するためには、超電導チャネルのゲート長を短縮するこ
とが必要である。超電導チャネルのゲート長を短縮する
ためには、ゲート電極の形状を超電導チャネルの電流が
流れる方向に薄く（約100nm以下に）しなければなら
い。酸化物超電導体上には、微細加工で上記寸法のゲー
ト電極を再現性よく形成することはやはり困難である。On the other hand, in order to realize the high-speed on / off operation of the superconducting element, it is necessary to shorten the gate length of the superconducting channel. In order to shorten the gate length of the superconducting channel, the shape of the gate electrode must be thin (to about 100 nm or less) in the direction in which the current flows in the superconducting channel. It is still difficult to form a gate electrode having the above dimensions with good reproducibility on the oxide superconductor by fine processing.
そこで本発明の目的は、上記従来技術の問題点を解決
した、新規な構成の超電導素子およびその作製方法を提
供することにある。Therefore, an object of the present invention is to provide a superconducting element having a novel configuration and a method of manufacturing the superconducting element, which has solved the above-mentioned problems of the related art.
課題を解決するための手段 本発明に従うと、基板上に成膜された酸化物超電導薄
膜に形成された超電導チャネルと、該超電導チャネルの
両端近傍に配置されて該超電導チャネルに電流を流すソ
ース電極およびドレイン電極と、前記超電導チャネル上
に絶縁層を介して配置されて該超電導チャネルに流れる
電流を制御するゲート電極を具備する超電導素子におい
て、前記超電導チャネルが厚さ5nm以下であり、前記酸
化物超電導薄膜の上面が平坦であり、前記酸化物超電導
薄膜上に前記超電導チャネルの主電流が流れる方向に複
数に分割された絶縁性の保護膜を具備し、前記ゲート電
極が該保護膜の前記分割部分の端面に沿って配置された
導電導体の薄膜で構成されることを特徴とする超電導素
子が提供される。Means for Solving the Problems According to the present invention, a superconducting channel formed on an oxide superconducting thin film formed on a substrate, and a source electrode arranged near both ends of the superconducting channel to flow a current through the superconducting channel And a drain electrode, a superconducting element comprising a gate electrode disposed on the superconducting channel via an insulating layer to control a current flowing through the superconducting channel, wherein the superconducting channel has a thickness of 5 nm or less, and the oxide An upper surface of the superconducting thin film is flat, and an insulating protective film is provided on the oxide superconducting thin film, the insulating protective film being divided into a plurality in a direction in which a main current of the superconducting channel flows, and the gate electrode is formed by dividing the protective film. There is provided a superconducting element comprising a thin film of a conductive conductor arranged along an end face of a portion.
また、本発明では、上記本発明の超電導素子を作製す
る方法として、基板上に厚さ5nm以下の超電導部分を有
する上面が平坦な酸化物超電導薄膜を形成し、該酸化物
超電導薄膜の前記厚さ5nm以下の超電導部分上に端部が
あるよう複数の保護膜を前記酸化物超電導薄膜上に形成
し、該保護膜の前記端部に導電導体の薄膜で前記ゲート
電極を形成する工程を含むことを特徴とする超電導素子
の作製方法が提供される。Further, in the present invention, as a method of manufacturing the superconducting element of the present invention, an oxide superconducting thin film having a flat top surface having a superconducting portion with a thickness of 5 nm or less is formed on a substrate, and the thickness of the oxide superconducting thin film is Forming a plurality of protective films on the oxide superconducting thin film so that there is an end on a superconducting portion of 5 nm or less, and forming the gate electrode with a thin film of a conductive conductor on the end of the protective film. A method for manufacturing a superconducting element is provided.
作用 本発明の超電導素子は、酸化物超電導体による超電導
チャネルと、超電導チャネルに電流を流すソース電極お
よびドレイン電極と、超電導チャネルを流れる電流を制
御する極薄のゲート電極とを具備する。本発明の超電導
素子では、各電極は必ずしも超電導電極である必要がな
い。The superconducting element according to the present invention includes a superconducting channel made of an oxide superconductor, a source electrode and a drain electrode for passing a current through the superconducting channel, and an extremely thin gate electrode for controlling a current flowing through the superconducting channel. In the superconducting element of the present invention, each electrode does not necessarily need to be a superconducting electrode.
本発明の超電導素子では、超電導チャネルは上面が平
坦である酸化物超電導薄膜の一部となっている。超電導
チャネルの厚さは、ゲート電極に印加された電圧でゲー
トを開閉させるために、5nm以下であり、この超電導チ
ャネル上に極薄のゲート電極がゲート絶縁層を介して配
置されている。本発明の超電導素子は、この極薄のゲー
ト電極により、超電導チャネルのゲート長が短く構成さ
れ、オン／オフ動作が高速になっている。In the superconducting element of the present invention, the superconducting channel is a part of the oxide superconducting thin film having a flat upper surface. The thickness of the superconducting channel is 5 nm or less in order to open and close the gate with a voltage applied to the gate electrode, and an extremely thin gate electrode is arranged on the superconducting channel via a gate insulating layer. In the superconducting element of the present invention, the gate length of the superconducting channel is configured to be short by the extremely thin gate electrode, and the on / off operation is performed at high speed.
本発明の超電導素子では、上記の厚さの超電導チャネ
ルを実現するために、以下の方法を使用することが好ま
しい。In the superconducting element of the present invention, it is preferable to use the following method in order to realize a superconducting channel having the above thickness.
酸化物超電導薄膜中に基板成分を拡散させ、酸化物
超電導薄膜中に非超電導領域を形成し、この非超電導領
域により薄くなった超電導部分を超電導チャネルとす
る。A substrate component is diffused in the oxide superconducting thin film, a non-superconducting region is formed in the oxide superconducting thin film, and the superconducting portion thinned by the non-superconducting region is used as a superconducting channel.
基板に突出部を設け、その上に上面が平坦な酸化物
超電導薄膜を形成する。基板の突出部上の部分が超電導
チャネルになる。A protruding portion is provided on the substrate, and an oxide superconducting thin film having a flat upper surface is formed thereon. The portion on the protrusion of the substrate becomes the superconducting channel.
上記の場合、基板の成分元素そのものを酸化物超電
導薄膜中に拡散させてもよく、酸化物超電導体中に成膜
中に拡散して、拡散した部分の酸化物超電導体の超電導
性を崩す物質の層を、基板表面の一部に予め形成してお
いてもよい。基板の成分元素を酸化物超電導薄膜中に拡
散させるには、例えば、集束イオンビーム、レーザ等を
使用して酸化物超電導薄膜の超電導チャネルとなる部分
に局所的にエネルギを印加し、下方の基板の成分元素を
拡散させる。In the above case, the component element itself of the substrate may be diffused into the oxide superconducting thin film, or a substance that diffuses into the oxide superconductor during film formation and breaks the superconductivity of the diffused portion of the oxide superconductor. May be formed in advance on a part of the substrate surface. In order to diffuse the component elements of the substrate into the oxide superconducting thin film, for example, by using a focused ion beam, a laser or the like, locally applying energy to a portion to be a superconducting channel of the oxide superconducting thin film, Is diffused.
本発明の超電導素子において、基板には、MgO、SrTiO
3等の酸化物単結晶基板が使用可能である。これらの基
板上には、配向性の高い結晶からなる酸化物超電導薄膜
を成長させることが可能であるので好ましい。また、表
面に絶縁層を有する半導体基板を使用することもでき
る。In the superconducting element of the present invention, MgO, SrTiO
An oxide single crystal substrate such as 3 can be used. On these substrates, an oxide superconducting thin film composed of highly oriented crystals can be grown, which is preferable. Alternatively, a semiconductor substrate having an insulating layer on the surface can be used.
また、本発明の超電導素子には、Ｙ−Ba−Cu−Ｏ系酸
化物超電導体、Bi−Sr−Ca−Cu−Ｏ系酸化物超電導体、
Tl−Ba−Ca−Cu−Ｏ系酸化物超電導体等任意の酸化物超
電導体を使用することができる。Further, the superconducting element of the present invention, a Y-Ba-Cu-O-based oxide superconductor, Bi-Sr-Ca-Cu-O-based oxide superconductor,
Any oxide superconductor such as a Tl-Ba-Ca-Cu-O-based oxide superconductor can be used.
以下、本発明を実施例により、さらに詳しく説明する
が、以下の開示は本発明の単なる実施例に過ぎず、本発
明の技術的範囲をなんら制限するものではない。Hereinafter, the present invention will be described in more detail with reference to examples. However, the following disclosure is merely an example of the present invention, and does not limit the technical scope of the present invention.
実施例 第１図（ａ）および（ｂ）に、それぞれ異なる態様の
本発明の超電導素子の断面図を示す。第１図（ａ）の超
電導素子は、基板５上に成膜され、基板成分が拡散して
超電導性を失った非超電導領域50が形成された酸化物超
電導薄膜１を有する。酸化物超電導薄膜１の非超電導領
域50の上の部分は、厚さ約5nmの極薄の超電導チャネル1
0になっている。超電導チャネル10の上にはゲート絶縁
層６を介して極薄のゲート電極４が配置され、酸化物超
電導薄膜１上の超電導チャネル10の両側には、ソース電
極２およびドレイン電極３が配置されている。Example FIGS. 1 (a) and 1 (b) show cross-sectional views of superconducting elements of the present invention in different modes. The superconducting element shown in FIG. 1 (a) has an oxide superconducting thin film 1 formed on a substrate 5 and formed with a non-superconducting region 50 in which a substrate component is diffused and loses superconductivity. The upper portion of the non-superconducting region 50 of the oxide superconducting thin film 1 has an ultra-thin superconducting channel 1 having a thickness of about 5 nm.
It is 0. An ultra-thin gate electrode 4 is arranged on the superconducting channel 10 via a gate insulating layer 6, and a source electrode 2 and a drain electrode 3 are arranged on both sides of the superconducting channel 10 on the oxide superconducting thin film 1. I have.
ゲート電極４は、表面保護膜８の側面に斜め蒸着法で
形成された常電導体の薄膜またはオフアクシススパッタ
リング法で形成された酸化物超電導薄膜で構成されてい
る。The gate electrode 4 is composed of a normal conductor thin film formed on the side surface of the surface protective film 8 by an oblique deposition method or an oxide superconducting thin film formed by an off-axis sputtering method.
第１図（ｂ）の超電導素子は、非超電導領域50が基板
５の成膜面上に形成された突出部であるところが第１図
（ａ）の超電導素子と異なる。他の構成は、第１図
（ａ）の超電導素子と全く等しいので説明を省略する。The superconducting element of FIG. 1B differs from the superconducting element of FIG. 1A in that the non-superconducting region 50 is a protrusion formed on the film-forming surface of the substrate 5. The other configuration is completely the same as that of the superconducting element shown in FIG.
第２図を参照して、本発明の超電導素子を本発明の方
法で作製する手順を説明する。第２図には第１図（ａ）
の超電導素子の作製方法が示されている。With reference to FIG. 2, a procedure for manufacturing the superconducting element of the present invention by the method of the present invention will be described. FIG. 2 shows FIG. 1 (a).
Is shown.
まず、第２図（ａ）に示すような基板５上に第２図
（ｂ）に示すよう酸化物超電導薄膜１を、オフアクシス
スパッタリング法、反応性蒸着法、MBE法、CVD法等の方
法で形成する。酸化物超電導薄膜１の厚さは200〜300nm
が好ましく、酸化物超電導体としては、Ｙ−Ba−Cu−Ｏ
系酸化物超電導体、Bi−Sr−Ca−Cu−Ｏ系酸化物超電導
体、Tl−Ba−Ca−Cu−Ｏ系酸化物超電導体が好ましく、
ｃ軸配向の薄膜とすることが好ましい。これは、ｃ軸配
向の酸化物超電導薄膜は、基板と平行な方向の臨界電流
密度が大きいからである。ｃ軸配向の酸化物超電導薄膜
を形成するためには、上記の成膜法で基板温度を約700
℃にすればよい。First, an oxide superconducting thin film 1 as shown in FIG. 2 (b) is formed on a substrate 5 as shown in FIG. 2 (a) by a method such as off-axis sputtering, reactive evaporation, MBE, CVD or the like. Formed. The thickness of the oxide superconducting thin film 1 is 200 to 300 nm
Are preferable, and as the oxide superconductor, Y-Ba-Cu-O
Oxide superconductor, Bi-Sr-Ca-Cu-O-based oxide superconductor, Tl-Ba-Ca-Cu-O-based oxide superconductor is preferable,
It is preferable that the thin film be c-axis oriented. This is because the c-axis oriented oxide superconducting thin film has a large critical current density in a direction parallel to the substrate. In order to form a c-axis oriented oxide superconducting thin film, the substrate temperature is set to about 700
° C.
基板５としてはMgO（100）基板、SrTiO3（100）基板
等の絶縁体基板、また表面に、例えばMgAl2O4およびBaT
iO3を積層した絶縁膜を有するSi等の半導体基板が好ま
しい。The substrate 5 is an insulating substrate such as a MgO (100) substrate or a SrTiO 3 (100) substrate, and the surface is made of, for example, MgAl 2 O 4 and BaT
A semiconductor substrate such as Si having an insulating film in which iO 3 is laminated is preferable.
次に、第２図（ｃ）に示すような酸化物超電導薄膜１
に矢印で示すよう局所的にレーザビームまたは集束イオ
ンビームを照射して基板５の構成元素を酸化物超電導薄
膜１に拡散させ、非超電導領域50を形成する。酸化物超
電導薄膜１の非超電導領域50の上の部分は超電導チャネ
ル10となる。Next, an oxide superconducting thin film 1 as shown in FIG.
As shown by an arrow, a laser beam or a focused ion beam is locally irradiated to diffuse constituent elements of the substrate 5 into the oxide superconducting thin film 1 to form a non-superconducting region 50. The portion above the non-superconducting region 50 of the oxide superconducting thin film 1 becomes the superconducting channel 10.
非超電導領域50をレーザビームを照射して形成する場
合、レーザとしては、エキシマレーザ、炭酸ガスレー
ザ、YAGレーザ等の高出力レーザが好ましい。例えば、
波長514nmのArレーザを使用する場合、照射出力は2.0W
とし、100μm/秒で走査することが好ましい。一方、集
束イオンビームを照射して非超電導領域50を形成する場
合、照射イオンはArイオンが好ましく、ビーム径を0.2
μｍ以下とし、加速電圧が50kV以下であることが好まし
い。When the non-superconducting region 50 is formed by irradiating a laser beam, a high-output laser such as an excimer laser, a carbon dioxide laser, and a YAG laser is preferable. For example,
When an Ar laser with a wavelength of 514 nm is used, the irradiation output is 2.0 W
It is preferable to scan at 100 μm / sec. On the other hand, when the non-superconducting region 50 is formed by irradiating a focused ion beam, the irradiated ions are preferably Ar ions, and the beam diameter is 0.2
μm or less, and the acceleration voltage is preferably 50 kV or less.
一方、第２図（ｂ）および（ｃ）の工程に代えて、第
２図（ｂ′）および（ｃ′）に示す工程にすることもで
きる。On the other hand, the steps shown in FIGS. 2 (b ') and (c') can be performed instead of the steps shown in FIGS. 2 (b) and 2 (c).
まず、第２図（ｂ′）に示すように基板５に矢印で示
すような集束イオンビームを照射し、添加領域51を形成
する。照射するイオンはBa、Ｙ、Cuイオンが好ましく、
ビーム径は0.2μｍ、加速電圧は50kVが好ましい。この
集束イオンビーム照射により、基板５の表面に幅１μｍ
以下の添加領域51を形成する。First, as shown in FIG. 2 (b '), the substrate 5 is irradiated with a focused ion beam as shown by an arrow to form an addition region 51. Irradiation ions are preferably Ba, Y, Cu ions,
Preferably, the beam diameter is 0.2 μm and the acceleration voltage is 50 kV. By this focused ion beam irradiation, the surface of the substrate 5 is 1 μm wide.
The following additional region 51 is formed.
次に第２図（ｃ′）に示すよう上記の添加領域51を有
する基板５上に酸化物超電導薄膜１を、第２図（ｂ）と
同じくオフアクシススパッタリング法、反応性蒸着法、
MBE法、CVD法等で形成する。酸化物超電導薄膜１が成長
している間に、添加領域51から添加元素が酸化物超電導
薄膜１中に拡散し、非超電導領域50が形成される。酸化
物超電導薄膜１の非超電導領域50の上の部分は超電導チ
ャネル10となる。Next, as shown in FIG. 2 (c '), the oxide superconducting thin film 1 is formed on the substrate 5 having the above-mentioned addition region 51 by the off-axis sputtering method, the reactive evaporation method,
It is formed by an MBE method, a CVD method, or the like. While the oxide superconducting thin film 1 is growing, the additive element diffuses from the additive region 51 into the oxide superconducting thin film 1, and the non-superconducting region 50 is formed. The portion above the non-superconducting region 50 of the oxide superconducting thin film 1 becomes the superconducting channel 10.
上記のように、酸化物超電導薄膜１中に非超電導領域
50を形成したら、超電導チャネル10上にゲート電極を作
製する。第２図（ｄ）に示すよう酸化物超電導薄膜１上
に絶縁膜16を形成し、絶縁膜16の超電導チャネル10の上
方を除いた位置に表面保護膜８および９を形成する。絶
縁膜16には、例えばSiN、MgO等酸化物超電導薄膜との界
面で大きな準位を作らない絶縁体を用いることが好まし
く、その厚さはトンネル効果が無視し得る10nm以上とす
る。また、表面保護膜８、９にはMgOを用いることが好
ましい。As described above, the non-superconducting region in the oxide superconducting thin film 1
After forming 50, a gate electrode is formed on superconducting channel 10. As shown in FIG. 2 (d), an insulating film 16 is formed on the oxide superconducting thin film 1, and surface protective films 8 and 9 are formed on the insulating film 16 at positions other than above the superconducting channel 10. As the insulating film 16, for example, an insulator that does not form a large level at the interface with the oxide superconducting thin film, such as SiN or MgO, is preferably used, and its thickness is set to 10 nm or more where the tunnel effect can be ignored. Further, it is preferable to use MgO for the surface protection films 8 and 9.
表面保護膜８上に表面保護膜８の超電導チャネル10の
上方の側面に周り込むよう斜め蒸着より、第２図（ｅ）
に示すよう常電導膜18を形成する。同時に、表面保護膜
９の上にも常電導膜19が形成されるが、これは不要であ
る。常電導膜18、19には、AuまたはTi、Ｗ等の高融点金
属、これらのシリサイドを用いることが好ましい。反応
性イオンエッチング、Arイオンミリング等の方法で常電
導膜18に対して異方性エッチングを行い、第２図（ｆ）
に示すようゲート電極４に加工する。ゲート電極４の厚
さは約100nm以下とすることが好ましい。As shown in FIG. 2 (e), oblique deposition is performed on the surface protective film 8 so as to surround the upper side surface of the superconducting channel 10 of the surface protective film 8.
A normal conducting film 18 is formed as shown in FIG. At the same time, a normal conducting film 19 is also formed on the surface protective film 9, but this is not necessary. For the normal conducting films 18 and 19, it is preferable to use Au or a high melting point metal such as Ti or W, or a silicide thereof. Anisotropic etching is performed on the ordinary conducting film 18 by a method such as reactive ion etching or Ar ion milling, and FIG.
As shown in FIG. Preferably, the thickness of the gate electrode 4 is about 100 nm or less.
最後に、第２図（ｇ）に示すよう酸化物超電導薄膜１
の両端上の絶縁膜16、表面保護膜８、９を除去し、ゲー
ト絶縁層６を形成する。そして、露出した酸化物超電導
薄膜１の表面にソース電極２およびドレイン電極３をゲ
ート電極４に使用した常電導体と等しい常電導体で形成
して、本発明の超電導素子が完成する。Finally, as shown in FIG. 2 (g), the oxide superconducting thin film 1
The insulating film 16 and the surface protection films 8 and 9 on both ends of the gate insulating layer 6 are removed to form the gate insulating layer 6. Then, the source electrode 2 and the drain electrode 3 are formed on the exposed surface of the oxide superconducting thin film 1 with a normal conductor equal to the normal conductor used for the gate electrode 4, thereby completing the superconducting element of the present invention.
本実施例では、酸化物超電導薄膜中に基板成分を拡散
させて非超電導領域を形成する方法を説明したが、本発
明の方法はこれに限られるものではない。例えば、第１
図（ｂ）に示した本発明の超電導素子を作製する場合に
は、基板を加工して突出部を設け、その上に酸化物超電
導薄膜を形成し、上面を平坦にすることが好ましい。In the present embodiment, a method of forming a non-superconducting region by diffusing a substrate component into an oxide superconducting thin film has been described, but the method of the present invention is not limited to this. For example, the first
In the case of manufacturing the superconducting element of the present invention shown in FIG. 2B, it is preferable to process the substrate to provide a projection, form an oxide superconducting thin film thereon, and flatten the upper surface.
また、本発明の超電導素子では、ゲート電極にも酸化
物超電導体を使用することができる。この場合、絶縁膜
16を形成した後、100nm以下の厚さのできればａ軸配向
の酸化物超電導薄膜を形成し、斜め方向からのArイオン
ミリングおよび異方性エッチングを行って超電導ゲート
電極を作製する。その後、表面保護膜を形成することが
好ましい。Further, in the superconducting element of the present invention, an oxide superconductor can be used also for the gate electrode. In this case, the insulating film
After the formation of 16, a superconducting oxide thin film having a thickness of 100 nm or less, preferably an a-axis orientation, is formed, and Ar ion milling and anisotropic etching are performed in an oblique direction to produce a superconducting gate electrode. Thereafter, it is preferable to form a surface protective film.
本発明の超電導素子を本発明の方法で作製すると、超
電導FETを作製する場合に要求される微細加工技術の制
限が緩和される。また、作製が容易であり、素子の性能
も安定しており、再現性もよい。When the superconducting element of the present invention is manufactured by the method of the present invention, the restriction on the fine processing technology required when manufacturing a superconducting FET is relaxed. Further, the device is easy to manufacture, the performance of the element is stable, and the reproducibility is good.
発明の効果 以上説明したように、本発明の超電導素子は、超電導
チャネル中を流れる超電導電流をゲート電圧で制御する
構成となっている。従って、従来の超電導FETのよう
に、超電導近接効果を利用していないので微細加工技術
が緩和される。また、超電導体と半導体を積層する必要
もないので、酸化物超電導体を使用して高性能な素子が
作製できる。Effect of the Invention As described above, the superconducting element of the present invention has a configuration in which the superconducting current flowing in the superconducting channel is controlled by the gate voltage. Therefore, unlike the conventional superconducting FET, the superconducting proximity effect is not used, so that the fine processing technology is relaxed. Further, since there is no need to stack a superconductor and a semiconductor, a high-performance element can be manufactured using an oxide superconductor.
さらに、本発明の超電導素子は、極薄のゲート電極に
より、超電導チャネルのゲート長が短く構成されている
ので、オン／オフ動作が高速である。Further, in the superconducting element of the present invention, since the gate length of the superconducting channel is configured to be short by the extremely thin gate electrode, the on / off operation is fast.
本発明により、超電導技術の電子デバイスへの応用が
さらに促進される。The present invention further promotes the application of superconducting technology to electronic devices.
第１図は、本発明の超電導素子の概略図であり、 第２図は、本発明の方法により本発明の超電導素子を作
製する場合の工程を示す概略図であり、 第３図は、超電導ベーストランジスタの概略図であり、 第４図は、超電導FETの概略図である。 〔主な参照番号〕 １……酸化物超電導薄膜、 ２……ソース電極、 ３……ドレイン電極、 ４……ゲート電極、５……基板FIG. 1 is a schematic view of a superconducting element of the present invention, FIG. 2 is a schematic view showing a process for producing a superconducting element of the present invention by a method of the present invention, and FIG. FIG. 4 is a schematic diagram of a base transistor, and FIG. 4 is a schematic diagram of a superconducting FET. [Main Reference Numbers] 1 ... Oxide superconducting thin film, 2 ... Source electrode, 3 ... Drain electrode, 4 ... Gate electrode, 5 ... Substrate
Claims (2)
成された超電導チャネルと、該超電導チャネルの両端近
傍に配置されて該超電導チャネルに電流を流すソース電
極およびドレイン電極と、前記超電導チャネル上に絶縁
層を介して配置されて該超電導チャネルに流れる電流を
制御するゲート電極を具備する超電導素子において、前
記超電導チャネルが厚さ5nm以下であり、前記酸化物超
電導薄膜の上面が平坦であり、前記酸化物超電導薄膜上
に前記超電導チャネルの主電流が流れる方向に複数に分
割された絶縁性の保護膜を具備し、前記ゲート電極が該
保護膜の前記分割部分の端面に沿って配置された導電体
の薄膜で構成されることを特徴とする超電導素子。A superconducting channel formed on an oxide superconducting thin film formed on a substrate; a source electrode and a drain electrode disposed near both ends of the superconducting channel to flow a current through the superconducting channel; In a superconducting element including a gate electrode arranged on a channel via an insulating layer to control a current flowing through the superconducting channel, the superconducting channel has a thickness of 5 nm or less, and the top surface of the oxide superconducting thin film is flat. An insulating protective film divided on the oxide superconducting thin film in a direction in which a main current of the superconducting channel flows, wherein the gate electrode is disposed along an end face of the divided portion of the protective film. A superconducting element comprising a conductive thin film.
法において、基板上に厚さ5nm以下の超電導部分を有す
る上面が平坦な酸化物超電導薄膜を形成し、該酸化物超
電導薄膜の前記厚さ5nm以下の超電導部分上に端部があ
るよう複数の保護膜を前記酸化物超電導薄膜上に形成
し、該保護膜の前記端部に導電体の薄膜で前記ゲート電
極を形成する工程を含むことを特徴とする超電導素子の
作製方法。2. The method for manufacturing a superconducting element according to claim 1, wherein a flat superconducting thin film having a superconducting portion with a thickness of 5 nm or less is formed on a substrate, and the oxide superconducting thin film is Forming a plurality of protective films on the oxide superconducting thin film so that there is an end on a superconducting portion having a thickness of 5 nm or less, and forming the gate electrode with a conductive thin film on the end of the protective film. A method for manufacturing a superconducting element, comprising:
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2294287A JP2614941B2 (en) | 1990-10-31 | 1990-10-31 | Superconducting element and fabrication method |
| CA002054644A CA2054644C (en) | 1990-10-31 | 1991-10-31 | Superconducting device having an extremely short superconducting channel formed of extremely thin oxide superconductor film and method for manufacturing same |
| EP91402934A EP0484251B1 (en) | 1990-10-31 | 1991-10-31 | Superconducting device having an extremely short superconducting channel formed of extremely thin oxide superconductor film and method for manufacturing the same |
| DE69118106T DE69118106T2 (en) | 1990-10-31 | 1991-10-31 | Superconducting device formed from extremely thin superconducting oxide film with an extremely short channel and method for its production |
| US08/242,074 US5471069A (en) | 1990-10-31 | 1994-05-13 | Superconducting device having an extremely short superconducting channel formed of extremely thin oxide superconductor film |
| US08/518,493 US5637555A (en) | 1990-10-31 | 1995-08-23 | Method for manufacturing a three-terminal superconducting device having an extremely short superconducting channel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2294287A JP2614941B2 (en) | 1990-10-31 | 1990-10-31 | Superconducting element and fabrication method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04167570A JPH04167570A (en) | 1992-06-15 |
| JP2614941B2 true JP2614941B2 (en) | 1997-05-28 |
Family
ID=17805750
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2294287A Expired - Lifetime JP2614941B2 (en) | 1990-10-31 | 1990-10-31 | Superconducting element and fabrication method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2614941B2 (en) |
-
1990
- 1990-10-31 JP JP2294287A patent/JP2614941B2/en not_active Expired - Lifetime
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| Publication number | Publication date |
|---|---|
| JPH04167570A (en) | 1992-06-15 |
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