JPH04130906A - Constant current circuit - Google Patents

Constant current circuit

Info

Publication number
JPH04130906A
JPH04130906A JP2252661A JP25266190A JPH04130906A JP H04130906 A JPH04130906 A JP H04130906A JP 2252661 A JP2252661 A JP 2252661A JP 25266190 A JP25266190 A JP 25266190A JP H04130906 A JPH04130906 A JP H04130906A
Authority
JP
Japan
Prior art keywords
transistor
current
resistor
collector
ratio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2252661A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Uto
宇都 佳之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP2252661A priority Critical patent/JPH04130906A/en
Publication of JPH04130906A publication Critical patent/JPH04130906A/en
Pending legal-status Critical Current

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  • Control Of Electrical Variables (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent the generation of current variation due to the hFE of a transistor(TR) by constituting a constant current circuit prevented from being influenced by the dispersion or the like of the VBE or hFE of the TR generated at the time of producing the TR. CONSTITUTION:When it is defined that current flowing into respective TRs Q1, Q2 is I4, the current ratio I1/I4 of respective current values I1, I4, the ratio IS4/IS1 of the saturation current IS4 of the TR Q4 to the saturation current IS1 of the TR Q1 and the ratio IS3/IS1 of the saturation current IS3 of a TR Q3 to the saturation current IS2 of the TR Q2 are respectively (n), the current I1 flowing into a resistor R3 is expressed by the shown expressions. When R4=R 2Vcc/R3(R1+R2) is formed, the expression I is expressed by the expression II. Since the current I1 flowing into the resistor R3 is determined by registers R1 to R3, the constant current circuit is not influenced by the hFE or VBE of respective TRs.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、集積回路に用いる場合に好適な定電流回路に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a constant current circuit suitable for use in an integrated circuit.

〔従来の技術〕[Conventional technology]

従来、この種の定電流回路としては、第3図、及び第4
図に示すような回路が用いられている。
Conventionally, this type of constant current circuit is shown in Figures 3 and 4.
A circuit as shown in the figure is used.

第3図において、電源と接地間に接続された抵抗器R5
,R6およびトランジスタQ2によって点Cの電位を設
定し、抵抗器R7によってカレントミラー回路2の入力
端子4の電流を設定している。
In Figure 3, a resistor R5 connected between the power supply and ground
, R6 and the transistor Q2 set the potential at point C, and the resistor R7 sets the current at the input terminal 4 of the current mirror circuit 2.

この回路において、抵抗R7に流れる電流■2は、電源
電圧をvco、抵抗R6に流れる電流を■いR7とR6
に流れる電流比■2/■、をn、Q呑の飽和電流を工5
5、Q具の飽和電流rsgをnRsとすると次式のよう
になる。
In this circuit, the current (2) flowing through the resistor R7 is the power supply voltage vco, and the current flowing through the resistor R6 (2) is between R7 and R6.
The current ratio ■2/■ flowing in n is n, and the saturation current of Q is 5.
5. If the saturation current rsg of the Q tool is nRs, the following equation is obtained.

この第3図の定電流回路では、トランジスタQ2(7)
Vsx ((1)式第2項)とトランジスタQ合ノhF
l:(第3項)によって電流工2が変動する問題点があ
る。また、このvBEの影響を取除いた定電流回路とし
て第4図で示した回路もある。
In the constant current circuit shown in Fig. 3, transistor Q2 (7)
Vsx (second term of equation (1)) and transistor Q joint hF
There is a problem that the electric current 2 varies depending on l: (third term). There is also a constant current circuit shown in FIG. 4 which eliminates the influence of vBE.

この回路で、抵抗R3に流れる電流工、は、トランジス
タQl、Q2に流れる電流を工6、■、と■3の電流比
I!/Is、)ランジスタQ1の飽和電流Llとトラン
ジスタQ4の飽和電流IS4の比およびトランジスタQ
2の飽和電流IS2とQ3の飽和電流IS3の電流比I
 s3/ I S2をそれぞれnとすると、 次式となる。
In this circuit, the current flowing through the resistor R3 is the current flowing through the transistors Ql and Q2, and the current ratio between ■ and ■3 is I! /Is,) The ratio of the saturation current Ll of the transistor Q1 to the saturation current IS4 of the transistor Q4 and the transistor Q
Current ratio I of saturation current IS2 of Q2 and saturation current IS3 of Q3
When s3/I S2 are each n, the following equation is obtained.

この第4図に定電流回路では1、第3図の定電流回路で
問題となったVおの影響がなくなっている。
In the constant current circuit shown in FIG. 4, the influence of V, which was a problem in the constant current circuits shown in FIGS. 1 and 3, is eliminated.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の定電流回路において、第3図の定電流回
路の場合、式(1)よりトランジスタ0巻のVBEやト
ランジスタQ−t−のhFEのバラツキがカレン)ミラ
ー回路に供給する電流に影響を与え、結果として実際に
使用するその出力電流値に変動を生じさせてしまう。
In the conventional constant current circuit described above, in the case of the constant current circuit shown in Fig. 3, according to equation (1), variations in the VBE of the 0th turn of the transistor and the hFE of the transistor Qt- affect the current supplied to the Karen mirror circuit. As a result, the output current value actually used varies.

また、第4図の場合においてもPNPトランジスタQl
、Q4、NPNトランジスタQ2.Q3のそれぞれのV
BHのバラツキは打ち消し合うことができるが、式(2
)よりトランジスタQJのhFEによってD点の電位が
トランジスタの特性の影響を受け、第3図の場合と同様
にカレントミラー回路の出力電流値に変動を生じさせて
しまうという問題点がある。
Also in the case of FIG. 4, the PNP transistor Ql
, Q4, NPN transistor Q2. Each V of Q3
Although the variations in BH can be canceled out, the equation (2
), the potential at point D is affected by the characteristics of the transistor due to the hFE of transistor QJ, and as in the case of FIG. 3, there is a problem in that the output current value of the current mirror circuit fluctuates.

本発明の目的は、これらの問題を解決し、出力電流値の
変動を制御した定電流回路を提供することにある。
An object of the present invention is to solve these problems and provide a constant current circuit in which fluctuations in the output current value are controlled.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の定電流回路の構成は、第1、第2の電源間に直
列に接続した第1及び第2の抵抗器の共通接続点に、コ
レクタ接地型の第1のトランジスタのベースを接続し、
この第1のトランジスタのエミッタはこの第1のトラン
ジスタと逆導電性の第2のトランジスタのエミッタに接
続し、この第2のトランジスタのベース、コレクタを共
通接続した接続点より複数の出力端を有するカレントミ
ラー回路の第1の出力端子および前記第2のトランジス
タと同じ導電性の第一3のトランジスタのベースへそれ
ぞれ接続し、この第3のトランジスタのコレクタは、前
記カレントミラー回路の入力端子へ、この第3のトラン
ジスタのエミッタは前記第1のトランジスタと同じ導電
性の第4のトランジスタのエミッタへそれぞれ接続し、
この第4のトランジスタのコレクタと接地間に第3の抵
抗器を接続し、この第4のトランジスタのベースとコレ
クタの間に、第4の抵抗器を接続し、この第4の抵抗器
の抵抗値と、前記第1及び第2の並列抵抗値との比を前
記第1のトランジスタと前記第4のトランジスタとに流
れる各コレクタ電流の比に概略等しくしたことを特徴と
する。
The configuration of the constant current circuit of the present invention is such that the base of the first transistor of the common collector type is connected to the common connection point of the first and second resistors connected in series between the first and second power supplies. ,
The emitter of this first transistor is connected to the emitter of a second transistor having conductivity opposite to that of this first transistor, and has a plurality of output terminals from a connection point where the base and collector of this second transistor are commonly connected. a first output terminal of the current mirror circuit and a base of a first third transistor having the same conductivity as the second transistor, the collector of the third transistor being connected to an input terminal of the current mirror circuit; The emitters of this third transistor are respectively connected to the emitters of a fourth transistor of the same conductivity as the first transistor;
A third resistor is connected between the collector of this fourth transistor and ground, a fourth resistor is connected between the base and collector of this fourth transistor, and the resistance of this fourth resistor is and the first and second parallel resistance values are approximately equal to the ratio of collector currents flowing through the first transistor and the fourth transistor.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の回路図である。FIG. 1 is a circuit diagram of an embodiment of the present invention.

本実施例は、抵抗器R1〜Rい トランジスタQ1〜Q
い複数の出力端子3をもつカレントミラー回路2が用い
られている。
In this embodiment, resistors R1 to R and transistors Q1 to Q
A current mirror circuit 2 having a plurality of output terminals 3 is used.

抵抗R3に流れる電流工、は、トランジスタQl。The current flowing through resistor R3 is transistor Ql.

Q2に流れる電流を工4、電流り、I−の電流比L/I
イ、トランジスタQ1の飽和電流工、□とトランジスタ
Q4の飽和電流IS4の比IS4/IS工およびトラン
ジスタQ2の飽和電流1s2とトランジスタQ3の飽和
電流IS3の比Is3/工s2をそれぞれnとすると、
次式のようになる。
The current flowing through Q2 is calculated by the current ratio L/I.
A. Let n be the ratio IS4/IS of the saturation current of the transistor Q1, □ and the saturation current IS4 of the transistor Q4, and the ratio Is3/s2 of the saturation current 1s2 of the transistor Q2 and the saturation current IS3 of the transistor Q3, respectively.
It becomes as follows.

は次式となる。is the following formula.

従って、この回路によれば、抵抗R3に流れる電流工、
は、抵抗R1,R2,R3によって定まり、各トランジ
スタのhF、:やVBEの影響を受けることはない。
Therefore, according to this circuit, the current flowing through the resistor R3,
is determined by the resistors R1, R2, and R3, and is not affected by hF, : or VBE of each transistor.

第2図は、本発明の他の実施例を示す回路図であり、第
1図との相違点は、第1図のトランジスタQ1〜Q+4
に対して逆導電性のトランジスタQll〜Q14で構成
した点にあり、第1図と同様の効果がある。
FIG. 2 is a circuit diagram showing another embodiment of the present invention, and the difference from FIG. 1 is that the transistors Q1 to Q+4 in FIG.
The structure is composed of transistors Qll to Q14 having conductivity opposite to that of the transistors, and has the same effect as in FIG.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、式(4)よりトランジス
タの製造上のVBEやhFHのバラツキや温度変化に対
するvlやhFEの変動に対して、影響を受けることの
ない定電流回路を構成することができ、抵抗R1,R2
が比較的大きくても、前述したトランジスタQ1のhゆ
により生ずる電流の変動を防止することができるという
効果がある。
As explained above, according to the present invention, it is possible to configure a constant current circuit that is not affected by variations in VBE and hFH due to transistor manufacturing and fluctuations in vl and hFE due to temperature changes, based on equation (4). is created, and the resistances R1 and R2
Even if the voltage is relatively large, there is an effect that the fluctuation of the current caused by the voltage of the transistor Q1 described above can be prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は本発明の第1および、第2の実施例の
回路図、第3図、第4図は従来の定電流源回路の二側を
示す回路図である。 1・・・・・・電源端子、2・・・・・・複数の出力を
もつカレントミラー回路、3・・・・・・カレントミラ
ー回路の出力端子、4・・・・・・カレントミラー回路
の入力端子、R1−R7・・・・・・抵抗、Ql、Q4
.Ql 2.Ql 3・・・・PNP )ランジスタ、
Q2.Q3.Ql 1゜Ql4・・・・・・NPN)ラ
ンジスタ、A、B、C,D・・・・・接続点。 代理人 弁理士  内 原   晋
1 and 2 are circuit diagrams of first and second embodiments of the present invention, and FIGS. 3 and 4 are circuit diagrams showing two sides of a conventional constant current source circuit. 1...Power supply terminal, 2...Current mirror circuit with multiple outputs, 3...Output terminal of current mirror circuit, 4...Current mirror circuit Input terminal, R1-R7... Resistor, Ql, Q4
.. Ql 2. Ql 3...PNP) transistor,
Q2. Q3. Ql 1゜Ql4...NPN) transistor, A, B, C, D... Connection point. Agent Patent Attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims] 第1、第2の電源間に直列に接続した第1及び第2の抵
抗器の共通接続点に、コレクタ接地型の第1のトランジ
スタのベースを接続し、この第1のトランジスタのエミ
ッタはこの第1のトランジスタと逆導電性の第2のトラ
ンジスタのエミッタに接続し、この第2のトランジスタ
のベース、コレクタを共通接続した接続点より複数の出
力端を有するカレントミラー回路の第1の出力端子およ
び前記第2のトランジスタと同じ導電性の第3のトラン
ジスタのベースへそれぞれ接続し、この第3のトランジ
スタのコレクタは、前記カレントミラー回路の入力端子
へ、この第3のトランジスタのエミッタは前記第1のト
ランジスタと同じ導電性の第4のトランジスタのエミッ
タへそれぞれ接続し、この第4のトランジスタのコレク
タと接地間に第3の抵抗器を接続し、この第4のトラン
ジスタのベースとコレクタの間に、第4の抵抗器を接続
し、この第4の抵抗器の抵抗値と、前記第1及び第2の
並列抵抗値との比を前記第1のトランジスタと前記第4
のトランジスタとに流れる各コレクタ電流の比に概略等
しくしたことを特徴とする定電流回路。
The base of a common collector type first transistor is connected to the common connection point of the first and second resistors connected in series between the first and second power supplies, and the emitter of this first transistor is connected to the common connection point of the first and second resistors connected in series between the first and second power supplies. A first output terminal of a current mirror circuit that is connected to the emitter of a second transistor having conductivity opposite to that of the first transistor, and that has a plurality of output terminals from a connection point where the base and collector of the second transistor are commonly connected. and the base of a third transistor having the same conductivity as the second transistor, the collector of this third transistor being connected to the input terminal of the current mirror circuit, and the emitter of this third transistor being connected to the base of the third transistor having the same conductivity as the second transistor. A third resistor is connected between the collector of this fourth transistor and ground, and a third resistor is connected between the base and collector of this fourth transistor. A fourth resistor is connected to the fourth resistor, and the ratio of the resistance value of the fourth resistor to the parallel resistance values of the first and second transistors is set as the ratio between the first transistor and the fourth resistor.
A constant current circuit characterized in that the ratio of the collector current flowing through the transistor and the collector current is approximately equal to the ratio of the collector current flowing through the transistor.
JP2252661A 1990-09-21 1990-09-21 Constant current circuit Pending JPH04130906A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2252661A JPH04130906A (en) 1990-09-21 1990-09-21 Constant current circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2252661A JPH04130906A (en) 1990-09-21 1990-09-21 Constant current circuit

Publications (1)

Publication Number Publication Date
JPH04130906A true JPH04130906A (en) 1992-05-01

Family

ID=17240468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2252661A Pending JPH04130906A (en) 1990-09-21 1990-09-21 Constant current circuit

Country Status (1)

Country Link
JP (1) JPH04130906A (en)

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