JPH04109668A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To increase a storage capacity and to reduce an interlayer parasitic capacity by increasing a distance between a gate electrode of a transistor and an electrode for storing charge, and increasing the area of a capacity forming unit. CONSTITUTION:A capacity unit for storing charge and a transistor for externally transmitting the stored charge are provided. A second insulating film 3 is further disposed on the top of a first insulating film 11 of the top of a gate electrode 10 of a transistor for transmitting the charge of the capacity unit. Thus, the opposed areas of a capacity electrode 7 and a storage electrode 9 of a capacity forming unit are increased to increase a capacity and to increase a distance between the electrode 10 and the electrode 9, and hence an interlayer parasitic capacity between the electrodes 10 and 9 can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and more particularly to the structure of a transistor section that transmits accumulated charges to the outside.

[Conventional technology]

Conventionally, the structure of this type of transistor section has been such that, as shown in FIG. The charges accumulated in the transistor are transmitted to the wiring layer (data line) 5 for transmitting them to the outside via the gate electrode 10 of the transistor. Conventionally, the gate electrode 10 of the transistor was only surrounded by the first insulating film 11.

[Problem to be solved by the invention]

The conventional structure described above has the following two drawbacks.

The first drawback is that the storage capacity cannot be increased. In other words, the storage capacitance is almost determined by the area of the capacitor forming portion. There is a drawback that in order to increase the amount of charge in the capacitor, the area must be increased or the capacitor insulating film must be made thinner.6 The second drawback is the coupling between the gate electrode 10 and the storage electrode 9 of the transistor. This means that the capacity is large. That is, because of the coupling capacitance, it takes a long time to boost the gate electrode of the transistor from the ground potential to the power supply potential.

An object of the present invention is to provide a semiconductor integrated circuit device that can increase storage capacitance and reduce interlayer parasitic capacitance.

[Means to solve the problem]

In order to solve the problems of the prior art, the present invention firstly increases the distance between the gate electrode of the transistor and the electrode section for charge storage, and secondly increases the area of the capacitor forming section. It is characterized by changing the capacitor forming part from a planar structure to a three-dimensional structure.

That is, a second insulating film is further disposed on the first insulating film above the gate electrode of the conventional transistor section to form the first insulating film. It is characterized by the realization of a structure that achieves the second purpose.

Note that the second insulating film can be more effective by using eJw having a small dielectric constant.

〔Example〕

Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of an embodiment of the present invention.

The capacitor electrode 7 faces the storage capacitor 8ii through the insulation 1118 to form a capacitor part, and the accumulated charge is transferred to the N-type diffusion layer 2.
When the potential of the gate part 10 of the transistor is high, it is transmitted to the N-type diffusion layer 2 on the drain side, and further transmitted to the data line 5 connected to the N-type diffusion layer 2. The present invention is characterized by a structure in which a second insulating film 3 is further disposed above the first insulating film 11 above the gate portion 10.

〔Effect of the invention〕

As explained above, the present invention provides a first insulating film 1 on the upper part of the gate electrode 10 of the transistor that transfers the charge of the capacitive part.
By further arranging the second insulating film 3 on top of the capacitor 1, the area where the capacitor electrode 7 and the storage electrode 9, which are capacitor forming portions, face each other becomes larger, which has the effect of increasing the capacitance. Furthermore, by disposing the second insulating film 3, the distance between the gate electrode 10 and the storage electrode 9 can be increased, so that the parasitic capacitance between the eyebrows between the gate electrode 10 and the storage electrode 9 can be reduced. There is. If a material with a low dielectric constant is used as the second insulating film 3, the parasitic capacitance between the eyebrows can be further reduced.

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[Brief explanation of drawings]

FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a sectional view of an example of a conventional semiconductor integrated circuit device. l...Semiconductor substrate (P type), 2...N type diffusion layer, 3
...Second insulating film, 4...Chip protection film, 5...
Data line, 6... Insulating film, 7... Capacitor electrode, 8...
・Insulating film, 9...Storage electrode, 10...Gate electrode,
11... First insulating film, 12... Field oxide film.

Claims (1)

[Scope of Claims] 1. In a semiconductor memory device having a capacitor that stores charge and a transistor that transmits the stored charge to the outside, the transistor is surrounded by a first insulating film, and 1. A semiconductor integrated circuit device having a structure in which a second insulating film is disposed above a first insulating film. 2. The semiconductor integrated circuit device according to claim 1, wherein an insulating film with a low dielectric constant is used as the second insulating film.