JPH04109620A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce dispersion on manufacture, and to obtain the excellent shape of a contact hole by composing an intermediate insulating film of two layer films having different impurity concentration and conducting the boring method of the contact hole at the two stages of isotropic etching in a solution and anisotropic etching in vapor phase. CONSTITUTION:An insulating film 2 electrically isolating a semiconductor substrate 1 and a metallic wiring is formed in two layer structure having different impurity concentration, and a boring method for obtaining the electrical coupling of the semiconductor substrate 1 and the metallic wiring is carried out at two stages by isotropic etching in a solution and anisotropic etching in vapor phase. Consequently, etching can be stopped near the boundary of a first layer film 5 and a second layer film 5' in isotropic etching in the solution at a time when a contact hole 6 is bored to intermediate insulating films 5, 5', and extrusion from a gate electrode 4 of a contact can be prevented. Accordingly, a semiconductor device having the excellent shape of the contact and being superior even from the viewpoint of long-term reliability can be acquired.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a highly integrated and high-speed semiconductor integrated circuit device.

[Summary of the invention]

The so-called intermediate insulating film that electrically separates the semiconductor substrate and metal wiring is composed of two layers of films with different impurity concentrations, and the so-called contact hole blooming method is used to obtain electrical coupling between the metal wiring and the semiconductor substrate. By performing isotropic etching in a solution and anisotropic etching in a gas phase, manufacturing variations can be reduced and an excellent contact hole shape can be achieved.

[Conventional technology]

A conventional technique will be explained based on the drawings. FIG. 2 ta+ shows the state in which an intermediate insulator [5] is deposited to electrically isolate the semiconductor substrate and the metal wiring to be formed later. At this time, the intermediate insulating film 5 is made of a silicon oxide film (B P
SG film: Baron PhosSilicate
Approximately 6,000 to 10,000 people will be covered by Gluss. Next, as shown in Figure 2(b),
Heat treatment is performed at 00° C. for about 30 minutes, and the shape is smoothed by so-called glass flow. This is to prevent breakage and short-circuiting of the metal wiring that will be formed later. Thereafter, as shown in Figure 2 (tC), the photoresist is patterned by photolithography, and the intermediate insulating film is etched halfway through, for example, by isotropic etching in a mixed solution of ammonium fluoride and hydrofluoric acid. Then, anisotropic dry etching is performed in gas plasma to form contact holes 6 for electrically connecting the metal wiring, the diffusion layer, and the gate electrode. This two-step etching process improves the shape of the contact hole and substantially reduces the aspect ratio. Next, as a further shape improvement, 90
Heat treatment is performed at a temperature of about 0℃ for about 30 minutes, and the corners are rounded (
Figure 2(a)). This method improves the gap coverage of the metal wiring at the contact portion and does not affect yield or reliability.

[HUE to be solved by the invention In the conventional technology, isotropic etching in a solution to improve the shape of a contact hole is not effective in improving the shape or improving the aspect ratio if it is under-etched. must not. For example, BP of 8C00 people
When an SG film is used, it is necessary to etch at least 3,000 layers, but when considering manufacturing etching and film thickness variations, it is actually necessary to set the etch amount to about 4,000 layers. However, in the worst case, when the BPSG film is at the lower limit film thickness within the manufacturing variation and on the gate electrode where the film thickness tends to become thinner due to the glass flow, the initial isotropic etching will fail as shown in Figure 2 (C1). In some cases, all the contact holes are opened.The contact diameter here is considerably larger than the photoresist opening diameter, and if the alignment accuracy in the photolithography process is poor, the contact may protrude beyond the gate electrode. In such a case, there is a problem that the yield and long-term reliability are lowered.

[Means to solve the problem]

In order to solve the above-mentioned problems, the present invention makes the intermediate insulating film a two-layer structure with different impurity concentrations, and if necessary, changes the heat treatment that each film undergoes.

[Effect]

By forming the intermediate insulating film into a two-layer structure with different impurity concentrations and by changing the heat treatment of each film, it is possible to make a large difference in the etch rate of each film in solution. . The etch rate of the upper layer can be increased and the etch rate of the lower layer can be decreased. Therefore, all of the contact holes will not be opened by etching in the solution, and the contact holes will not protrude from the gate electrode.

〔Example〕

Embodiments of the present invention will be described below based on the drawings. 1st
Figure ial is 4wt% boron and 4I% phosphorus by CVD method.
The BPSG film 5 containing 5000 people was subjected to heat treatment at a concentration of 900° C. to 1000° C. for about 30 minutes to perform glass flow (Fig. 1). Thereafter, as shown in FIG. 1(C), for example, BPSGI containing 3 wt% boron and 5 wt% phosphorus is processed by CVD. I5″
Approximately 3000 people were exposed to the temperature between 800℃ and 900℃.
6 Next, as shown in FIG. 1(d), the contact hole pattern is patterned with a photoresist 7 by photolithography, and first in a mixed solution of ammonium fluoride and hydrofluoric acid, for example. Isotropic etching is performed, and then anisotropic dry etching is performed in gas plasma to form contact holes 6. At this time, the first intermediate insulating film 5 is made of 4t% boron, 5iit phosphorus, BPSG
The film and the second intermediate insulating film 5 are made of 3 wt% boron and 5 wt% phosphorus.
wt%, the BPSG films have different impurity concentrations and have undergone different heat treatments. For ammonium fluoride and hydrofluoric acid mixtures, the higher the phosphorus concentration and the lower the heat treatment temperature, the higher the etch rate. Therefore, it is possible to set the etching selectivity of the first insulating film 5 and the second insulating film 5' to the mixed solution of ammonium fluoride and hydrofluoric acid to about 3 to 5, for example. If this is done, etching in the solution will stop near the 5° boundary between the first intermediate insulating film 5 and the second intermediate insulating film, and all contact holes will not be opened. Next, the photoresist is removed, and in order to improve the shape of the contact hole, heat treatment is performed at about 900° C. for about 30 minutes to round the corners (FIG. 1(e)). Since both the first intermediate insulating film 5 and the second intermediate insulating film W15' are BPSG films containing boron and phosphorus at a high concentration, the corners of both are sufficiently rounded by this heat treatment.

〔Effect of the invention〕

As explained above, the present invention has a two-layer structure for the intermediate insulating film that electrically isolates the semiconductor substrate and the metal wiring, and the impurity concentration of each film is changed, and furthermore, the present invention has the following features: If so, by changing the heat treatment that each film undergoes, this etching can be removed by isotropic etching in solution when opening the intermediate insulating film to form contact holes that electrically connect the plate-making metal and the semiconductor substrate. It becomes possible to stop near the boundary between the first layer film and the second layer film. Therefore, it has an excellent contact shape,
Furthermore, it is possible to produce semiconductor devices that exhibit stable yields and are excellent from the viewpoint of long-term reliability. Furthermore, the present invention makes it easier to manage the etch rate of the solution used for isotropic etching when forming contact holes, and it goes without saying that this invention is advantageous from the viewpoint of cost.

1+a+ to tel are process-order cross-sectional views showing a method for manufacturing a semiconductor device according to the present invention, and 2nd thread) to (d) are process-order cross-sectional views showing a conventional method for manufacturing a semiconductor device.

・Semiconductor substrate ・Element isolation insulating film diffusion layer gate electrode First intermediate insulating film Second intermediate insulating film contact hole photoresist Applicant: Seiko Electronics Industries Co., Ltd. Agent: Patent Attorney Takayoshi Hayashi

[Brief explanation of drawings]

No.

Claims (1)

[Claims] In a method of manufacturing a semiconductor device, an insulating film that electrically isolates a semiconductor substrate and metal wiring has a two-layer structure with different impurity concentrations, and a hole-opening method is used to create an electrical connection between the semiconductor substrate and metal wiring. A method for manufacturing a semiconductor device, characterized in that the process is carried out in two steps using isotropic etching and anisotropic etching in a gas phase.