JPH04102378A - Manufacture of light emitting diode device - Google Patents

Manufacture of light emitting diode device

Info

Publication number
JPH04102378A
JPH04102378A JP2220364A JP22036490A JPH04102378A JP H04102378 A JPH04102378 A JP H04102378A JP 2220364 A JP2220364 A JP 2220364A JP 22036490 A JP22036490 A JP 22036490A JP H04102378 A JPH04102378 A JP H04102378A
Authority
JP
Japan
Prior art keywords
light emitting
substrate
emitting diode
dicing
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2220364A
Other languages
Japanese (ja)
Inventor
Toshinori Nakahara
利典 中原
Katsuya Ota
勝也 大田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP2220364A priority Critical patent/JPH04102378A/en
Publication of JPH04102378A publication Critical patent/JPH04102378A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Dicing (AREA)

Abstract

PURPOSE:To control dicing size accuracy well within + or -0.1mm by connecting and cutting two tops of hexagonal through-holes arranged successively lengthwise and breadthwise on a substrate one by one. CONSTITUTION:A plurality of recessed parts 2 which are arranged lengthwise and breadthwise in pairs parallel to a highly heat resistant resin substrate 1 and a hexagonal through-hole 3 are formed. An end part of a first metallic layer 4 is provided to a bottom of the recessed part 2 and extends as far as a rear 7 passing through a top surface of the substrate 1 and the hole 3; extension direction thereof is toward a central direction. An end part 9 of a second metallic layer 8 is provided to a bottom of the recessed part 2 apart from the end part 5, passes through the top surface 6 and the hole 3 and extends as far as the rear 7; extension direction thereof is opposite to the first metallic layer 4. A size of the hole 3 is (a) of 1.8mm and (b) of 0.8mm. An LED 10 is fused on the end part 5. Dicing is carried out as A1A2A3... breadthwise and B1B2B3B4... lengthwise in transverse direction of the substrate 1 using two tops of the hexagonal holes 3 parallel to one side of the recessed part 2 as a marker one by one and a device 13 is completed.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明はリード線のない略箱型をした発光ダイオード装
置に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a substantially box-shaped light emitting diode device without lead wires.

(ロ)従来の技術 近年リード線のないコンパクトな略箱型形状をした発光
ダイオード装置が提案されるようになった。これは例え
ば特公昭60−43040号公報の如く、第6図(基板
の平面図)と第7図(装置の断面図)に示されていた。
(b) Prior Art In recent years, compact light emitting diode devices without lead wires and having a substantially box-like shape have been proposed. This is shown in FIG. 6 (a plan view of the substrate) and FIG. 7 (a sectional view of the device), for example, as in Japanese Patent Publication No. 60-43040.

これらの図に於て、甜脂から成る基板31に複数の凹部
32と四角状のスルーホール33を樅と横に整列して形
成した。そしてメツキを施こした結果、凹部32の底面
にそれぞれの端部34と35が位置し、基板31の頂面
36と側面37を通り裏面38までのびかつ延長方向が
反対となる第1の金属層39と第2の金属層40を形成
した。端部34の上に固着された発光ダイオード41と
端部35を金属細線42で接続し、凹部32のみに透光
性樹脂43を覆っていた。その後、横方向にE 1E 
+ E s・・・と縦方向にF、F、F、F、・・・と
ダイシングすると複数の発光ダイオード装置44が完成
した。
In these figures, a plurality of recesses 32 and square through holes 33 are formed in a substrate 31 made of sugar beet, aligned horizontally with the fir tree. As a result of plating, the ends 34 and 35 are located on the bottom surface of the recess 32, and the first metal extends through the top surface 36 and side surface 37 of the substrate 31 to the back surface 38, and has an opposite extension direction. Layer 39 and second metal layer 40 were formed. A light emitting diode 41 fixed on the end 34 and the end 35 were connected by a thin metal wire 42, and only the recess 32 was covered with a translucent resin 43. Then laterally E 1E
+ E s... and dicing in the vertical direction F, F, F, F,..., a plurality of light emitting diode devices 44 were completed.

(ハ)発明が解決しようとする課題 しかして上述の装置では、基板31からの取り数を多く
するために四角状のスルーホール33の縦の長さeは出
来るだけ小さく、例えば0.8rgmに、そして同様に
凹部32同志の間隔fも0.8mmに作製された。通常
用いるダイシング刃の幅は0.3mmであるから、ダイ
シング刃の外側とスルーホール33の内側との間隔gの
基準値は(0,8−0,3)/ 2 =0.25mmと
なる。そして成型品である基板31の寸法精度は通常±
0.1mmであり、E r E ! E s・・・のダ
イシング寸法精度は±0.15mm以上であるので、装
置の側面45に於てダイシング刃が第1の金属層39又
は第2の金属層40を傷つけて導通不良となり易い。何
故ならば通常ダイシング装置は40mmの距離を視野に
持つ顕微鏡を備えて、基板31上のマーカーに位置合せ
しながらダイシングする。しかし従来の装置の様に、四
角状のスルーホール33は正確なマーカーを求めにくい
のでダイシング寸法精度は±0.15mm以上と粗くな
った。
(c) Problems to be Solved by the Invention However, in the above-mentioned device, in order to increase the number of holes to be removed from the substrate 31, the vertical length e of the square through hole 33 is as small as possible, for example, 0.8 rgm. Similarly, the interval f between the recesses 32 was also set to 0.8 mm. Since the width of a commonly used dicing blade is 0.3 mm, the standard value of the distance g between the outside of the dicing blade and the inside of the through hole 33 is (0,8-0,3)/2 = 0.25 mm. The dimensional accuracy of the substrate 31, which is a molded product, is usually ±
0.1 mm, and E r E ! Since the dicing dimensional accuracy of E s is ±0.15 mm or more, the dicing blade easily damages the first metal layer 39 or the second metal layer 40 on the side surface 45 of the device, resulting in poor conductivity. This is because a dicing apparatus is usually equipped with a microscope having a field of view of 40 mm, and performs dicing while aligning with the markers on the substrate 31. However, unlike the conventional apparatus, it is difficult to obtain accurate markers for the square through-holes 33, so the dicing dimensional accuracy is rough to ±0.15 mm or more.

従って本発明はかかる欠点を解消するものであり、すな
わちダイシング寸法精度を±0.1mm以内に管理しダ
イシング時に金属層を傷つけることなく導通不良を起こ
さない発光ダイオード装置の製造方法を提供するもので
ある。
Therefore, the present invention aims to eliminate such drawbacks, that is, to provide a method for manufacturing a light emitting diode device that manages the dicing dimensional accuracy to within ±0.1 mm, does not damage the metal layer during dicing, and does not cause conduction defects. be.

(ニ)課題を解決するための手段 本発明は上述の課題を解決するために、縦と横に順次整
列した複数の凹部と六角形状のスルーホールを有する基
板に於て、第1の金属層と第2の金属層の少なくとも1
方の端部が前記凹部の底面に位置し、それぞれが前記基
板の頂面と前記スルーホールを通り互いに対向して裏面
に延びる様に形成する工程と、前記端部の上に発光ダイ
オードを固着し該発光ダイオードに配線処理し前記凹部
より広い範囲を透光性樹脂で覆う工程と、前記凹部の1
辺に平行になる様、前記六角形状のスルーホールの2つ
の頂点を順次結んで切断する工程を含む方法で発光ダイ
オード装置を製造するものである。
(d) Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a first metal layer in a substrate having a plurality of recesses and hexagonal through holes arranged in sequence vertically and horizontally. and at least one of the second metal layer
forming a light emitting diode so that one end thereof is located on the bottom surface of the recess, each passing through the top surface of the substrate and the through hole and extending to the back surface facing each other; and fixing a light emitting diode on the end portion. A step of wiring the light emitting diode and covering a wider area than the recess with a translucent resin;
The light emitting diode device is manufactured by a method including a step of sequentially connecting and cutting the two vertices of the hexagonal through hole so as to be parallel to the sides.

(ホ)作 用 上述の様に基板上の六角形状のスルーホールの2つの頂
点を順次結んで切断することにより、ダイシング寸法精
度を十分±0.1mm以内に管理することができる。
(E) Function By sequentially connecting and cutting the two vertices of the hexagonal through hole on the substrate as described above, the dicing dimensional accuracy can be controlled to within ±0.1 mm.

(へ)実施例 最初に第1図乃至第3図に従い本発明の第1実施例を説
明する。第1図は基板の平面図、第2図は発光ダイオー
ド装置の平面図、第3図は第2図のCC断面図である。
(F) Embodiment First, a first embodiment of the present invention will be described with reference to FIGS. 1 to 3. FIG. 1 is a plan view of the substrate, FIG. 2 is a plan view of the light emitting diode device, and FIG. 3 is a CC sectional view of FIG. 2.

これらの図に於て1は液晶ポリマー等の高耐熱性樹脂か
ら成る基板である。
In these figures, 1 is a substrate made of highly heat-resistant resin such as liquid crystal polymer.

基板1に於て平行に対になって縦と横に整列した複数の
凹部2と六角形状のスルーホール3を形成する。凹部2
の大きさは横1.8mm縦2.5mmである。
A plurality of recesses 2 and hexagonal through holes 3 are formed in parallel pairs on a substrate 1 and arranged vertically and horizontally. Recess 2
The size is 1.8 mm in width and 2.5 mm in height.

そしてメツキにてバターニングされた結果、IEIの金
属層4の端部5が凹部2の底面に設けられ、基板1の頂
面6とスルーホール3を通り裏面7までのび、その延長
方向は中心方向を向いている。
As a result of being patterned with plating, the end portion 5 of the metal layer 4 of the IEI is provided on the bottom surface of the recess 2, extends through the top surface 6 of the substrate 1 and the through hole 3 to the back surface 7, and its extension direction is centered. facing the direction.

そして上述のパターニングの結果、第2の金属層8の端
部9が端部5と離れて凹部2の底面に設けられ、頂面6
とスルーホール3を通り裏面7までのび、その延長方向
は第1の金属層4と反対である。また六角形状のスルー
ホール3の大きさは横の長さaが1.8mmで縦の長さ
bが0.8mmである。
As a result of the above-described patterning, the end 9 of the second metal layer 8 is provided on the bottom surface of the recess 2 apart from the end 5, and the top surface 6
It passes through the through hole 3 and extends to the back surface 7, and its extension direction is opposite to that of the first metal layer 4. The hexagonal through hole 3 has a horizontal length a of 1.8 mm and a vertical length b of 0.8 mm.

その後、端部5の上に導電性接着剤を介して発光ダイオ
ード10を固着する。発光ダイオード10は例えば1辺
0.2−0.4mm、厚さ0.3mmの略さいころ状を
なしたGaP、 GaAsP等がらできている。そして
この発光ダイオード10と端部9を金属細線11により
配線処理をする。この発光ダイオード10と金属層al
llのみならず、凹部2より広い範囲の頂面6をエポキ
シ樹脂等がら成る透光性樹脂12で覆う。
Thereafter, a light emitting diode 10 is fixed onto the end portion 5 via a conductive adhesive. The light emitting diode 10 is made of GaP, GaAsP, or the like, and has a substantially dice shape with a side of 0.2 to 0.4 mm and a thickness of 0.3 mm, for example. Then, the light emitting diode 10 and the end portion 9 are wired using thin metal wires 11. This light emitting diode 10 and metal layer al
Not only the top surface 11 but also the top surface 6 in a wider area than the recess 2 is covered with a translucent resin 12 made of epoxy resin or the like.

その後、凹部2の1辺に平行な六角形状のスルーホール
3の2つの頂点を順次マーカーとしてダイシング装置の
顕微鏡で位置合せしながらr基板1の横方向にA 、A
 、A 、・・・とダイシングする。そして縦方向にB
、B、B3B、・・・とダイシングして発光ダイオード
装置】3を完成する。発光ダイオード装置13は側面に
台形状の四部14を有する。四部の寸法、すなわちダイ
シングによる切断面から凹の底面までの間隔Cの基準値
は、ダイシング刃の幅が0.3■だから、(0,8−0
,3)/ 2 =0.25mmである。基板lの寸法精
度を±0.1+nmとしても、ダイシングは頂点をマー
カーにしているのでダイシング寸法精度は高く±0.1
mm以内に管理できる。
Thereafter, the two vertices of the hexagonal through-hole 3 parallel to one side of the recess 2 are sequentially used as markers and aligned using the microscope of the dicing machine while horizontally moving the r-substrate 1 from A to A.
,A,... are diced. And vertically B
, B, B3B, . . . to complete the light emitting diode device [3]. The light emitting diode device 13 has four trapezoidal parts 14 on its side surfaces. The standard value of the dimension of the four parts, that is, the distance C from the cut surface by dicing to the bottom of the concave, is (0,8-0
, 3)/2 = 0.25 mm. Even if the dimensional accuracy of the substrate l is ±0.1+nm, the dicing uses the apex as a marker, so the dicing dimensional accuracy is high ±0.1
It can be controlled within mm.

また従来の装置では、透光性樹脂が凹部のみを覆ってい
たので透光性樹脂と金属層の熱膨張率の違いにより両者
の界面46に於て、透光性樹脂の剥離が生じた。そのた
め、本実施例では、透光性樹脂12を凹部2より広い範
囲に覆っているので透光性樹脂12の密着性は向上し剥
離しなくなる。
Furthermore, in the conventional device, since the light-transmitting resin covered only the concave portions, the light-transmitting resin peeled off at the interface 46 between the two due to the difference in coefficient of thermal expansion between the light-transmitting resin and the metal layer. Therefore, in this embodiment, since the light-transmitting resin 12 covers a wider area than the recess 2, the adhesiveness of the light-transmitting resin 12 is improved and no peeling occurs.

次に第4図(基板の平面図)に従い本発明の第2実施例
を説明する。この図に従い、基板15に於て平行に対に
なって縦と横に整列した複数の凹部2と六角形状のスル
ーホール3を形成し、V字溝16を所定の間隔で縦に(
すなわちスルーホールの整列方向と直交して)ストライ
プ状に形成する。V字溝16は幅が0.4−0.5mm
であり、深さが0.1−0.3mmである。第1実施例
と同じパターニングと配線処理と樹脂モールドをして、
横方向にA 1A * A s・・・とダイシングする
Next, a second embodiment of the present invention will be described with reference to FIG. 4 (plan view of the substrate). According to this figure, a plurality of recesses 2 and hexagonal through-holes 3 are formed in parallel pairs vertically and horizontally on the substrate 15, and V-shaped grooves 16 are formed vertically at predetermined intervals (
That is, they are formed in a stripe shape (orthogonal to the alignment direction of the through holes). The width of the V-shaped groove 16 is 0.4-0.5 mm.
and the depth is 0.1-0.3 mm. The same patterning, wiring processing and resin molding as in the first example were carried out.
Dicing is performed in the horizontal direction as A 1A * A s....

そして基板15のV字溝16の頂点をマーカーとしてダ
イシング装置の顕微鏡で位置合せしながら、縦方向にD
 1D * D s D 、・・・とダイシングして複
数の発光ダイオード装置17(図示せず)が完成する。
Then, while using the apex of the V-shaped groove 16 of the substrate 15 as a marker and aligning it with the microscope of the dicing machine,
A plurality of light emitting diode devices 17 (not shown) are completed by dicing 1D*DsD, . . . .

従来の装置では、基板の縦方向にマーカーがないので適
正な位置で等間隔にダイシングすることができなかった
ので、凹部と側面との間の肉厚を一定に維持できなかっ
た。そのため、本実施例では基板の縦方向に設けたV字
溝16の頂点をマーカーにすることにより、ダイシング
寸法精度を±0.1mm以内に管理することができて、
等間隔にダイシングすることができる。
With conventional equipment, since there are no markers in the vertical direction of the substrate, it was not possible to dice the substrate at equal intervals at appropriate positions, and therefore it was not possible to maintain a constant wall thickness between the recess and the side surface. Therefore, in this embodiment, by using the apex of the V-shaped groove 16 provided in the vertical direction of the substrate as a marker, the dicing dimensional accuracy can be controlled within ±0.1 mm.
Can be diced at equal intervals.

次に第5図(発光ダイオード装置の断面図)に従い本発
明の第3実施例を説明する。第2の金属層18の端部1
9を頂面6の上に設け、金属細線20により発光ダイオ
ード10と第2の金属層18の端部19を結線する。そ
の他の部品及び製造方法は第1実施例と同じである。
Next, a third embodiment of the present invention will be described with reference to FIG. 5 (cross-sectional view of a light emitting diode device). End 1 of second metal layer 18
9 is provided on the top surface 6, and the light emitting diode 10 and the end 19 of the second metal layer 18 are connected by a thin metal wire 20. Other parts and manufacturing methods are the same as in the first embodiment.

そして従来の装置では凹部の底面に第1の金属層の端子
および第2の金属層の端子を設けるのでh寸法で示され
る底面は広い面積となり、発光面積が広くなるので狭指
向性が得られない。そのため本実施例では凹部2の底面
に第1の金属層4の端部5を設ければ良いので、6寸法
で示される底面の面積は従来よりも小さくできる。従っ
て、その他の寸法が従来と同じであれば、従来より発光
面積が狭くなり狭指向性が得られる。
In the conventional device, since the terminals of the first metal layer and the terminals of the second metal layer are provided on the bottom of the recess, the bottom surface indicated by the h dimension has a large area, and the light emitting area is wide, so narrow directivity can be obtained. do not have. Therefore, in this embodiment, since it is sufficient to provide the end portion 5 of the first metal layer 4 on the bottom surface of the recess 2, the area of the bottom surface indicated by the 6 dimensions can be made smaller than in the conventional case. Therefore, if other dimensions are the same as the conventional one, the light emitting area is smaller than the conventional one, and narrow directivity can be obtained.

(ト)発明の効果 上述の様に、基板上に設けた六角形状のスルーホールの
2つの頂点を順次マーカーとしてダイシングするのでダ
イシング寸法精度は±0.1mm以内に管理することが
できる。その結果ダイシング時に金属層を傷つけること
がないので導通不良を防止できる。
(G) Effects of the Invention As described above, since dicing is performed sequentially using the two vertices of the hexagonal through hole provided on the substrate as markers, the dicing dimensional accuracy can be controlled within ±0.1 mm. As a result, the metal layer is not damaged during dicing, so poor conduction can be prevented.

そして透光性樹脂を凹部より広い範囲に覆っているので
透光性樹脂と金属層の密着性が向上し、透光性樹脂の剥
離が防止できる。その結果、両者の隙間からの不純物等
の侵入による発光ダイオードの損傷を防止し、発光ダイ
オード装置の寿命が長くなる。
Since the translucent resin covers a wider area than the recess, the adhesion between the translucent resin and the metal layer is improved, and peeling of the translucent resin can be prevented. As a result, damage to the light emitting diode due to the intrusion of impurities through the gap between the two is prevented, and the life of the light emitting diode device is extended.

さらに、基板の縦方向に設けた7字溝の頂点をマーカー
にすることにより、ダイシング寸法精度を±0.1mm
以内に管理することができる。その結果、等間隔にダイ
シングできるので凹部と側面との間の肉厚を一定に維持
することができ、発光ダイオード装置の均一強度が確保
でき、こわれにくくなる。
Furthermore, by using the apex of the 7-shaped groove provided in the vertical direction of the substrate as a marker, the dicing dimensional accuracy can be improved to ±0.1 mm.
can be managed within. As a result, since the dicing can be performed at equal intervals, the wall thickness between the recess and the side surface can be maintained constant, and uniform strength of the light emitting diode device can be ensured, making it less likely to break.

そして第2の金属層の端部を基板の頂面に設は凹部の底
面に第1の金属層の端部および発光ダイオードを設ける
ことにより、凹部の底面の面積を小さくできるので、発
光面積が小さくなり狭指向性が要求される需要を満足さ
せることができる。
By providing the end of the second metal layer on the top surface of the substrate and the end of the first metal layer and the light emitting diode on the bottom of the recess, the area of the bottom of the recess can be reduced, so the light emitting area can be reduced. It is possible to satisfy the demand for small and narrow directivity.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1実施例に於ける基板の平面図、第
2図はそれの発光ダイオード装置の平面図、第3図は第
2図のCC断面図、第4図は本発明の第2実施例に於け
る基板の平面図、第5図は本発明の第3実施例に於ける
発光ダイオード装置の断面図、第6図は従来の装置に於
ける基板の平面図、第7図はそれの発光ダイオード装置
の断面図である。 1.15・・・基板、2・・・凹部、3・・・スルーホ
ール。 4・・・第1の金属層、5・・・第1の金属層の端部。 6・・・頂面、7・・・裏面、8.18・・・第2の金
属層。 9、 ド。 19・・・第2の金属層の端部、10・・・発光ダイオ
−12・・・透光性樹脂、13・・・発光ダイオード装
置。 出願人 三洋電機株式会社外1名 代理人 弁理士 西野卓嗣(外2名) 第4図
FIG. 1 is a plan view of a substrate in a first embodiment of the present invention, FIG. 2 is a plan view of a light emitting diode device thereof, FIG. 3 is a CC sectional view of FIG. 2, and FIG. 4 is a plan view of the present invention. 5 is a sectional view of a light emitting diode device in a third embodiment of the present invention, FIG. 6 is a plan view of a substrate in a conventional device, and FIG. FIG. 7 is a sectional view of the light emitting diode device. 1.15... Board, 2... Recess, 3... Through hole. 4: first metal layer; 5: end of first metal layer. 6... Top surface, 7... Back surface, 8.18... Second metal layer. 9. Do. 19... End portion of second metal layer, 10... Light emitting diode 12... Transparent resin, 13... Light emitting diode device. Applicant: Sanyo Electric Co., Ltd. and 1 other representative Patent attorney: Takuji Nishino (2 others) Figure 4

Claims (1)

【特許請求の範囲】[Claims] (1)縦と横に順次整列した複数の凹部と六角形状のス
ルーホールを有する基板に於て、第1の金属層と第2の
金属層の少なくとも1方の端部が前記凹部の底面に位置
し、それぞれが前記基板の頂面と前記スルーホールを通
り互いに対向して裏面に延びる様に形成する工程と、前
記端部の上に発光ダイオードを固着し該発光ダイオード
に配線処理し前記凹部より広い範囲を透光性樹脂で覆う
工程と、前記凹部の1辺に平行になる様、前記六角形状
のスルーホールの2つの頂点を順次結んで切断する工程
を含む発光ダイオード装置の製造方法。
(1) In a substrate having a plurality of recesses and hexagonal through holes arranged in sequence vertically and horizontally, at least one end of the first metal layer and the second metal layer is on the bottom surface of the recess. a step of forming the light emitting diodes so as to pass through the top surface of the substrate and the through holes and extending to the back surface facing each other; fixing a light emitting diode on the end portion, processing wiring to the light emitting diode and forming the recessed portion; A method for manufacturing a light emitting diode device, comprising the steps of: covering a wider area with a translucent resin; and sequentially connecting and cutting two vertices of the hexagonal through hole so as to be parallel to one side of the recess.
JP2220364A 1990-08-21 1990-08-21 Manufacture of light emitting diode device Pending JPH04102378A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2220364A JPH04102378A (en) 1990-08-21 1990-08-21 Manufacture of light emitting diode device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2220364A JPH04102378A (en) 1990-08-21 1990-08-21 Manufacture of light emitting diode device

Publications (1)

Publication Number Publication Date
JPH04102378A true JPH04102378A (en) 1992-04-03

Family

ID=16749981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2220364A Pending JPH04102378A (en) 1990-08-21 1990-08-21 Manufacture of light emitting diode device

Country Status (1)

Country Link
JP (1) JPH04102378A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5670797A (en) * 1994-12-06 1997-09-23 Sharp Kabushiki Kaisha Compact light-emitting device with sealing member and light-transmitting resin seal
JP2002064226A (en) * 2000-06-28 2002-02-28 Agilent Technol Inc Light source
US6686609B1 (en) * 2002-10-01 2004-02-03 Ultrastar Limited Package structure of surface mounting led and method of manufacturing the same
JP2005183993A (en) * 2003-12-19 2005-07-07 Lumileds Lighting Us Llc Led package assembly
WO2023008158A1 (en) * 2021-07-29 2023-02-02 株式会社日立ハイテク Absorptiometry device and biochemical assay device comprising same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5670797A (en) * 1994-12-06 1997-09-23 Sharp Kabushiki Kaisha Compact light-emitting device with sealing member and light-transmitting resin seal
US5814837A (en) * 1994-12-06 1998-09-29 Sharp Kabushiki Kaisha Compact light-emitting device with sealing member
US5882949A (en) * 1994-12-06 1999-03-16 Sharp Kabushiki Kaisha Method of making compact light-emitting device with sealing member
JP2002064226A (en) * 2000-06-28 2002-02-28 Agilent Technol Inc Light source
US6686609B1 (en) * 2002-10-01 2004-02-03 Ultrastar Limited Package structure of surface mounting led and method of manufacturing the same
JP2005183993A (en) * 2003-12-19 2005-07-07 Lumileds Lighting Us Llc Led package assembly
WO2023008158A1 (en) * 2021-07-29 2023-02-02 株式会社日立ハイテク Absorptiometry device and biochemical assay device comprising same

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