JPH0394516A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPH0394516A
JPH0394516A JP1231106A JP23110689A JPH0394516A JP H0394516 A JPH0394516 A JP H0394516A JP 1231106 A JP1231106 A JP 1231106A JP 23110689 A JP23110689 A JP 23110689A JP H0394516 A JPH0394516 A JP H0394516A
Authority
JP
Japan
Prior art keywords
function block
internal function
output
output signal
trs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1231106A
Other languages
Japanese (ja)
Inventor
Yutaka Kawanaka
川中 裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP1231106A priority Critical patent/JPH0394516A/en
Publication of JPH0394516A publication Critical patent/JPH0394516A/en
Pending legal-status Critical Current

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  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To extract an output signal without giving mutual effect onto an internal function block by installing two transistors(TRs) in series between the internal function block and an output terminal, and installing one TR between nodes of the TRs and ground. CONSTITUTION:An output circuit 22 has two output signal selection TRs and a TR fixing a node between th two TRs in an output node from each internal function block. When an output signal of an internal function block 11 is led to an output terminal 22, TRs 13, 14, 21 are turned on and Trs 16, 18, 19 are turned off. Since an output signal from the internal function block 11 is leaked through a drain-source capacitance of the Tr 19, since it flows to ground, the effect of the internal function 11 onto the internal function block 17 is interrupted. Moreover, when the output signal of the internal function block 17 is led to the output terminal 12, the TR 16 is similarly turned on and the effect of the internal function block 17 onto the internal function block 11 is eliminated.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、1チップに栗積されたマイクロコンピュータ
などの半導体集積回路に間し、特に、内部機能ブロック
からの出力信号を出力する出力回路に関するものである
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to semiconductor integrated circuits such as microcomputers integrated on one chip, and particularly to an output circuit that outputs output signals from internal functional blocks. It is.

従来の技術 従来、1チップに集積されたマイクロコンピュータなど
に内蔵されたADコンバータなどの2個以上の内部機能
ブロックの出力信号から選択して外部へ出力する場合に
は、トランジスタで構或した出力信号選択回路を用いて
出力信号を切換えている。
Conventional technology Conventionally, when selecting from among the output signals of two or more internal functional blocks such as an AD converter built into a microcomputer integrated on one chip and outputting it to the outside, an output configured with a transistor is used. The output signal is switched using a signal selection circuit.

第2図に従来の出力回路の一例を示す。第2図において
、内部機能ブロック1.2からの出力信号を必要に応じ
て選択し、出力端子3に導出するために、内部eiaブ
ロック1.2と出力端子3の間にそれぞれトランジスタ
4,5を設けている。
FIG. 2 shows an example of a conventional output circuit. In FIG. 2, transistors 4 and 5 are connected between the internal EIA block 1.2 and the output terminal 3, respectively, in order to select the output signal from the internal function block 1.2 as required and lead it to the output terminal 3. has been established.

ここで、内部機能ブロック1の出力信号を出力端子3に
導出する場合は、トランジスタ4をオン、トランジスタ
5をオフとし、また、内部機能ブロック2の出力信号を
出力端子3へ導出する場合は、トランジスタ4をオフ、
トランジスタ5をオンとしていた。
Here, when the output signal of the internal function block 1 is to be led to the output terminal 3, the transistor 4 is turned on and the transistor 5 is turned off, and when the output signal of the internal function block 2 is to be led to the output terminal 3, the transistor 4 is turned on and the transistor 5 is turned off. Turn off transistor 4,
Transistor 5 was turned on.

発明が解決しようとする課題 しかし、上記従来の構或では、MOSトランジスタのド
レイン・ソース間に容量が存在し、内部機能ブロック゛
1の出力信号を出力端子3へ導出している場合には、ト
ランジスタ5がオフしているにもかかわらず、ドレイン
・ソース間容量によって内部#Jaブロック2の出力信
号に内部機能ブロック1の出力信号がカップリングする
ことがあり、内部機能ブロック2の誤動作の原因となっ
ているという問題を有していた。
Problem to be Solved by the Invention However, in the conventional structure described above, if a capacitance exists between the drain and source of the MOS transistor and the output signal of the internal functional block 1 is led to the output terminal 3, the transistor 5 is off, the output signal of internal function block 1 may be coupled to the output signal of internal #Ja block 2 due to the drain-source capacitance, which may cause malfunction of internal function block 2. The problem was that the

本発明は上記従来の問題を解決するもので、内部機能ブ
ロックに相互影響を与えることなく出力信号を取り出す
ことのできる出力回路を有する半導体集積回路を提供す
ることを目的とするものである。
The present invention solves the above-mentioned conventional problems, and aims to provide a semiconductor integrated circuit having an output circuit that can take out output signals without mutually influencing internal functional blocks.

課題を解決するための手段 上記課題を解決するために本発明の半導体集積回路は、
少なくとも2個の内部機能ブロックと出力端子間にそれ
ぞれ直列に2個のトランジスタを設置し、前記2個のト
ランジスタ間のノードと接地間に1個のトランジスタを
それぞれ設置した出力回路を有するものである。
Means for Solving the Problems In order to solve the above problems, the semiconductor integrated circuit of the present invention includes:
It has an output circuit in which two transistors are each installed in series between at least two internal functional blocks and an output terminal, and one transistor is installed between a node between the two transistors and ground. .

作用 上記構或により、各内部機能ブロックの出力信号を選択
して出力端子に導出する場合、出力信号を導出しようと
する導出側の内部機能ブロックと出力端子間に直列に接
続された2個のトランジスタをオンして出力端子に導出
するようにし、さらに、導出側以外の内部機能ブロック
と出力端子間に直列に接続された2個のトランジスタ間
のノードと接地間に接続されたノード固定用のトランジ
スタをオンし、出力端子から導出側以外の内部機能ブロ
ックに接続されたトランジスタのドレイン・ソース間容
量を通して出力信号が洩れても、ノード固定用のトラン
ジスタを介して接地し、出力信号を導出側以外の内部機
能ブロックに伝達されることを防ぐ。したがって、各内
部機能ブロックの相互の影響が遮断されて、各内部機能
ブロックは正常動作することになる。
Effect When selecting the output signal of each internal functional block and deriving it to the output terminal with the above structure, two The transistor is turned on so that the output is output to the output terminal, and a fixed node is connected between the node between the two transistors connected in series between the internal functional block other than the output terminal and the output terminal, and the ground. Even if the transistor is turned on and the output signal leaks through the drain-source capacitance of the transistor connected from the output terminal to an internal functional block other than the output side, the output signal is connected to the output side by grounding through the transistor for fixing the node. Prevents transmission to other internal functional blocks. Therefore, the influence of each internal functional block on each other is cut off, and each internal functional block operates normally.

実施例 以下、本発明の一実施例について図面を参照しながら説
明する。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例を示す半導体集積回路におけ
る出力回路図である。第1図において、内部機能ブロッ
ク11と出力端子12の間に直列に2個のトランジスタ
 13. 14を設置し、また、これら2個のトランジ
スタ 13. 14間の信号伝達ノード15と接地間に
トランジスタ16を設置する。さらに、内部機能ブロッ
ク17と出力端子12の間に直列に2個のトランジスタ
 18.19を設置し、また、これら2@のトランジス
タ 18. 19間の信号伝達ノード20と接地間にト
ランジスタ21を設置する。
FIG. 1 is an output circuit diagram in a semiconductor integrated circuit showing one embodiment of the present invention. In FIG. 1, two transistors are connected in series between the internal function block 11 and the output terminal 12.13. 14, and these two transistors 13. A transistor 16 is installed between the signal transmission node 15 between the nodes 14 and the ground. Furthermore, two transistors 18.19 are installed in series between the internal function block 17 and the output terminal 12, and these two transistors 18. A transistor 21 is installed between a signal transmission node 20 between the transistors 19 and the ground.

このように、出力回路22は、出力信号選択用トランジ
スタ2個とこの2個のトランジスタ間のノードを固定す
るトランジスタ1個を各内部機能ブロックからの出力ノ
ードに有するものである。
In this way, the output circuit 22 has two transistors for output signal selection and one transistor for fixing the node between these two transistors at the output node from each internal functional block.

上記構或により、以下、その動作を説明する。The operation of the above structure will be explained below.

内部機能プロック11の出力信号を出力端子12へ導出
する場合は、トランジスタ13,14.21がオンし、
トランジスタ16, 18. 19がオフとなる。つま
り、トランジスタ21がオンであることで、信号伝達ノ
ード20が接地状態となり、内部機能ブロック11から
の出力信号がトランジスタ19のドレイン・ソース間容
量を通して洩れても接地されることになるので、内部機
能ブロック17に対して内部機能11の影響は遮断され
る。
When outputting the output signal of the internal function block 11 to the output terminal 12, the transistors 13, 14, and 21 are turned on.
Transistors 16, 18. 19 is turned off. In other words, when the transistor 21 is on, the signal transmission node 20 is grounded, and even if the output signal from the internal functional block 11 leaks through the drain-source capacitance of the transistor 19, it is grounded. The influence of the internal function 11 on the function block 17 is blocked.

また、内部機能ブロック17の出力信号を出力端子12
へ導出する場合も同様に、トランジスタ16をオンとし
て、内部機能ブロック11に対して内部機能ブロック1
7の影響は遮断ざれる。
In addition, the output signal of the internal function block 17 is sent to the output terminal 12.
Similarly, when deriving internal function block 1 to internal function block 11, transistor 16 is turned on.
The influence of 7 will be blocked.

発明の効果 以上のように本発明によれば、各内部機能ブロックに相
互影響を与えることなく、出力信号を取り出すことがで
きる。
Effects of the Invention As described above, according to the present invention, output signals can be extracted without mutually influencing each internal functional block.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す半導体集積回路におけ
る出力回路図、第2図は従来の半導体集積回路における
出力回路図である。 11.17・・・内部機能ブロック、12・・・出力端
子、13, 14, 16, 18, 19.21・・
・トランジスタ、15.20・・・信号伝達ノード、2
2・・・出力回路。
FIG. 1 is an output circuit diagram of a semiconductor integrated circuit showing an embodiment of the present invention, and FIG. 2 is an output circuit diagram of a conventional semiconductor integrated circuit. 11.17... Internal function block, 12... Output terminal, 13, 14, 16, 18, 19.21...
・Transistor, 15.20...Signal transmission node, 2
2...Output circuit.

Claims (1)

【特許請求の範囲】[Claims] 1、少なくとも2個の内部機能ブロックと出力端子間に
それぞれ直列に2個のトランジスタを設置し、前記2個
のトランジスタ間のノードと接地間に1個のトランジス
タをそれぞれ設置した出力回路を有する半導体集積回路
1. A semiconductor having an output circuit in which two transistors are each installed in series between at least two internal functional blocks and an output terminal, and one transistor is installed between the node between the two transistors and ground. integrated circuit.
JP1231106A 1989-09-06 1989-09-06 Semiconductor integrated circuit Pending JPH0394516A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1231106A JPH0394516A (en) 1989-09-06 1989-09-06 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1231106A JPH0394516A (en) 1989-09-06 1989-09-06 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH0394516A true JPH0394516A (en) 1991-04-19

Family

ID=16918394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1231106A Pending JPH0394516A (en) 1989-09-06 1989-09-06 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH0394516A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5690729A (en) * 1994-09-21 1997-11-25 Materials Technology, Limited Cement mixtures with alkali-intolerant matter and method
US6296336B1 (en) 1998-06-01 2001-10-02 Nec Corporation Water-proof structure for use with a frame body

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5690729A (en) * 1994-09-21 1997-11-25 Materials Technology, Limited Cement mixtures with alkali-intolerant matter and method
US6296336B1 (en) 1998-06-01 2001-10-02 Nec Corporation Water-proof structure for use with a frame body

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