JPH0394224A - Matrix type display device - Google Patents

Abstract

PURPOSE:To obtain a display picture plane with uniform brightness by forming dummy scanning lines on both outsides of an array of scanning lines at the same intervals as those of the array of scanning line and dummy signal lines on both outsides of an array of signal lines at the same intervals with the array of signal lines. CONSTITUTION:The dummy scanning lines 6a and 6b, and 7a and 7b are provided in parallel on both the outsides of the array of scanning lines. The intervals between the dummy scanning lines 6a and 6b, and 7a and 7b, and the scanning lines and the intervals between the dummy scanning lines 6a and 6b, and 7b and 7b are set equal to the intervals of the scanning lines. Similarly, the dummy signal lines 16a and 16b, and 17a and 17b are provided in parallel on both outsides of the signal lines. The intervals between the dummy signal lines 16a and 16b, and 17a and 17b, and the signal lines and the intervals between the dummy signal lines 16a and 16b, and 17a and 17b and are set equal to the intervals of the signal lines. Consequently, metallic conductors are arranged even in an area other than where picture element electrodes are arrayed in matrix at the same intervals with the scanning lines and signal lines. Consequently, the brightness of the picture plane has no difference.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a matrix display device used in a reflective liquid crystal display device or the like.

(Prior Art) Reflective matrix-type liquid crystal display devices are used in displays for laptop personal computers, word processors, and the like. The active matrix method is often used in these liquid crystal display devices. In an active matrix display device, picture elements arranged in a matrix are selectively driven by scanning lines and signal lines.

FIG. 5 shows a schematic plan view of a matrix type display device used in a conventional reflective matrix type display device. A large number of gate bus lines 1 functioning as scanning lines are provided in parallel. A large number of source bus lines 2 are provided to intersect with the gate bus lines 1 and function as signal lines. The gate bus line 1 and the source bus line 2 intersect with each other with an insulating film interposed therebetween in a non-conducting state. A schematic diagram of a rectangular area surrounded by the gate bus wiring 1 and the source bus wiring 2 is shown in FIG. A TFT 3 is arranged near the intersection of the gate bus line 1 and the source bus line 2. The TFT 3 functions as a switching element and is connected to the gate bus line I1, the source bus line 2, and the picture element electrode 5. Fifth
In the board shown in the figure, the area surrounded by broken lines is the display screen 10.
It is.

(Problems to be Solved by the Invention) In the display device using the active matrix substrate shown in FIG. Metal wiring of a gate bus wiring 1 and a source bus wiring 2 are formed between them. However, in a region other than the region where the picture element electrodes 5 are arranged in a matrix, only one of the metal wires of the gate bus wire 1 and the source bus wire 2 is formed. As described above, since the density of metal wiring is different between the area where the picture element electrodes 5 are arranged and the other area,
Two areas with different brightness appear on the display screen.

If such a difference in brightness exists, it is not desirable as a display device.

By the way, in order to display fine images using an active matrix type display device, it is necessary to make the picture elements that make up the matrix very small and to use a very large number of picture elements. As the number of picture elements increases, the total length of the gate bus line 1 and the source bus line 2 also increases accordingly.

As the total length of the gate bus wiring 1 and the source bus wiring 2 becomes longer, disconnection defects are more likely to occur in these bus wirings 1 and 2. For example, if a disconnection defect occurs in the source bus wiring 2, a line-shaped defect will occur on the display screen 10 because no signal voltage will be applied beyond the disconnection point. Line-shaped defects significantly degrade the image quality of display devices, and are a major cause of reduced yields of display devices. Moreover, as display devices become larger, the total length of these bus lines becomes even longer. As the bus wiring becomes longer as described above, it becomes increasingly difficult to manufacture the bus wiring without disconnection defects.

The present invention is intended to solve these problems, and an object of the present invention is to provide a matrix display device that can provide a display screen with uniform brightness and can correct disconnection defects.

(Means for Solving the Problems) A matrix type display device of the present invention includes a pair of insulating substrates, pixel electrodes arranged in a matrix on the inner surface of one of the pair of substrates, and A matrix type display device comprising scanning lines and signal lines arranged vertically and horizontally in rows in one direction at equal intervals between element electrodes, the display device comprising: At least one pseudo scanning line formed at the same spacing as the spacing between the rows of scanning lines; and at least one pseudo scanning line formed at the same spacing as the spacing between the rows of signal lines on both sides of the row of signal lines. a signal line, the pseudo-scanning line and the column of signal lines intersect with each other through at least one layer of insulating film, and the pseudo-signal line and the column of scanning lines intersect with each other through at least one layer of insulating film. The above objective is achieved by intersecting with each other.

(Function) In the matrix type display device of the present invention, pseudo scanning lines are provided in parallel on both sides of the row of scanning lines. The interval between the pseudo-scanning lines and the interval between each pseudo-scanning line is set to be the same as the interval between the scanning lines. Similarly, pseudo signal lines are provided in parallel on both sides of the row of signal lines. The spacing between the pseudo signal lines and the signal lines and the spacing between each pseudo signal line are set to be the same as the spacing between the signal lines. As described above, in the matrix type display device of the present invention, metal wirings are arranged at the same intervals as the scanning lines and signal lines even in areas other than the area where picture element electrodes are arranged in a matrix. As a result, the area where the picture element electrodes are arranged and the other area,
There is no difference in screen brightness.

Further, in the MJ display device of the present invention, the pseudo-scanning lines intersect with the signal line columns via at least one insulating film. Similarly, the pseudo signal line intersects with the scanning line column via at least one layer of insulating film. A pseudo-scanning line provided on one side of a column of scanning lines forms a pair with a pseudo-scanning line on the other side parallel to the column of scanning lines, and a pseudo-scanning line provided on one side of a column of signal lines. The pseudo signal line may be configured to form a pair with a pseudo signal line on the other parallel side across the column of signal lines. The two pseudo scanning lines forming a pair and the two pseudo signal lines forming a pair form rectangles, and can be electrically connected to each other at their intersections. With this configuration in which the pseudo scanning line and the pseudo signal line are connected in advance, even if a disconnection defect occurs in either the scanning line or the signal line, this disconnection defect can be corrected.

This disconnection defect can be corrected by connecting the scanning line and the pseudo signal line or by connecting the signal line and the pseudo scanning line. That is, when a disconnection defect occurs in a scanning line, the defective scanning line is connected to a pair of two pseudo signal lines at both ends of the defective scanning line. When a disconnection defect occurs in the signal line, the defective signal line is connected to two paired pseudo scanning lines at both ends of the defective signal line. The defective scanning line and the pseudo-signal line, and the defective signal line and the pseudo-scanning line are connected by irradiating optical energy such as a laser beam to their respective intersections.

By making the connection in this way, disconnection defects can be corrected.

In the matrix type display device of the present invention, both ends of the two pseudo-scanning lines forming a pair can be drawn out to the outside of the substrate and electrically connected to each other, or arranged so as to be connectable.

With this configuration, even if a disconnection occurs in the signal line,
Can be easily modified. This disconnection defect can be corrected by connecting the pseudo scanning line and the defective signal line by laser beam irradiation, as described above. Similarly, the pair 2
Both ends of the book pseudo signal line may be drawn out of the board and electrically connected to each other, or may be arranged so as to be connectable. With this configuration, disconnection defects occurring in the scanning line can be corrected.

(Example) The present invention will be described below with reference to an example. FIG. 1 shows a schematic plan view of an active matrix substrate used in a matrix type display device of the present invention.

The substrate shown in FIG. 1 is used for a reflective display device.

A large number of gate bus lines 1 functioning as scanning lines are provided in parallel. An insulating film 8, which will be described later, is formed on the entire surface of the substrate on the gate bus line l. A large number of source bus lines 2 functioning as signal lines cross over the gate bus line 1 with an insulating film 8 interposed therebetween.

FIG. 2 shows a schematic diagram of a rectangular area surrounded by the Kate bus interconnection 1i12 and the source bus interconnection 1i12.

A TFT 3 is arranged near the intersection of the gate bus line 1 and the source bus line 2. TFT3 functions as a switching element, and connects gate bus wiring 1 and source bus wiring 2.
, and connected to the picture element electrode 5. As shown in FIG. 1, the area surrounded by broken lines is the display screen 10.

Pseudo wirings 26 and 27 are provided at the outer periphery of the rectangular area where the gate bus wiring 1 and the source bus wiring 2 intersect. The pseudo wiring 26 includes pseudo scanning lines 6a and 6b,
A rectangular shape is formed by the pseudo signal lines 16a and 16b. The pseudo wiring 27 is provided further on the outer periphery of the pseudo wiring 26, and is connected to the pseudo scanning lines 7a and 7b and the pseudo signal line 1.
7a and 17b form a rectangle.

The spacing between the gate bus wiring 1a located at the outermost side of the row of gate bus wiring l and the pseudo scanning line 6a, and the spacing between the pseudo scanning lines 6a and 78 are made equal to the spacing between the rows of gate bus wiring l. There is. Further, the distance between the outermost gate bus wire 1b located on the opposite side of the gate bus wire 1a and the pseudo scanning line 6b, and the distance between the pseudo scanning lines 6b and 7b are also as follows.
The spacing is set equal to the spacing between the columns of gate bus wiring l. Similarly, the spacing between the source bus wiring 2a located at the outermost side of the column of source bus wiring 2 and the pseudo signal line 16a, and the spacing between the pseudo signal lines 16a and 17a are equal to the spacing between the columns of source bus wiring 2. has been done. In addition, source bus wiring 2a
The distance between the outermost source bus wiring 2b located on the opposite side of the pseudo signal line 16b and the pseudo signal lines 16b and 17
The spacing between the rows of the source bus lines 2 and b is also made equal to the spacing between the columns of the source bus lines 2.

In this embodiment, the pseudo scanning lines 6a, 6b, 7a, and 7b are formed simultaneously with the gate bus wiring 1.

Therefore, the pseudo scanning lines 6a, 6b, 7a and 7b are made of the same material as the gate bus line 1.

In addition, pseudo signal lines 1 6 a, 1 6 b, 1
7a and l7b are formed simultaneously with the source bus wiring 2.

Therefore, pseudo signal lines 16a, 16b, 173 and 17b
is formed of the same material as the source bus wiring 2.

In this embodiment, the above-mentioned insulating film 8 is removed at the intersections of the pseudo scanning lines 6a and 6b1 and the pseudo signal lines 16a and 16b, and between the pseudo scanning lines 6a and the pseudo signal lines 6a and 16t). , and the pseudo scanning line 6b and the pseudo signal lines 16a and 16b are electrically connected. Similarly, pseudo scanning lines 7a and 7b and pseudo signal line 17
In the portion where a and 17b intersect, the above-mentioned insulating film 8
is removed, and the pseudo scanning line 7a and the pseudo signal lines 17a and 1
7b, and between the pseudo scanning line 7b and the pseudo signal line 17a.
and X7b are electrically connected.

In this embodiment, pseudo scanning lines parallel to each other at the same intervals as the row of gate bus wires 1 are formed on both sides of the row of gate bus wires 1 using the same material as the gate bus wires 1. Similarly,
On both sides of the row of source bus wires 2, pseudo signal lines parallel to each other at the same intervals as the row of source bus wires 2 are formed of the same material as the source bus wires 2. By providing the pseudo wirings 26 and 27 outside the area where the picture element electrodes 5 are arranged in a matrix, the brightness of the screen can be adjusted between the area where the picture element electrodes 5 are arranged and the other areas. There is no difference.

In this embodiment, disconnection defects occurring in the gate bus wiring 1 and the source bus wiring 2 can be corrected using the pseudo wirings 26 and 27. As an example, as shown in FIG. 1, there is a case where a disconnection l2 occurs in the source bus wiring 2C. In such a case, the defective source bus wiring 2C
and pseudo-scanning lines 6a and 6b at their respective intersections 11a.
and 1 lb electrically connected.

3(a) and 3(b) show cross-sectional views taken along the pseudo scanning line 6a at the intersection 118. A pseudo-scanning line 6a is formed on the glass substrate l3, and the above-mentioned insulating film 8 is formed on the entire surface of the pseudo-scanning line 6a. A source bus wiring 2C crosses over the pseudo scanning line 6a with an insulating film 8 interposed therebetween.

The pseudo scanning line 6a and the defective source bus interconnection 1; t2c are connected by irradiating the position shown by the arrow 14 with a laser beam. The insulation of the insulating film 8 is broken by the laser beam irradiation, and the metals of the pseudo scanning line 6a and the defective source bus wiring 2C are melted and electrically connected to each other.

Similarly, at the intersection 1lb, the pseudo scanning line 6b and the defective source bus wiring 2C are connected by laser beam irradiation.

Pseudo scanning lines 6a and 6b are pseudo signal lines 16a and 16b.
Therefore, both sides of the disconnection part 12 of the defective source bus wiring 2C are connected to the pseudo scanning lines 6a and 6.
b, and pseudo signal lines 16a and 161).

In this embodiment, disconnection defects occurring in the gate bus wiring 1 can also be corrected. In this case, the defective gate path wiring and the pseudo signal lines 16a and 16b are electrically connected by laser beam irradiation. In addition, although the above example shows an example in which the correction is made using the pseudo wiring 26, the correction can be made in the same way using the pseudo wiring 27. Furthermore, if the pseudo wirings 26 and 27 are used, the gate bus wiring 1 and the second bus wiring can be connected! ! ! 2
It is possible to correct a disconnection defect that occurs in two different wires.

FIG. 4 shows a schematic plan view of an active matrix substrate used in another embodiment of the present invention. A large number of gate bus lines 1 functioning as scanning lines are provided in parallel.

A large number of source bus lines 2 are provided to intersect with the gate bus lines 1 and function as signal lines. The gate bus line 1 and the source bus line 2 intersect with each other with an insulating film 8 interposed therebetween in a non-conductive state. The schematic diagram of the rectangular area surrounded by the gate bus line 1 and the source bus line 2 is the same as that in FIG. 2 described above. A TFT 3 is arranged near the intersection of the gate bus line 1 and the source bus line 2. TFT
3 functions as a switching element, and the gate electrode of the TFT 3 is connected to the gate bus line 1, the source electrode is connected to the source bus line 2, and the drain electrode is connected to the picture element electrode 5.

As shown in FIG. 4, the area surrounded by broken lines is the display screen 10.
It is.

Pseudo scanning lines 6a, 7a, 6b, and 7b are formed in parallel on both outer sides of the row of gate bus lines 1. The pseudo scanning lines 6a, 7a, 6b, and 7b are formed at the same time as the gate bus line 1, and are therefore made of the same material as the gate bus line 1. The distance between the gate bus wire 1a located at the outermost side of the row of gate bus wires 1 and the pseudo scanning line 6a, and the distance between the pseudo scanning lines 6a and 7a are determined by the gate bus wire l.
is equal to the column spacing. Also, the outermost gate bus wiring 1b located on the opposite side of the gate bus wiring 1a
and the pseudo-scanning line 6b, and the pseudo-scanning lines 6b and 7b.
The interval between them is also made equal to the interval between the rows of gate bus lines l.

Both ends of each of the pseudo scanning lines 6a, 7a, 6b, and 7b are parallel to the source bus wiring 2 and are drawn out to the outside of the substrate. The end portion of the pseudo scanning line 6a drawn out to the outside of the substrate is arranged so as to be connectable to the end portion of the pseudo scanning line 6b similarly drawn out to the outside of the substrate. Similarly, the end of the pseudo-scanning line 7a drawn out to the outside of the substrate is arranged so as to be connectable to the end of the pseudo-scanning line 7b.

Pseudo signal lines 1 to 6 are placed on both sides of the row of source bus lines 2.
a, 1 7 a, 1 6 b and 17 b are formed. Pseudo signal lines 1 6 a, 1 7 a,
1 6 b and 17b are formed at the same time as the source bus wiring 2, and are therefore formed of the same material as the source bus wiring 2. The interval between the source bus wiring 2a located at the outermost position of the column of source bus wiring 2 and the pseudo signal line 16a, and the interval between the pseudo signal lines 16a and 17a are made equal to the interval between the columns of source bus wiring 2. ing. Also, the distance between the outermost source bus wire 2b located on the opposite side of the source bus wire 1iJ2a and the pseudo signal line 16b, and the distance between the pseudo signal lines 16b and 17b are also adjusted to the source bus wire 1iJ2a.
is equal to the column spacing. In this embodiment, the pseudo signal lines 16a, 17a, 16b, and 17b are each independent and are not connected to other wiring.

In this embodiment as well, pseudo scanning lines parallel to the row of gate bus wires 1 at the same intervals as the row of gate bus wires 1 are provided outside the row of gate bus wires 1 and made of the same material as the gate bus wires 1. Similarly, pseudo signal lines are provided outside the row of source bus wires 2 and are made of the same material as the source bus wires 2 and are parallel to each other at the same intervals as the rows of source bus wires 2 . With this configuration, there is no difference in screen brightness between the area where the picture element electrodes 5 are arranged and the other areas.

As shown in FIG. 4, there is a disconnection 12 in the source path wiring 2c.
If this occurs, the defective source bus wiring 2C and the pseudo scanning lines 6a and 6b are connected by laser beam irradiation at their respective intersections 11a and 1lb, similar to the embodiment shown in FIG. The pseudo scanning lines 6a and 6b connected to the defective source bus wiring 2C are electrically connected to each other at the portions drawn out to the outside of the substrate. Thereby, both ends of the disconnected portion 12 of the defective source bus wiring 2C are electrically connected via the pseudo scanning lines 6a and 6b.

In this embodiment, pseudo signal lines 1 6 a, 1 7 a,
16b and 17b are each independent and are not connected to the wiring of the gate, so that the disconnection defect occurring in the gate bus wiring l cannot be corrected. Moreover, in the above, the pseudo scanning line 6a
and 6b, but the pseudo-scanning line 7
It can also be corrected using a and 7b. Furthermore, pseudo-scanning lines 6a and 6b, and pseudo-scanning lines 7a and 7b
By using this, it is possible to correct a disconnection defect occurring in two different lines of the gate bus wiring 1.

(Effects of the Invention) By using the matrix type display device of the present invention, a display screen with uniform brightness can be obtained between the area where the pixel electrodes are formed in a matrix and the peripheral area of that area, and the image quality can be improved. improves. Further, since a configuration can be provided in which a disconnection defect occurring in a scanning line or a signal line can be corrected, the yield of the display device can be improved and the cost of the display device can be reduced.

4゛no! ■ Figure 1 is a schematic plan view of an active matrix substrate used in one embodiment of the matrix type display device of the present invention;
The figure is a schematic diagram of the rectangular area surrounded by the Kate Hass wiring and source bus wiring in Figures 1, 4, and 5, and Figure 3 (
Figure 3 (a) is a cross-sectional view along the pseudo-scanning line at the intersection of the pseudo-scanning line and the source bus wiring, and Figure 3 (b) shows how the pseudo-scanning line and the source bus wiring are connected by laser beam irradiation. 4 is a schematic plan view of an active matrix substrate used in another embodiment of the present invention, and FIG. 5 is a schematic plan view of a conventional active matrix substrate.

1... Kate bus wiring, 2... Source bus wiring, 3
-T F T, 5...Picture element electrode, 6a, 6b,
7a, 7b... pseudo scanning line, 8... insulating film, 10...
・・Display screen, 11a,llb---intersection, 1 2-・
・Disconnection part, 16a. 16b, 17a, 17b---Pseudo signal line, 26, 27...Pseudo wiring.

that's all

Claims (1)

[Claims] 1. A pair of insulating substrates, pixel electrodes arranged in a matrix on the inner surface of one of the pair of substrates, and rows arranged in one direction at equal intervals between the pixel electrodes. A matrix display device comprising scanning lines and signal lines arranged vertically and horizontally, wherein at least one line is formed on both sides of the row of scanning lines at the same spacing as the row of scanning lines. a pseudo-scanning line and at least one pseudo-signal line formed on both sides of the column of signal lines at the same spacing as the column of signal lines, the pseudo-scanning line and the column of signal lines; intersect with each other through at least one layer of insulating film, and the pseudo signal line and the row of scanning lines intersect with each other through at least one layer of insulating film.