JPH0392891A - Controller of liquid crystal display device - Google Patents
Controller of liquid crystal display deviceInfo
- Publication number
- JPH0392891A JPH0392891A JP22991189A JP22991189A JPH0392891A JP H0392891 A JPH0392891 A JP H0392891A JP 22991189 A JP22991189 A JP 22991189A JP 22991189 A JP22991189 A JP 22991189A JP H0392891 A JPH0392891 A JP H0392891A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- liquid crystal
- alternating current
- input
- reset signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 34
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 8
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は液晶表示装置の制御回路に係り、機器のリセッ
ト信号が入力されている間、液晶に疑似的に交流化され
た信号を送り、液晶が破壊されるのを防ぐための制御回
路に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a control circuit for a liquid crystal display device, in which a pseudo alternating current signal is sent to the liquid crystal while a device reset signal is being input, and the liquid crystal is This relates to a control circuit to prevent it from being destroyed.
従来の技術
従来の液晶表示装置の制御回路について、第3図を参照
しながら説明する。2. Description of the Related Art A control circuit for a conventional liquid crystal display device will be described with reference to FIG.
第3図に釦いて、1は液晶表示装置の液晶に交流化信号
を与える本交流化信号発生回路であり、入力端子12に
入力されるリセット信号が偽の状態で入力端子11に同
期信号が入力されると、出力端子13より交流化された
信号を出力し、上記リセット信号が真の状態で上記同期
信号が入力されると本交流化信号発生回路1は初期化さ
れ、出力端子13から交流化されていない直流信号を出
力する構成になっている。Referring to FIG. 3, numeral 1 denotes an alternating current signal generating circuit which supplies an alternating current signal to the liquid crystal of a liquid crystal display device, and when the reset signal input to the input terminal 12 is false, the synchronizing signal is input to the input terminal 11. When input, an AC signal is output from the output terminal 13, and when the synchronization signal is input while the reset signal is true, the AC signal generation circuit 1 is initialized, and an AC signal is output from the output terminal 13. It is configured to output a DC signal that is not converted to AC.
発明が解決しようとする課題
しかしながら、このような従来の液晶表示装置の制御回
路では、第4図に示すように機器のリセットボタンに物
があたってボタンが押され続けた等の原因でリセット信
号が真の状態で入力され続けた場合には、交流化の信号
が発生せず、液晶が交流化されずに直流電圧が印加され
続け、液晶が破壊される恐れがあった。Problems to be Solved by the Invention However, in the control circuit of such a conventional liquid crystal display device, as shown in FIG. If the voltage continues to be input in the true state, the alternating current signal will not be generated, and the liquid crystal will not be converted to alternating current, but a direct current voltage will continue to be applied, and there is a risk that the liquid crystal will be destroyed.
本発明はかかる点に鑑みてなされたもので、リセノト信
号が真の状態で入力されている間、液晶に疑似的に交流
化の信号を送り、液晶が破壊されるのを防ぐ液晶表示装
置の制御回路を提供することを目的としている。The present invention has been made in view of this point, and is a liquid crystal display device that sends a pseudo alternating current signal to the liquid crystal while the real signal is being input, thereby preventing the liquid crystal from being destroyed. The purpose is to provide a control circuit.
課題を解決するための手段
上記目的を達戊するために本発明はリセット信号により
初期化され、同期信号の入力により第1の交流化信号を
発生する第1の交流化信号発生回路と、前記リセノ1−
信号により初期化されず、基準クロック信号の入力によ
り第2の交流化信号を発生する第2の交流化信号発生回
路とを具備し、前記第1の交流化信号と前記第2の交流
化信号と前記リセット信号との入力により前記リセット
信号が偽の状態では前記第1の交流化信号を出力し、前
記リセット信号が真の状態では前記第2の交流化信号を
出力する選択回路とを有する液晶表示装置の制御回路で
ある。Means for Solving the Problems In order to achieve the above object, the present invention provides a first alternating current signal generating circuit that is initialized by a reset signal and generates a first alternating current signal upon input of a synchronizing signal; Reseno 1-
a second alternating current signal generation circuit that is not initialized by the signal and generates a second alternating current signal upon input of the reference clock signal, the first alternating signal and the second alternating signal; and a selection circuit that outputs the first alternating current signal when the reset signal is false and outputs the second alternating current signal when the reset signal is true. This is a control circuit for a liquid crystal display device.
作用
本発明は上記した構戊により、リセット信号が真の状態
で入力されている間、液晶に疑似的に交流化の信号を送
り、液晶が破壊されるのを防ぐことができるものである
。Effect of the Invention With the above-described structure, the present invention can prevent the liquid crystal from being destroyed by sending a pseudo alternating current signal to the liquid crystal while the reset signal is being input in the true state.
実施例
第1図は本発明の一実施例に訃ける液晶表示装置の制御
回路を示すブロック図である。第1図にかいて1は本交
流化信号発生回路であって、外部からの同期信号を入力
する入力端子11と、リセット信号を入力する入力端子
12と、液晶用の交流化信号を発生する出力端子13と
を有する。2は疑似交流化信号発生回路であって、外部
からのクロック信号を入力する入力端子21と、液晶用
の疑似交流化信号を出力する出力端子22とを有する。Embodiment FIG. 1 is a block diagram showing a control circuit of a liquid crystal display device according to an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes the AC signal generation circuit, which has an input terminal 11 for inputting an external synchronization signal, an input terminal 12 for inputting a reset signal, and generates an AC signal for the liquid crystal. It has an output terminal 13. Reference numeral 2 denotes a pseudo alternating current signal generation circuit, which has an input terminal 21 for inputting an external clock signal, and an output terminal 22 for outputting a pseudo alternating current signal for the liquid crystal.
3は選択回路であって、前記リセット信号を入力する入
力端子31と、前記出力端子13と接続され、本交流化
信号を入力する入力端子32と、前記出力端子22と接
続され、疑似交流化信号を入力する入力端子33と、液
晶用の交流化信号を出力する出力端子34とを有する。Reference numeral 3 denotes a selection circuit, which is connected to the input terminal 31 for inputting the reset signal and the output terminal 13, is connected to the input terminal 32 for inputting the main AC conversion signal, and is connected to the output terminal 22, and is connected to the input terminal 32 for inputting the main AC conversion signal, and is connected to the output terminal 22 for pseudo AC conversion. It has an input terminal 33 for inputting a signal, and an output terminal 34 for outputting an AC signal for the liquid crystal.
以上のように構或された木実施例の制御回路について、
以下その動作を説明する。第2図は同実施例における制
御回路のタイミングチャートである。第2図にむいて入
力端子31のリセット信号が真の状態では、入力端子3
3に入力された疑似交流化信号が液晶用交流化信号とし
て出力端子34から液晶表示装置に出力され、液晶に直
流電圧が印加されるのを防ぐ。前記リセット信号が偽の
状態では、入力端子32に入力された本交流化信号が液
晶用交流化信号として出力端子34から液晶表示装置に
出力され、液晶に対しては本来の交流化が行われる。Regarding the control circuit of the tree embodiment constructed as described above,
The operation will be explained below. FIG. 2 is a timing chart of the control circuit in the same embodiment. As shown in FIG. 2, when the reset signal at the input terminal 31 is true, the input terminal 3
The pseudo alternating current signal input to 3 is outputted from the output terminal 34 to the liquid crystal display device as an alternating current signal for liquid crystal, thereby preventing a direct current voltage from being applied to the liquid crystal. When the reset signal is false, the main alternating current signal input to the input terminal 32 is outputted from the output terminal 34 to the liquid crystal display device as an alternating current signal for the liquid crystal, and the original alternating current is applied to the liquid crystal. .
発明の効果
以上のように、本発明によれば、リセット信号により初
期化される第1の交流化信号発生回路と、前記リセット
信号に関与しない第2の交流化信号発生回路と、第1の
交流化信号と第2の交流化信号とをリセット信号の入力
状態に応じて選択する選択回路と脊設けることにより、
機agのリセットボタンに物があたってボタンが押され
続けた等の原因でリセット信号が真の状態で入力され続
けた場合においても液晶に直流電圧が印加され続けるこ
とによる液晶の破壊を防ぐことができる。Effects of the Invention As described above, according to the present invention, the first alternating current signal generating circuit is initialized by a reset signal, the second alternating current signal generating circuit is not involved in the reset signal, and the first alternating current converting signal generating circuit is initialized by a reset signal. By providing a selection circuit and a backbone for selecting the alternating current signal and the second alternating current signal according to the input state of the reset signal,
To prevent destruction of a liquid crystal due to continued application of DC voltage to the liquid crystal even if a reset signal continues to be input in the true state due to a cause such as an object hitting the reset button of a machine AG and the button being pressed continuously. I can do it.
第1図は本発明の一実施例に卦ける液晶表示装置の制御
回路を示すブロック図、第2図は同実施例における制御
回路のタイミングチャート、第3図は従来の液晶表示装
置の制御回路を示すブロック図、第4図は従来の制御回
路のタイミングチャートである。
1・・・・・・本交流化信号発生回路、2・・・・・・
疑似交流化信号発生回路、3・・・・・・選択回路。FIG. 1 is a block diagram showing a control circuit of a liquid crystal display device according to an embodiment of the present invention, FIG. 2 is a timing chart of the control circuit in the same embodiment, and FIG. 3 is a control circuit of a conventional liquid crystal display device. FIG. 4 is a timing chart of a conventional control circuit. 1...This alternating current signal generation circuit, 2...
Pseudo AC signal generation circuit, 3...Selection circuit.
Claims (1)
第1の交流化信号を発生する第1の交流化信号発生回路
と、前記リセット信号により初期化されず、基準クロッ
ク信号の入力により第2の交流化信号を発生する第2の
交流化信号発生回路とを具備し、前記第1の交流化信号
と前記第2の交流化信号と前記リセット信号との入力に
より前記リセット信号が偽の状態では前記第1の交流化
信号を出力し、前記リセット信号が真の状態では前記第
2の交流化信号を出力する選択回路とを有することを特
徴とする液晶表示装置の制御回路。a first alternating current signal generation circuit that is initialized by a reset signal and generates a first alternating current signal upon input of a synchronization signal; a second alternating current converting signal generation circuit that generates an alternating current signal, and when the reset signal is false due to the input of the first alternating current signal, the second alternating current signal, and the reset signal, the 1. A control circuit for a liquid crystal display device, comprising a selection circuit that outputs a first alternating current signal and outputs the second alternating current signal when the reset signal is true.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22991189A JP2932521B2 (en) | 1989-09-05 | 1989-09-05 | Control circuit for liquid crystal display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22991189A JP2932521B2 (en) | 1989-09-05 | 1989-09-05 | Control circuit for liquid crystal display |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0392891A true JPH0392891A (en) | 1991-04-18 |
JP2932521B2 JP2932521B2 (en) | 1999-08-09 |
Family
ID=16899670
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22991189A Expired - Fee Related JP2932521B2 (en) | 1989-09-05 | 1989-09-05 | Control circuit for liquid crystal display |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2932521B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008017192A (en) * | 2006-07-06 | 2008-01-24 | Funai Electric Co Ltd | Remote controller |
JP2008017191A (en) * | 2006-07-06 | 2008-01-24 | Funai Electric Co Ltd | Multi-remote controller |
-
1989
- 1989-09-05 JP JP22991189A patent/JP2932521B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008017192A (en) * | 2006-07-06 | 2008-01-24 | Funai Electric Co Ltd | Remote controller |
JP2008017191A (en) * | 2006-07-06 | 2008-01-24 | Funai Electric Co Ltd | Multi-remote controller |
Also Published As
Publication number | Publication date |
---|---|
JP2932521B2 (en) | 1999-08-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |