JPH0392854U - - Google Patents
Info
- Publication number
- JPH0392854U JPH0392854U JP68290U JP68290U JPH0392854U JP H0392854 U JPH0392854 U JP H0392854U JP 68290 U JP68290 U JP 68290U JP 68290 U JP68290 U JP 68290U JP H0392854 U JPH0392854 U JP H0392854U
- Authority
- JP
- Japan
- Prior art keywords
- output power
- drive circuits
- subscriber line
- line interface
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims 2
- 230000000295 complement effect Effects 0.000 claims 1
- 230000001052 transient effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Devices For Supply Of Signal Current (AREA)
Description
第1図は本考案の第1の実施例を示す加入者線
インタフエース回路の回路図、第2図は従来の加
入者線インタフエース回路の回路図、第3図は第
2図の動作波形図、第4図は第1図の動作波形図
、第5図は本考案の第2の実施例を示す加入者線
インタフエース回路の回路図、第6図は第5図の
動作波形図である。
31……電話機、32,33……通信回線、4
0,40A……集積化部分、41,42……第1
、第2の出力パワートランジスタ、43,44…
…第1、第2の駆動回路、45,47……容量、
46……制御回路。
Fig. 1 is a circuit diagram of a subscriber line interface circuit showing a first embodiment of the present invention, Fig. 2 is a circuit diagram of a conventional subscriber line interface circuit, and Fig. 3 is the operating waveform of Fig. 2. 4 is an operating waveform diagram of FIG. 1, FIG. 5 is a circuit diagram of a subscriber line interface circuit showing a second embodiment of the present invention, and FIG. 6 is an operating waveform diagram of FIG. 5. be. 31... Telephone, 32, 33... Communication line, 4
0,40A...integrated part, 41,42...first
, second output power transistors, 43, 44...
...first and second drive circuits, 45, 47...capacity,
46...Control circuit.
Claims (1)
1、第2の出力パワートランジスタ及び該第1、
第2の出力パワートランジスタ駆動用の第1、第
2の駆動回路と、前記第1、第2の駆動回路を制
御する制御回路とを、備えた加入者線インタフエ
ース回路において、 少なくとも前記第1または第2の出力パワート
ランジスタの一方のベース・コレクタ間に過渡応
答遅延用の容量を接続し、その容量と前記第1、
第2の出力パワートランジスタ、第1、第2の駆
動回路及び制御回路とを、モノリシツク集積回路
で構成したことを特徴とする加入者線インタフエ
ース回路。[Claims for Utility Model Registration] First and second output power transistors constituting a pair of mutually complementary balanced output circuits;
A subscriber line interface circuit comprising first and second drive circuits for driving a second output power transistor, and a control circuit that controls the first and second drive circuits, wherein at least the first Alternatively, a capacitor for transient response delay is connected between the base and collector of one of the second output power transistors, and the capacitor and the first
A subscriber line interface circuit characterized in that a second output power transistor, first and second drive circuits, and a control circuit are constructed using a monolithic integrated circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP68290U JPH0392854U (en) | 1990-01-09 | 1990-01-09 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP68290U JPH0392854U (en) | 1990-01-09 | 1990-01-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0392854U true JPH0392854U (en) | 1991-09-20 |
Family
ID=31504619
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP68290U Pending JPH0392854U (en) | 1990-01-09 | 1990-01-09 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0392854U (en) |
-
1990
- 1990-01-09 JP JP68290U patent/JPH0392854U/ja active Pending