JPH0392047U - - Google Patents
Info
- Publication number
- JPH0392047U JPH0392047U JP1989151482U JP15148289U JPH0392047U JP H0392047 U JPH0392047 U JP H0392047U JP 1989151482 U JP1989151482 U JP 1989151482U JP 15148289 U JP15148289 U JP 15148289U JP H0392047 U JPH0392047 U JP H0392047U
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- electronic circuit
- element chip
- circuit board
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本考案の一実施例を示す図で、aは上
面図、bは断面図、第2図は従来例を示す図で、
aは上面図、bは断面図である。 1……ICチツプ、2……樹脂、4……配線、
5……回路基板、6……配線。
面図、bは断面図、第2図は従来例を示す図で、
aは上面図、bは断面図である。 1……ICチツプ、2……樹脂、4……配線、
5……回路基板、6……配線。
Claims (1)
- 回路基板上に電子回路素子チツプが電気的に接
続され、該電子回路素子チツプの一部または全体
が樹脂で覆われ、該樹脂表面に配線が形成され、
該配線が上記回路基板上の配線と接続されている
ことを特徴とする電子回路装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989151482U JPH0392047U (ja) | 1989-12-29 | 1989-12-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989151482U JPH0392047U (ja) | 1989-12-29 | 1989-12-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0392047U true JPH0392047U (ja) | 1991-09-19 |
Family
ID=31697780
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989151482U Pending JPH0392047U (ja) | 1989-12-29 | 1989-12-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0392047U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009094434A (ja) * | 2007-10-12 | 2009-04-30 | Elpida Memory Inc | 半導体装置およびその製造方法 |
-
1989
- 1989-12-29 JP JP1989151482U patent/JPH0392047U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009094434A (ja) * | 2007-10-12 | 2009-04-30 | Elpida Memory Inc | 半導体装置およびその製造方法 |