JPH0387055A - Thin film capacitor and manufacture thereof - Google Patents
Thin film capacitor and manufacture thereofInfo
- Publication number
- JPH0387055A JPH0387055A JP22603089A JP22603089A JPH0387055A JP H0387055 A JPH0387055 A JP H0387055A JP 22603089 A JP22603089 A JP 22603089A JP 22603089 A JP22603089 A JP 22603089A JP H0387055 A JPH0387055 A JP H0387055A
- Authority
- JP
- Japan
- Prior art keywords
- film
- lower electrode
- thin film
- ruthenium
- dielectric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 33
- 239000003990 capacitor Substances 0.000 title claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910052707 ruthenium Inorganic materials 0.000 claims abstract description 22
- 239000000463 material Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 8
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910001925 ruthenium oxide Inorganic materials 0.000 claims abstract description 7
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 10
- 239000010408 film Substances 0.000 abstract description 78
- 238000009413 insulation Methods 0.000 abstract description 9
- 238000010030 laminating Methods 0.000 abstract 1
- 229910002113 barium titanate Inorganic materials 0.000 description 20
- 239000010410 layer Substances 0.000 description 18
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 13
- 229910052710 silicon Inorganic materials 0.000 description 13
- 239000010703 silicon Substances 0.000 description 13
- 229910052814 silicon oxide Inorganic materials 0.000 description 13
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 5
- 230000003746 surface roughness Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910000510 noble metal Inorganic materials 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- -1 Arsenic ions Chemical class 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910020698 PbZrO3 Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910019895 RuSi Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910001120 nichrome Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical class [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000006104 solid solution Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は小型電子回路に用いる薄膜コンデンサに関する
。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to thin film capacitors used in small electronic circuits.
（従来の技術）
集積回路技術の発達によって電子回路がますます小型化
しており、各種電子回路に必須の回路素子であるコンデ
ンサの小型化も一段と重要になっている。誘電体薄膜を
用いた薄膜コンデンサが、トランジスタ等の能動素子と
同一の基板上に形成されて利用されているが、能動素子
の小型化が急速に進む中で薄膜コンデンサの小型化は遅
れてあり、より一層の高集積化を阻む大きな要因となっ
てきている。これは、従来用いられている誘電体薄膜材
料が５ｉ０２、Ｓｉ３Ｎ４等のような誘電率がたかだか
１０以下の材料に限られているためであり、薄膜コンデ
ンサを小型化する手段として誘電率の大きな誘電体薄膜
を開発することが必要となっている。化学式ＡＢＯ３で
表されるペロブスカイト型酸化物であるＢａＴｉＯ３，
５ｒＴｉ０３． ＰｂＺｒＯ３およびイルメナイト型酸
化物ＬｉＮＢＯ３あるいはＢ１４Ｔｉ、３０１２等の強
誘電体に属する酸化物は、上記の単一組成並びに相互の
固溶体組成で、単結晶あるいはセラミックにおいて１０
０以上１００００にも及ぶ誘電率を有することが知られ
ており、セラミック・コンデンサに広く用いられている
。これら材料の薄膜化は上述の薄膜コンデンサの小型化
に極めて有効であり、かなり以前から研究が行われてい
る。それらの中で比較的良好な特性が得られている例と
しては、プロシーディング・オブ・アイ・イー・イー・
イー（Ｐｒｏｃｅｅｄｔｎｇｓ ｏｆ ｔｈｅ ＩＥＥ
Ｅ）第５９巻１０号１４４０−１４４７頁に所載の論文
があり、スパッタリングによる成膜および熱処理を行っ
たＢａＴｉＯ３薄膜で１６（室温で作成）から１９００
（１２００°Ｃで熱処理）の誘電率が得られている。(Prior Art) With the development of integrated circuit technology, electronic circuits are becoming increasingly smaller, and the miniaturization of capacitors, which are essential circuit elements for various electronic circuits, is also becoming more important. Thin film capacitors using dielectric thin films are used by being formed on the same substrate as active elements such as transistors, but while the miniaturization of active elements is progressing rapidly, the miniaturization of thin film capacitors has lagged behind. , has become a major factor preventing even higher integration. This is because conventionally used dielectric thin film materials are limited to materials with a dielectric constant of at most 10 or less, such as 5i02 and Si3N4. There is a need to develop thin body membranes. BaTiO3, which is a perovskite oxide represented by the chemical formula ABO3,
5rTi03. Oxides belonging to ferroelectric materials such as PbZrO3 and ilmenite-type oxide LiNBO3 or B14Ti, 3012, have the above-mentioned single composition and mutual solid solution composition, and are 10% in single crystal or ceramic.
It is known to have a dielectric constant ranging from 0 to 10,000, and is widely used in ceramic capacitors. Making these materials thinner is extremely effective in reducing the size of the above-mentioned thin film capacitors, and research has been conducted for quite some time. Among them, an example with relatively good characteristics is the Proceedings of I.E.E.
Procedures of the IEE
E) There is an article published in Vol. 59, No. 10, pp. 1440-1447, which shows that BaTiO3 thin films formed by sputtering and heat treated can be used from 16 (created at room temperature) to 1900.
A dielectric constant of (heat treated at 1200°C) was obtained.
（発明が解決しようとする課題）
上記のような従来作成されているＢａＴｉＯ３等の誘電
体薄膜は、高い誘電率を得るためには薄膜作成時に高温
を必要とし、いずれも白金、パラジウム等の高融点貴金
属材料からなる下部電極の上に作成されたものである。(Problems to be Solved by the Invention) The conventionally produced dielectric thin films such as BaTiO3 as described above require high temperatures during the production of the thin film in order to obtain a high dielectric constant. It was created on a lower electrode made of a melting point noble metal material.
一般に電極材料として用いられるアルミニウムやニクロ
ム、銅などでは、高温での電極の蒸発や誘電体膜との相
互反応により誘電体膜の誘電率の著しい低下を招く。し
かし、上記のような高融点貴金属電極でも、３００００
以上での誘電体成膜において、再結晶による電極表面荒
れを生じる。このような電極上に形成された誘電体膜は
膜厚が一様でなく、電圧を印加したときに膜厚が薄い部
分に電界が強くかかるために絶縁特性に問題がある。Aluminum, nichrome, copper, etc., which are generally used as electrode materials, cause a significant decrease in the dielectric constant of the dielectric film due to evaporation of the electrode at high temperatures and interaction with the dielectric film. However, even with the high melting point noble metal electrode as mentioned above, the
In the above dielectric film formation, electrode surface roughness occurs due to recrystallization. The dielectric film formed on such an electrode is not uniform in film thickness, and when a voltage is applied, a strong electric field is applied to a thinner part of the film, resulting in problems with insulation properties.
現在の高集積回路に広く用いられている電極材料は多結
晶シリコンあるいはシリコン基板自体の一部に不純物を
高濃度にドーピングした低抵抗シリコン層である。以下
これらを総してシリコン電極と呼ぶ。シリコン電極は微
細加工技術が確立されており、すでに広く用いられてい
るため、シリコン電極上に良好な高誘電率薄膜が作製で
きれば、集積回路用コンデンサへの利用が可能となる。The electrode material widely used in current highly integrated circuits is polycrystalline silicon or a low-resistance silicon layer in which a portion of the silicon substrate itself is heavily doped with impurities. Hereinafter, these will be collectively referred to as silicon electrodes. Microfabrication technology for silicon electrodes has been established and is already widely used, so if a good high dielectric constant thin film can be produced on silicon electrodes, it will be possible to use them in capacitors for integrated circuits.
しかしながら、従来技術では例えばＩＢＭ・ジャーナル
・オブ・リサーチ・アンド・ディベロップメント（ＩＢ
Ｍ Ｊｏｕｒｎａｌ ｏｆ Ｒｅ５ｅａｒｃｈ ａｎｄ
Ｄｅｖｅｌｏｐｍｅｎｔ）１９６９年１１月号６８６
−６９５頁に所載の５ｒＴｉ０３膜に関する論文におい
て６８７−６８８頁の記載に、シリコン上に高誘電率材
料の薄膜を形成する場合には約１０ＯＡの二酸化シリコ
ン（Ｓｉ０２）に等価な層が界面に形成されてしまうと
報告されている。この界面層は誘電率が低い層であるた
め、結果としてシリコン上に形成した高誘電率薄膜の実
効的な誘電率は大きく低下してしまい、高誘電率材料を
用いる利点がほとんど損なわれていた。同様の報告の他
の例としてはジャーナル・オブ・バキューム・サイエン
ス・アンド。However, in the prior art, for example, the IBM Journal of Research and Development (IB
M Journal of Re5earch and
Development) November 1969 issue 686
- In the paper on 5rTi03 film published on page 695, it is stated on pages 687-688 that when forming a thin film of a high dielectric constant material on silicon, a layer equivalent to approximately 10 OA of silicon dioxide (Si02) is placed at the interface. It has been reported that the formation of Since this interfacial layer has a low dielectric constant, the effective dielectric constant of the high dielectric constant thin film formed on silicon is greatly reduced, almost eliminating the advantage of using high dielectric constant materials. . Other examples of similar reports include the Journal of Vacuum Science and.
テクノロジー（Ｊｏｕｒｎａｌ ｏｆ Ｖａｃｃｕｍ
５ｃｉｅｎｃｅ ａｎｄＴｅｃｈｎｏｌｏｇｙ）第１６
巻２号３１５−３１８頁に所載のＢａＴｉＯ３に関する
論文において、３１６頁の記載に見ることができる。Technology (Journal of Vaccum)
5science and Technology) No. 16
This can be seen in the description on page 316 of the paper on BaTiO3 published in Vol. 2, No. 315-318.
本発明はＢａＴｉＯ３，５ｒＴｉ０３に代表される高誘
電率材料の薄膜を用いて、高い容量密度と優れた絶縁特
性を有し、シリコン集積回路に適用可能な薄膜コンデン
サを実現することを目的としている。An object of the present invention is to use a thin film of a high dielectric constant material such as BaTiO3 and 5rTi03 to realize a thin film capacitor that has high capacitance density and excellent insulation properties and is applicable to silicon integrated circuits.
（課題を解決するための手段）
本発明は、基板上に形成され、下部電極、誘電体、上部
電極が順次積層された構造の薄膜コンデンサにおいて、
誘電体を直接成膜する下部電極がルテニウム、酸化ルテ
ニウム、ルテニウムシリサイドのうち１以上であること
を特徴とする薄膜コンデンサおよびその製造方法である
。(Means for Solving the Problems) The present invention provides a thin film capacitor formed on a substrate and having a structure in which a lower electrode, a dielectric, and an upper electrode are sequentially laminated.
A thin film capacitor and a method for manufacturing the same, characterized in that a lower electrode on which a dielectric is directly formed is made of one or more of ruthenium, ruthenium oxide, and ruthenium silicide.
（実施例１）
以下、本発明の実施例について図面を参照して説明する
。(Example 1) Hereinafter, examples of the present invention will be described with reference to the drawings.
第１図は実施例１の薄膜コンデンサの構造図で、シリコ
ン基板１の表面に絶縁層として酸化シリコン層２が形成
され、酸化シリコン層上に下部電極３が形成され、下部
電極上に誘電体のＢａＴｉＯ３膜４が形成され、その上
に上部電極のＡｌ膜５が形成されている。FIG. 1 is a structural diagram of the thin film capacitor of Example 1, in which a silicon oxide layer 2 is formed as an insulating layer on the surface of a silicon substrate 1, a lower electrode 3 is formed on the silicon oxide layer, and a dielectric layer is formed on the lower electrode. A BaTiO3 film 4 is formed, and an Al film 5 serving as an upper electrode is formed thereon.
まず、水蒸気熱酸化法により単結晶シリコンの表面に酸
化シリコン層を１１１ｍ形成した。雰囲気は酸素ガスと
水素ガスの流量比をそれぞれ１：１に制御し、温度は１
１００’Ｃで熱酸化を行った。下部電極膜は直流マグネ
トロンスパッタ法で０．５ｐｍの膜厚のものを作製した
。ＲｕまたはＲｕＳｉ２組戊の焼結体ターゲットを用い
、Ａｒガス雰囲気（またはＡｒと０２の混合ガス雰囲気
）、４Ｘ １Ｏ−３Ｔｏｒｒ、基板温度１００°Ｃで行
った。ＢａＴｉＯ３膜は化学量論組成の粉末ターゲット
を用い、高周波マグネトロンスパッタ法で０．５ｐｍの
膜厚のものを作製した。Ａｒ−０２混合ガス中、ｌＸｌ
０−２Ｔｏｒｒ、基板温度６００°Ｃでスパッタ成膜し
た。上部電極には０．５ｐｍのＡ１を直流スパッタ法に
より成膜した。本コンデンサの有効面積は３ Ｘ ５ｍ
ｍ２である。First, a 111-m thick silicon oxide layer was formed on the surface of single crystal silicon using a steam thermal oxidation method. The atmosphere was controlled at a flow rate ratio of 1:1 of oxygen gas and hydrogen gas, and a temperature of 1:1.
Thermal oxidation was performed at 100'C. The lower electrode film was fabricated with a thickness of 0.5 pm by direct current magnetron sputtering. Using a sintered target consisting of two sets of Ru or RuSi, the experiment was carried out in an Ar gas atmosphere (or a mixed gas atmosphere of Ar and O2), at 4X 1O-3 Torr, and at a substrate temperature of 100°C. A BaTiO3 film having a thickness of 0.5 pm was fabricated by high frequency magnetron sputtering using a powder target with a stoichiometric composition. lXl in Ar-02 mixed gas
The film was formed by sputtering at a temperature of 0-2 Torr and a substrate temperature of 600°C. A 0.5 pm film of A1 was formed on the upper electrode by direct current sputtering. The effective area of this capacitor is 3 x 5m
It is m2.
つぎに下部電極に高馳点貴金属であるＰｄ膜を用いた場
合と本方法の膜を用いた場合のＢａＴｉＯ３膜の特性の
違いについて述べる。第２図（ａ）は本方法の下部電極
膜を用いた場合のＢａＴｉＯ３膜の、第２図（ｂ）は膜
厚０．５ｐｍのＰｄ膜を用いた場合のＢａＴｉＯ３膜の
絶縁破壊強度のヒストグラムである。絶縁破壊強度はＩ
Ｘ １０−’Ａ／ｃｍ２の電流が流れたときの電界強
度と定義した。絶縁破壊強度は本方法の方が約３倍も大
きく、かつ、その分布にばらつきがなく、優れた絶縁特
性を示している。ＢａＴｉＯ３膜の一部をエツチングで
除去し、下部電極の表面粗さを触針式表面膜差計で測定
したところ、ルテニウムなどの膜とＰｄ膜の平均粗さｈ
は、それぞれ、５０Ａ、 ３８０Ａであり、ルテニウム
などの膜の方が表面平坦性に優れていることがわかった
。なお、ＢａＴｉＯ３を成膜する前の下部電極の表面粗
さはそれぞれ３０Ａ程度である。従って、両者の絶縁特
性の違いはＢａＴｉＯ３成膜の高温プロセスでの下部電
極の表面粗れに起因していると考えられる。この場合、
下部電極としてルテニウム、酸化ルテニウム、ルテニウ
ムシリサイド、またはこれらの積層構造においても効果
は同じであった。Next, we will discuss the difference in the characteristics of the BaTiO3 film when a Pd film, which is a high-point noble metal, is used for the lower electrode and when the film of this method is used. Fig. 2(a) is a histogram of the dielectric breakdown strength of a BaTiO3 film using the lower electrode film of this method, and Fig. 2(b) is a histogram of the dielectric breakdown strength of a BaTiO3 film using a Pd film with a thickness of 0.5 pm. It is. The dielectric breakdown strength is I
It was defined as the electric field strength when a current of X 10-'A/cm2 flows. The dielectric breakdown strength of this method is approximately three times greater, and there is no variation in its distribution, indicating excellent insulation properties. When a part of the BaTiO3 film was removed by etching and the surface roughness of the lower electrode was measured using a stylus type surface film difference meter, it was found that the average roughness of the ruthenium film and the Pd film h
were 50A and 380A, respectively, and it was found that the film made of ruthenium or the like had better surface flatness. Note that the surface roughness of the lower electrodes before the BaTiO3 film is formed is about 30A. Therefore, it is considered that the difference in insulation properties between the two is due to surface roughness of the lower electrode during the high temperature process of forming the BaTiO3 film. in this case,
The same effect was obtained when the lower electrode was made of ruthenium, ruthenium oxide, ruthenium silicide, or a stacked structure of these.
（実施例２）
第３図は実施例２の薄膜コンデンサの構造図で、単結晶
シリコン基板６の表面に絶縁層として酸化シリコン層マ
が形成され、酸化シリコン層上に下部電極として多結晶
シリコン膜８とその上にルテニウムなどの膜９が形成さ
れ、これら下部電極膜上に誘電体のＢａＴｉＯ３膜１０
が形成され、その上に上部電極のＡ１膜１１が形成され
ている。(Example 2) FIG. 3 is a structural diagram of a thin film capacitor according to Example 2, in which a silicon oxide layer is formed as an insulating layer on the surface of a single crystal silicon substrate 6, and a polycrystalline silicon layer is formed as a lower electrode on the silicon oxide layer. A film 8 and a film 9 made of ruthenium or the like are formed thereon, and a dielectric BaTiO3 film 10 is formed on these lower electrode films.
is formed, and the A1 film 11 of the upper electrode is formed thereon.
多結晶シリコン膜はプラズマＣＶＤ法により、３００°
Ｃで膜厚０．３１１ｍのものを作製した。この多結晶シ
リコン膜にヒ素イオンを７０ＫＶの加速電圧で２×１０
１６ｃｍ−２の量をイオン注入し、更に９００’Ｃで２
０分間熱処理することにより約１００Ωノロのシート抵
抗とした。その他の膜の成膜は実施例Ｉと同様に行った
。The polycrystalline silicon film is heated at 300° by plasma CVD method.
A film with a film thickness of 0.311 m was manufactured using C. Arsenic ions are applied to this polycrystalline silicon film at 2×10 ions at an accelerating voltage of 70 KV.
Ion implantation was carried out in an amount of 16 cm-2, and further 2
The sheet resistance was approximately 100Ω by heat treatment for 0 minutes. The other films were formed in the same manner as in Example I.
この場合、多結晶シリコン膜は絶縁層の酸化シリコンと
下部電極との密着性を良くするために用いているが、ル
テニウムなどの膜を多結晶シリコン膜の上に形成しても
、実施例１と同様に優れた絶縁特性を有する薄膜コンデ
ンサが得られた。なお、ルテニウム又は酸化ルテニウム
の場合は多結晶シリコンの代わりに、ルテニウムシリサ
イドなどのメタルシリサイドとルテニウムもしくは多結
晶シリコンなどを含む多層膜でもよい。In this case, the polycrystalline silicon film is used to improve the adhesion between the silicon oxide of the insulating layer and the lower electrode, but even if a film of ruthenium or the like is formed on the polycrystalline silicon film, Example 1 A thin film capacitor with similar excellent insulation properties was obtained. Note that in the case of ruthenium or ruthenium oxide, a multilayer film containing metal silicide such as ruthenium silicide and ruthenium or polycrystalline silicon may be used instead of polycrystalline silicon.
（実施例３）
第４図は実施例３の薄膜コンデンサの構造図である。単
結晶シリコン１２の表面の一部にリンを高濃度にドーピ
ングして低抵抗層１３が形成され、その上に層間絶縁膜
として酸化シリコン膜１４が形成されている。酸化シリ
コン膜の一部は、低抵抗層を通じて下部電極を引き出す
ためのコンタクトホールが２箇所形威されており、一方
のコンタクトホールは下部電極のルテニウムなどの膜１
５で埋められ、もう一方のコンタクトホールはＡＩ膜１
６で埋められている。従って、ＡＩ膜１６は下部電極の
端子となる。下部電極膜はコンタクトホールを埋めると
共にその一部が酸化シリコン膜上へ形成されていてもよ
い。下部電極膜上にはＢａＴｉＯ３膜１７が形成され、
その上には上部電極としてＡ１１８が形成されている。(Example 3) FIG. 4 is a structural diagram of a thin film capacitor of Example 3. A low resistance layer 13 is formed by doping a portion of the surface of the single crystal silicon 12 with phosphorus at a high concentration, and a silicon oxide film 14 is formed thereon as an interlayer insulating film. Two contact holes are formed in a part of the silicon oxide film to draw out the lower electrode through the low-resistance layer.
5, and the other contact hole is filled with AI film 1.
Filled with 6. Therefore, the AI film 16 becomes a terminal of the lower electrode. The lower electrode film fills the contact hole and a portion thereof may be formed on the silicon oxide film. A BaTiO3 film 17 is formed on the lower electrode film,
A118 is formed thereon as an upper electrode.
本実施例では下部電極を単結晶シリコンの低抵抗層を通
じて引き出すために、下部電極膜を単結晶シリコンの上
に作製しているが、その薄膜コンデンサの絶縁特性は実
施例１と同様に優れていることを確認した。In this example, the lower electrode film is fabricated on single crystal silicon in order to draw out the lower electrode through the low resistance layer of single crystal silicon, but the insulation properties of the thin film capacitor are as excellent as in Example 1. I confirmed that there is.
次に下部電極に多結晶シリコン膜を用いた場合と本発明
の膜を用いた場合のＢａＴｉＯ３膜の誘電率の違いにつ
いて述べる。多結晶シリコン膜は現在のシリコンＬＳＩ
の電極膜として一般に用いられている材料である。第５
図はＢａＴｉＯ３膜の誘電率と膜厚の関係を調べたもの
で、本発明の膜を用いた場合と多結晶シリコン膜を用い
た場合の結果である。本発明の膜を用いた場合、ＢａＴ
ｉＯ３膜の誘電率はその膜厚に依存せず、約２４０で一
定であるのに対して、多結晶シリコン膜を用いた場合の
ＢａＴｉＯ３膜の誘電率は膜厚に依存し、膜厚が薄くな
るにつれて誘電率が小さくなっている。これは従来技術
で述べたように、低誘電率の酸化シリコン膜がＢａＴｉ
Ｏ３と多結晶シリコンとの界面に形成され、ＢａＴｉＯ
３膜の見かけの誘電率が低下したものと考えられる。Next, the difference in dielectric constant of the BaTiO3 film when a polycrystalline silicon film is used for the lower electrode and when the film of the present invention is used will be described. Polycrystalline silicon film is used in current silicon LSI
This is a material commonly used as an electrode film. Fifth
The figure shows the relationship between the dielectric constant and film thickness of a BaTiO3 film, and shows the results when the film of the present invention was used and when a polycrystalline silicon film was used. When using the film of the present invention, BaT
The dielectric constant of an iO3 film does not depend on its thickness and is constant at about 240, whereas the dielectric constant of a BaTiO3 film when using a polycrystalline silicon film depends on its thickness, and when the film is thin, As the temperature increases, the dielectric constant decreases. As mentioned in the prior art, this is because the low dielectric constant silicon oxide film is made of BaTi.
Formed at the interface between O3 and polycrystalline silicon, BaTiO
This is thought to be due to the decrease in the apparent dielectric constant of the three films.
また、実施例２と同様に、下部電極はルテニウムなどの
膜とその下に多結晶シリコンがある二重構造でもよい。Further, as in the second embodiment, the lower electrode may have a double structure including a film of ruthenium or the like and polycrystalline silicon underneath.
この場合の多結晶シリコン膜はルテニウムなどの膜と単
結晶シリコン、及び、酸化シリコンとの密着性をよくす
る効果がある。更に、多結晶シリコン膜でコンタクトホ
ールを埋める平坦化技術は確立しており、下部電極の一
部として用いる利点は大きい。In this case, the polycrystalline silicon film has the effect of improving the adhesion between the ruthenium film and the single crystal silicon and silicon oxide. Furthermore, a planarization technique for filling contact holes with a polycrystalline silicon film has been established, and there are great advantages to using it as part of the lower electrode.
本実施例に示すように下部電極にルテニウム、酸化ルテ
ニウム、ルテニウムシリサイドの１以上からなる膜を用
いることにより、誘電体膜の膜厚に依存せず一定の高い
誘電率を有する薄膜コンデンサをシリコン上に作製する
ことができる。As shown in this example, by using a film made of one or more of ruthenium, ruthenium oxide, and ruthenium silicide for the lower electrode, a thin film capacitor having a constant high dielectric constant independent of the thickness of the dielectric film can be fabricated on silicon. It can be made into
（発明の効果）
本発明は以上説明したように、薄膜コンデンサの下部電
極に高温プロセスで表面荒れを起こさないルテニウムな
どの膜を用いることにより、絶縁特性に優れた高誘電率
の薄膜コンデンサを提供することができる。また、従来
のシリコン電極のように誘電体との界面に低誘電率の酸
化シリコン層を形成することがないので、誘電体膜の膜
厚に依存せず一定の高い誘電率を有する薄膜コンデンサ
をシリコン上に作製することができる。(Effects of the Invention) As explained above, the present invention provides a thin film capacitor with a high dielectric constant and excellent insulation properties by using a film made of ruthenium or the like that does not cause surface roughness during high temperature processes for the lower electrode of the thin film capacitor. can do. In addition, unlike conventional silicon electrodes, there is no need to form a silicon oxide layer with a low dielectric constant at the interface with the dielectric, so thin film capacitors with a constant high dielectric constant regardless of the thickness of the dielectric film can be created. Can be fabricated on silicon.
第１図は本発明における実施例を示す薄膜コンデンサの
断側面図、第２図（ａ）、（ｂ）は絶縁破壊強度のヒス
トグラム図、第３図、第４図は実施例を示す薄膜コンデ
ンサの断側面図、第５図はＢａＴｉＯ３膜の誘電率と膜
厚の関係を示す図。
１、６．１２は単結晶シリコン基板、２．７．１４は酸
化シリコン、３．９．１５は下部電極、４．１０．１７
はＢａＴｉＯ３，５゜１１．１６．１８はＡｔ ８は多
結晶シリコン、１３は単結晶シリコンの低抵抗層。Fig. 1 is a cross-sectional side view of a thin film capacitor showing an embodiment of the present invention, Figs. 2(a) and (b) are histograms of dielectric breakdown strength, and Figs. 3 and 4 are thin film capacitors showing an embodiment. FIG. 5 is a diagram showing the relationship between the dielectric constant and the film thickness of the BaTiO3 film. 1, 6.12 are single crystal silicon substrates, 2.7.14 are silicon oxides, 3.9.15 are lower electrodes, 4.10.17
is BaTiO3, 5°11.16.18 is At, 8 is polycrystalline silicon, and 13 is a low resistance layer of single crystal silicon.
Claims (2)
極が順次積層された構造の薄膜コンデンサにおいて、誘
電体を直接成膜する下部電極がルテニウム、酸化ルテニ
ウム、およびルテニウムシリサイドから選ばれた１以上
の材料からなることを特徴とする薄膜コンデンサ。(1) In a thin film capacitor that is formed on a substrate and has a structure in which a lower electrode, a dielectric, and an upper electrode are laminated in sequence, the lower electrode on which the dielectric is directly deposited is selected from ruthenium, ruthenium oxide, and ruthenium silicide. A thin film capacitor characterized by being made of one or more materials.
ウムシリサイドから選ばれた１以上の材料からなる下部
電極を形成する工程と、該下部電極上に誘電体を形成し
、この上に上部電極を形成する工程とを備えたことを特
徴とする薄膜コンデンサの製造方法。(2) Forming a lower electrode made of one or more materials selected from ruthenium, ruthenium oxide, and ruthenium silicide on the substrate, forming a dielectric on the lower electrode, and forming an upper electrode on this. A method for manufacturing a thin film capacitor, comprising the steps of:
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1226030A JPH0687490B2 (en) | 1989-08-30 | 1989-08-30 | Thin film capacitor and manufacturing method thereof |
| EP90309477A EP0415750B1 (en) | 1989-08-30 | 1990-08-30 | Thin-film capacitors and process for manufacturing the same |
| DE69014027T DE69014027T2 (en) | 1989-08-30 | 1990-08-30 | Thin film capacitors and their manufacturing processes. |
| US07/575,368 US5122923A (en) | 1989-08-30 | 1990-08-30 | Thin-film capacitors and process for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1226030A JPH0687490B2 (en) | 1989-08-30 | 1989-08-30 | Thin film capacitor and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0387055A true JPH0387055A (en) | 1991-04-11 |
| JPH0687490B2 JPH0687490B2 (en) | 1994-11-02 |
Family
ID=16838678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1226030A Expired - Lifetime JPH0687490B2 (en) | 1989-08-30 | 1989-08-30 | Thin film capacitor and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0687490B2 (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04360506A (en) * | 1991-06-07 | 1992-12-14 | Nec Corp | Thin film capacitor |
| US6015989A (en) * | 1996-06-28 | 2000-01-18 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen |
| US6091099A (en) * | 1996-11-14 | 2000-07-18 | Kabushiki Kaisha Toshiba | Semiconductor device with tantalum and ruthenium |
| US6187622B1 (en) | 1997-01-14 | 2001-02-13 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device and method for producing the same |
| US6239460B1 (en) | 1995-06-30 | 2001-05-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device which includes a capacitor having a lower electrode formed of iridium or ruthenium |
| JP2007042989A (en) * | 2005-08-05 | 2007-02-15 | Ibiden Co Ltd | Thin film embedded capacitance and its manufacturing method, and printed wiring board |
| US7560815B1 (en) * | 1998-08-27 | 2009-07-14 | Micron Technology, Inc. | Device structures including ruthenium silicide diffusion barrier layers |
| US7817043B2 (en) | 2004-11-30 | 2010-10-19 | Canon Kabushiki Kaisha | Radio frequency tag |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62222616A (en) * | 1986-03-25 | 1987-09-30 | 宇部興産株式会社 | Heat-resistant electrode thin film |
| JPH01175294A (en) * | 1987-12-28 | 1989-07-11 | Matsushita Electric Ind Co Ltd | Circuit board |
-
1989
- 1989-08-30 JP JP1226030A patent/JPH0687490B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62222616A (en) * | 1986-03-25 | 1987-09-30 | 宇部興産株式会社 | Heat-resistant electrode thin film |
| JPH01175294A (en) * | 1987-12-28 | 1989-07-11 | Matsushita Electric Ind Co Ltd | Circuit board |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04360506A (en) * | 1991-06-07 | 1992-12-14 | Nec Corp | Thin film capacitor |
| US6239460B1 (en) | 1995-06-30 | 2001-05-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device which includes a capacitor having a lower electrode formed of iridium or ruthenium |
| US6420191B2 (en) | 1995-06-30 | 2002-07-16 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing semiconductor device which includes a capacitor having a lower electrode formed of iridium or ruthenium |
| US6015989A (en) * | 1996-06-28 | 2000-01-18 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen |
| US6091099A (en) * | 1996-11-14 | 2000-07-18 | Kabushiki Kaisha Toshiba | Semiconductor device with tantalum and ruthenium |
| US6326316B1 (en) | 1996-11-14 | 2001-12-04 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor devices |
| US6187622B1 (en) | 1997-01-14 | 2001-02-13 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device and method for producing the same |
| US7560815B1 (en) * | 1998-08-27 | 2009-07-14 | Micron Technology, Inc. | Device structures including ruthenium silicide diffusion barrier layers |
| JP4719358B2 (en) * | 1998-08-27 | 2011-07-06 | マイクロン テクノロジー， インク． | Capacitor manufacturing method |
| US7817043B2 (en) | 2004-11-30 | 2010-10-19 | Canon Kabushiki Kaisha | Radio frequency tag |
| JP2007042989A (en) * | 2005-08-05 | 2007-02-15 | Ibiden Co Ltd | Thin film embedded capacitance and its manufacturing method, and printed wiring board |
| JP4708905B2 (en) * | 2005-08-05 | 2011-06-22 | イビデン株式会社 | Thin film embedded capacitance, manufacturing method thereof, and printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0687490B2 (en) | 1994-11-02 |
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