JPH038110B2 - - Google Patents
Info
- Publication number
- JPH038110B2 JPH038110B2 JP60155261A JP15526185A JPH038110B2 JP H038110 B2 JPH038110 B2 JP H038110B2 JP 60155261 A JP60155261 A JP 60155261A JP 15526185 A JP15526185 A JP 15526185A JP H038110 B2 JPH038110 B2 JP H038110B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- card
- circuit chips
- circuit chip
- wiring module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15526185A JPS6216535A (ja) | 1985-07-16 | 1985-07-16 | 電子装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15526185A JPS6216535A (ja) | 1985-07-16 | 1985-07-16 | 電子装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6216535A JPS6216535A (ja) | 1987-01-24 |
| JPH038110B2 true JPH038110B2 (cs) | 1991-02-05 |
Family
ID=15602047
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15526185A Granted JPS6216535A (ja) | 1985-07-16 | 1985-07-16 | 電子装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6216535A (cs) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0715969B2 (ja) * | 1991-09-30 | 1995-02-22 | インターナショナル・ビジネス・マシーンズ・コーポレイション | マルチチツプ集積回路パツケージ及びそのシステム |
| US5362986A (en) * | 1993-08-19 | 1994-11-08 | International Business Machines Corporation | Vertical chip mount memory package with packaging substrate and memory chip pairs |
| US5502667A (en) * | 1993-09-13 | 1996-03-26 | International Business Machines Corporation | Integrated multichip memory module structure |
| US5561622A (en) * | 1993-09-13 | 1996-10-01 | International Business Machines Corporation | Integrated memory cube structure |
| US6573460B2 (en) | 2001-09-20 | 2003-06-03 | Dpac Technologies Corp | Post in ring interconnect using for 3-D stacking |
| US6573461B2 (en) | 2001-09-20 | 2003-06-03 | Dpac Technologies Corp | Retaining ring interconnect used for 3-D stacking |
| US6856010B2 (en) | 2002-12-05 | 2005-02-15 | Staktek Group L.P. | Thin scale outline package |
| US8703543B2 (en) | 2009-07-14 | 2014-04-22 | Honeywell International Inc. | Vertical sensor assembly method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5625256Y2 (cs) * | 1977-07-20 | 1981-06-15 | ||
| JPS5684385U (cs) * | 1979-11-30 | 1981-07-07 |
-
1985
- 1985-07-16 JP JP15526185A patent/JPS6216535A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6216535A (ja) | 1987-01-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |