JPH038005A - Timer control system - Google Patents

Abstract

PURPOSE:To enable timer control, which can exactly monitor time, by providing a timer circuit and a comparator register and guaranteeing the period width of a count pulse from one of set time for the respective circuit and register to time to detect a prescribed condition. CONSTITUTION:In such a timer system, a timer circuit 1 is provided, an initial value is directly set to this timer circuit, counting operation is executed and it is detected that a prescribed value is obtained. Otherwise, the circuit 1 and a comparator register 2 to set a comparing value to this circuit 1 are provided, the count value of the circuit 1 is compared with that of the register 2 and it is detected that the values are coincident. Then, the period width of a count pulse 2' from the circuit 1 is guaranteed at least from the time to set this initial value to the circuit 1 or from the time to set the comparing value to the register 2 to the time to detect the prescribed condition. Thus, the time monitoring operation of set time width can be executed without depending on the state of the timer circuit.

Description

[Detailed Description of the Invention] [Summary] Regarding a timer control method in a computer system equipped with a time display mechanism, an object of the present invention is to perform a time monitoring operation of a set time width without depending on the state of a timer circuit. Either directly set an initial value to the timer circuit, cause it to perform a counting operation, and detect when it reaches a predetermined value, or
The timer control method includes a comparison register for setting a comparison value for the timer circuit, and compares the count value of the timer circuit with the comparison register and detects that they match, From the time set in the circuit,
Or, from the time when the above comparison value is set in the comparison register,
The configuration is such that at least the width of the cycle of the counting pulse (2) of the timer circuit is guaranteed for the time up to the detection of the above condition.

[Industrial application field]

The present invention relates to a timer control method in a computer system equipped with a time display mechanism.

Conventionally, time display mechanisms, that is, time monitoring using a timer, have been used to monitor, for example, the timing of task switching in multiprogramming, the timing for billing, or
It is used as a timing to detect program runaway.

However, as program configurations have recently become more precise and complex, there has been a demand for time monitoring that is as accurate as possible.

[Prior art and problems to be solved by the invention] Fig. 3 is a diagram explaining a conventional timer control system, in which (a) shows the case where an initial value is set in the timer circuit, and (b) shows a comparison. This shows a case where a comparison value is set in a register.

First, in the case shown in Figure (a), a reference pulse with a period of, for example, 1 μs, which is a unit time when the timer circuit 1 performs a counting operation, is counted, and a counting pulse of, for example, 1 ms is generated. , the counting pulses (2) are counted by a timer circuit 1.

In this method, when an initial value is set for the timer circuit 1 by software, an overflow is detected after a predetermined time. ), if the initial value set by the software is, for example, 1 μs before the count pulse is output from the reference timer 3, the problem is that the predetermined value, that is, an overflow, will be output after 1 μS. was there.

In addition, in the case of figure (b), when a comparison value is set in comparison register 2 from software, the value of comparison register 2 and the value of timer circuit 1 are compared in comparator (c), and a match is found. Obtaining the output provides time monitoring required by the software.

However, in this conventional method, if the time set in the comparison register 2 coincides with the time of the timer circuit 1, there is a problem that coincidence detection is performed at the same time as the setting by the software.

Even if they do not match, if a value less than one count value is set, and the comparison time is set from the software to a time 1 μs before the count value of the reference timer outputs the count pulse. However, there was a problem in that a matching output was obtained after 1 μs.

Therefore, with such a conventional method, there is a problem that accurate time monitoring as expected by the software cannot be performed.

In view of the above-mentioned conventional drawbacks, the present invention provides a timer control that allows a time monitoring operation of a set time width to be performed without depending on the state of the timer circuit in a four-stage calculation system equipped with an 8g time display. The purpose of this is to provide a method.

[Means to solve the problem]

FIG. 1 is a diagram showing the principle of the present invention, in which (a) shows a case where an initial value is set in a timer circuit, and (b) shows a case where a comparison value is set in a comparison register.

The above problem can be solved by a timer control method configured as follows.

(1) In a computer system equipped with a time display mechanism, a timer circuit 1 is provided, and the first #JJ (III) is directly set for the timer circuit 1 to perform counting operation to reach a predetermined value. or a timer circuit 1;
a comparison register 2 for setting a comparison value for the timer circuit 1; the timer control method compares the count value of the timer circuit 1 with the comparison register 2 and detects that they match; From the time when the initial value is set in the timer circuit 1 or from the time when the above comparison value is set in the comparison register 2 until the detection of the above condition, at least the period of the counting pulse (■) of the above-mentioned timer circuit. It is configured to ensure the width of

(2) The above-mentioned timer control method, wherein the above-mentioned timer circuit 1
Reference pulse of unit time period when performing counting operation in ■
A reference timer 3 that generates , a unit timer 4 that counts the reference pulses outputted from the reference timer 3, and the above-mentioned timer circuit 1 that counts the unit pulses outputted from the unit timer 4 are provided. , while setting a specific initial value to the timer circuit 1 from software,
The unit timer 4 is reset, and the timer circuit 1 is reset.
The configuration is configured to detect a specific value, for example, an overflow, from the .

(3) In the above-mentioned timer control method, the above-mentioned timer circuit 1
Reference pulse of unit time period when performing counting operation in ■
A reference timer 3 that generates , a unit timer 4 that counts the reference pulses outputted from the reference timer 3, the timer circuit 1 that counts the unit pulses outputted from the unit timer 4, and software. The above-mentioned comparison register 2 sets a specific comparison value, and the unit register 5 stores the value of the unit timer 4 at the timing when the comparison value is set in the comparison register 2 by the software. The configuration is such that a match between the timer circuit 1 and the comparison register 2 is detected after the time when the values of the unit timer 4 match.

[Effect]

That is, according to the present invention, when setting an initial value to the timer circuit shown in FIG. 1(a) in a computer system equipped with a time display mechanism, the timer circuit shown in FIG. At the same time that the initial value is set in the timer circuit, the unit timer that sends counting pulses to the timer circuit is reset, so no counting operation is performed in the timer circuit until a carry occurs from the unit timer. Therefore, it is possible to ensure that the width of the period of the counting pulse (2) in the timer circuit is within the counting range of the unit timer.

Furthermore, when a comparison value is set in the comparison register shown in FIG. 1(b) and time monitoring is performed by detecting a match between the value of the comparison register and the timer circuit, at the time of timer write operation from software, At the timing when the comparison value is set in the comparison register visible to the software, the value of the unit timer is set in the unit register, and after the value of the unit register and the value of the unit timer match, the timer circuit and the comparison register are connected. Since the operation is performed such that coincidence detection is performed, it is possible to at least guarantee that the range of re-counting by the unit timer, that is, the period width of the counting pulse (2) in the timer circuit is guaranteed.

Because it operates in this way, it has the effect of allowing accurate time monitoring by simply adding a few logic circuits to a normal timer circuit.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

The above-mentioned FIG. 1 is a diagram showing the principle configuration of the present invention, and FIG. 2 is a diagram showing an embodiment of the present invention. b) shows a case where a comparison value is set in the comparison register, and reference timer 3
and timer circuit 1. Alternatively, in addition to the reference timer 3, timer circuit 1, and comparison register 2, there is also a unit timer 4. which counts the reference pulses from the reference timer 3 and sends the counting pulses to the timer circuit 1. and means for resetting the unit timer 4 at the timing of setting the initial value in the timer circuit 1, and means for resetting the unit timer 4 at the timing of setting the comparison value in the comparison register 2.
The means for carrying out the present invention is a means for performing a comparison between the comparison register 2 and the timer circuit 1 after the value of the unit register 5 and the value of the unit timer 4 match. The same reference numerals indicate the same objects throughout the figures.

Hereinafter, the timer control system of the present invention will be explained with reference to FIG. 2 while referring to FIG.

First, the embodiment shown in Figure (a) sets an initial value in a timer circuit 1 visible to the program, and detects when the timer circuit 1 outputs a predetermined value, for example, overflow.

In the present invention, the reference pulse (for example, 1 μs cycle) output from the reference timer 3 is counted, and the counting pulse (for example, Ims) is used for counting the counting operation in the timer circuit l.
A unit timer 4 is provided which outputs a period).

Here, as in the past, the initial value is set in the timer circuit 1 based on the write signal (1-WE) when setting the initial value in the timer circuit 1 visible from the software (program), and at the same time, the unit Reset timer 4.

Due to this operation, the timer circuit 1 does not perform a counting operation unless a carry occurs from the unit timer 4, so it is possible to guarantee the counting period of the unit timer 4, for example, the above-mentioned time width of 1 ms. .

Therefore, immediately after the program sets the initial value in the timer circuit 1, the counting pulse ■ is output from the unit timer 4, and the timer circuit I counts the counting pulse ■ from the unit timer 4 to perform regular time monitoring. Even if unit timer 4 is counting up in such a state that the counting pulse power for
Since the value of the unit timer 4 is reset when the initial value is set to , it is understood that at least the period of counting of the unit timer 4 can be guaranteed, that is, the above-mentioned malfunction can be guaranteed.

Next, the embodiment shown in FIG. 2B compares the timer comparison value from the program with the timer value of the timer circuit 1 to detect a match.

In the present invention, as shown in the figure, the reference pulse output from the reference timer 3 (for example, 1 μs period)
The unit timer 4 counts and outputs a counting pulse (for example, 1 ms cycle) for performing a counting operation in the timer circuit 1, and the unit timer 4 A unit register 5 is provided to set the value of .

This embodiment operates as follows.

When setting the timer comparison value in comparison register 2 from the program, the value of timer circuit 1 is °0010 (161,
Assume that the value of the unit timer is 02FF (161') and the comparison setting data is "0011°0".

Comparison value write signal (COMPWE) from the program
) is enabled and the above comparison setting data °0011 (+61") is set in the comparison register 2, in the present invention, the current unit timer value '02FF' is set by the write signal (COMP-WE). +1
&) is set in unit register 5, and itself is 030.
0 (161'). Therefore, the comparator (C) 6 does not output a match signal (EQ2).

In this state, the counting pulse ■ is output from the unit timer 4, and the comparator (C) 7 operates, and the I value of the timer circuit 1 circuit 1 becomes "0011 (+61)", and the coincidence signal (E old) is activated.
becomes valid, but since the above coincidence signal (EQ2) is not output, the output of AND circuit (AND) 8 (8 ports 3
) is not valid.

In the conventional method, only the comparison operation between timer circuit 1 and comparison register 2 is performed, so as mentioned above, the value of timer circuit 1 changes from '0010 (+6)' to '0011 N'.
In some cases, the coincidence detection between 6) and 6) is carried out at the minimum time of 3tl'I (1 μs) of the reference pulse ①.

(When the count in the unit timer 4 is 1 μs before carry-up) In the case of the present invention, as described above, even if a match is detected between the timer circuit I and the comparison register 2 (EQI ° 1°)
, if the output signal in which the values of unit timer 4 and unit register 5 match (EQ2='l') is held and the AND circuit (AND) 8 is not gated, the matching output (8 bits) of the timer circuit 1 will be output. 3) cannot be obtained.

That is, in the present invention, the unit timer 4
00 (1-1″ to next “02FF +16)”
Since the AND circuit (AND) 8 is activated at least after a time of 999 μs, the width of the counting period in the unit timer 4 can be guaranteed.

Therefore, immediately after the program reads the timer value of the timer circuit 1 and sets the value obtained by adding the monitoring time to that value in the comparison register 2, the unit timer 4 outputs the counting pulse ■, and the timer circuit 1 outputs the counting pulse Even if the count pulse for regular time monitoring becomes one pulse less, the coincidence detection in the AND circuit (AND) 8 is performed at least as long as the value of the unit timer 4 is ,
Since this is after the time when the above program reaches the same value as when the comparison value is set in the comparison register 2, it is possible to guarantee at least the counting period of the unit timer 4, that is, the above-mentioned entertainment operation. I understand.

In this method, the accuracy of time monitoring can be further improved by shortening the period of the reference pulse ■ counted by the reference timer 3 and increasing the number of digits (number of bits) of the unit timer 4. I can do it.

As described above, the present invention provides a computer system equipped with a time display mechanism in which, in addition to a reference timer and a timer circuit, or a reference timer and a timer circuit and a comparison register, the reference pulses from the reference timer are counted. A unit timer that sends a counting pulse ■ and a unit register are provided in the timer circuit, and the unit timer is reset at the timing when the initial value is set in the timer circuit, or when the comparison value is set in the comparison register. , the value of the unit timer is set in the unit register, and after the value of the unit register ((direct) and 4M of the unit timer match, the comparison register and the timer circuit are compared, and the count pulse of the timer circuit is The feature is that the time width of the cycle is guaranteed so that correct counting can be performed in the timer circuit regardless of the state of the timer circuit.

〔Effect of the invention〕

As explained above in detail, the timer control method of the present invention is a computer system equipped with a time display mechanism, which is equipped with a timer circuit, and directly sets an initial value to the timer circuit to perform a counting operation. or detect that a predetermined value has been reached, or provide a timer circuit and a comparison register for setting a comparison value for the timer circuit, and compare the counted value of the timer circuit and the comparison register. This is a timer control method that compares and detects a match, from the time when the above initial value is set in the timer circuit, or from the time when the above comparison value is set in the comparison register, until the time when the above condition is detected. On the other hand, since it is configured to ensure at least the width of the period of the counting pulse (■) of the timer circuit, accurate time monitoring can be performed simply by adding a few logic circuits to a normal timer circuit. It has the effect of

[Brief explanation of drawings]

Figure 1 is a diagram of the principle configuration of the present invention. FIG. 2 is a diagram showing an embodiment of the present invention. FIG. 3 is a diagram illustrating a conventional timer control method. In the drawing, 1 is a timer circuit, 2 is a comparison register. 3 is an oscillator or reference timer. 4 is Uni-I timer 5 is a unit register, 6 and 7 are comparators (C). 8 is a logical product circuit (AND). ■C reference pulse, ■ is counting C/L/S. are shown respectively. No. figure Principle configuration diagram of the present invention Figure 1 Accessed programmatically Accessed programmatically Concave explaining the conventional timer control method Box 3

Claims (3)

[Claims] (1) In a computer system equipped with a time display mechanism, a timer circuit (1) is provided, and an initial value is directly set for the timer circuit (1) to cause it to perform a counting operation until a predetermined value is reached. or a timer circuit (1) and a comparison register (2) for setting a comparison value for the timer circuit (2); This is a timer control method that detects a match by comparing the above initial value with the comparison register (2). A timer control method, characterized in that at least the period width of the counting pulse ([2]) of the timer circuit (2) is guaranteed from a set time until the detection of the above condition. (2) The above-mentioned timer control method, which comprises the above-mentioned timer circuit (
A reference timer (3) that generates a reference pulse ([1]) of a unit time period when performing counting operation in step 1), and a reference pulse ([1]) output from the reference timer (3). The unit timer (4) for counting and the unit timer (4)
) and the above-mentioned timer circuit (1) that counts the unit pulse ([2]) output from
2. The timer control method according to claim 1, wherein the unit timer (4) is reset and a predetermined value from the timer circuit (1) is detected. (3) The above-mentioned timer control method, which comprises the above-mentioned timer circuit (
A reference timer (3) that generates a reference pulse ([1]) of a unit time period when performing counting operation in step 1), and a reference pulse ([1]) output from the reference timer (3). The unit timer (4) for counting and the unit timer (4)
) The above-mentioned timer circuit (1) counts unit pulses ([2]) output from the above-mentioned comparison register (2), which sets a specific comparison value from software; At the timing when the comparison value is set, the above unit timer (4
), and after the values of the unit register (5) and the unit timer (4) match, the timer circuit (1) and
2. The timer control system according to claim 1, wherein a match with said comparison register (2) is detected.